From 083636490789fe2a26488f1ea102d158ca7c53be Mon Sep 17 00:00:00 2001
From: Chris Maniewski <code@chmanie.com>
Date: Fri, 29 Mar 2024 11:56:40 +0100
Subject: [PATCH] chore: fix clippy issues

---
 .github/workflows/build.yml |  2 ++
 src/config.rs               |  2 +-
 src/port.rs                 | 10 +++++++---
 3 files changed, 10 insertions(+), 4 deletions(-)

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 027a47c..a84fbf6 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -12,6 +12,8 @@ jobs:
     - uses: actions/checkout@v2
     - name: Install Rust toolchain
       uses: dtolnay/rust-toolchain@stable
+    - name: Add thumbv6m-none-eabi target
+      run: rustup target add thumbv6m-none-eabi
     - name: Formatting & Lints
       run: cargo fmt -- --check && cargo clippy -- -D warnings
     - name: Build
diff --git a/src/config.rs b/src/config.rs
index f9c4995..5370346 100644
--- a/src/config.rs
+++ b/src/config.rs
@@ -17,7 +17,7 @@ pub const REG_DAC_DATA: u8 = 0x60;
 /// Available Ports
 #[repr(u8)]
 #[derive(Clone, Copy)]
-pub(crate) enum Port {
+pub enum Port {
     /// Port 0
     P0,
     /// Port 1
diff --git a/src/port.rs b/src/port.rs
index 308db62..60da557 100644
--- a/src/port.rs
+++ b/src/port.rs
@@ -1,3 +1,4 @@
+use core::future::Future;
 use embedded_hal::digital::OutputPin;
 use embedded_hal_async::spi::SpiBus;
 use seq_macro::seq;
@@ -25,10 +26,10 @@ where
 }
 
 pub trait IntoConfiguredPort<'a, CONFIG, SPI: 'a, EN: 'a, S, P> {
-    async fn into_configured_port(
+    fn into_configured_port(
         self,
         config: CONFIG,
-    ) -> Result<MaxPort<'a, CONFIG, SPI, EN>, Error<S, P>>;
+    ) -> impl Future<Output = Result<MaxPort<'a, CONFIG, SPI, EN>, Error<S, P>>>;
 }
 
 seq!(N in 0..=12 {
@@ -60,7 +61,10 @@ pub struct MaxPort<'a, CONFIG, SPI, EN> {
 }
 
 pub trait IntoMode<'a, CONFIG, SPI: 'a, EN: 'a, S, P> {
-    async fn into_mode(self, config: CONFIG) -> Result<MaxPort<'a, CONFIG, SPI, EN>, Error<S, P>>;
+    fn into_mode(
+        self,
+        config: CONFIG,
+    ) -> impl Future<Output = Result<MaxPort<'a, CONFIG, SPI, EN>, Error<S, P>>>;
 }
 
 seq!(N in 0..=12 {