-
Notifications
You must be signed in to change notification settings - Fork 103
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Crashes on aarch64 due to off-by-one errors #264
Comments
Thank you for reporting this. I haven't noticed it in any of my ARM machines because at least the first one will only occur if the SoC cannot be detected with the "main" detection methods. Strangely, it was not noted even for users that would run that function (e.g., #262). It's a pity v1.06 comes with this, but at least it's fixed now on master. Can you confirm if this works for you? Also, would you mind opening another issue with the machine where it was crashing without this last patch? I assume it will give you unkown SoC. Thanks! |
That seems to be precisely the case here.
I patched the program myself, but looking at commit aa94389, our fixes are identical. I can confirm that the program works fine with those changes.
The second issue was actually something I've stumbled across by accident while reading the code; it didn't actually trigger a crash on this machine. Sorry, should have made that clear. |
Yeah well, I meant opening a new issue to track the unknown SoC (the machine you have showed). But we can try to solve that here if you want. If that's the case, what machine are we talking about in this case? Model? Also, what is the output of |
So the story is, I maintain the cpufetch package in Fedora Linux. I observed these crashes when trying to build the package using the official distro builders. Since I have rather limited access to these machines, I asked for help on the devel mailing list. Here's the answer from Kevin Fenzi:
Looking at my build history, the crashing builds occurred on type 1, 3 and 4. Sorry for the late answer. Feel free to ask questions in the mailing list thread to avoid using me as an intermediary. |
I think participating in the mailing list is the wrong thing to do for me. The issues should all be collected in one place (here). Spreading them across different places does not seem the most convinient approach for a developer. The issues page is always open for those who want to report any issue. In particular, I'm interested in knowing more about the sentence: "I suspect upstream needs to generalise the way they deal with some of the pieces, happy to assist with comments upstream." I'm afraid that if we want to keep the customized logo for each vendor and the manufacturing process this is going to be hard to accomplish. From the machines you have shown, the first and the second one could be potentially fixed, for which I'd need the output of |
I know none of those machines use device tree, they all use ACPI to define the hardware. |
In such case, what do you think would be a non-root approach to uniquely identify the SoC? |
Using the latest cpufetch v1.06, the program builds fine, but then crashes when ran on aarch64.
Debugging with Valgrind led me to find two off-by-one errors:
Commit 1b746bc introduced this code to
src/common.pci.c
:When calculating
path_size
, the code correctly adds 2 bytes for the extra slashes introduced by thesprintf()
call. However, bothemalloc()
calls fail to add another extra byte for the NUL terminator.Commit 90624b9 introduced the following change in
src/arm/midr.c
:If you look carefully, you'll notice the old string was terminated with a comma, whereas the new one is not.
The text was updated successfully, but these errors were encountered: