From 7f6e33ea2af031060db9a40b2a16e6f152639675 Mon Sep 17 00:00:00 2001 From: Jian Sun Date: Tue, 5 Nov 2024 22:43:42 -0700 Subject: [PATCH 1/4] update GPU tests with new xml options --- .gitmodules | 6 ++--- cime_config/testdefs/testlist_cam.xml | 4 +-- .../cam/outfrq9s_gpu_default/shell_commands | 12 +++++++++ .../cam/outfrq9s_gpu_default/user_nl_cam | 4 +++ .../cam/outfrq9s_gpu_default/user_nl_clm | 26 +++++++++++++++++++ .../cam/outfrq9s_gpu_pcols760/shell_commands | 12 +++++++++ .../cam/outfrq9s_gpu_pcols760/user_nl_cam | 4 +++ .../cam/outfrq9s_gpu_pcols760/user_nl_clm | 26 +++++++++++++++++++ 8 files changed, 89 insertions(+), 5 deletions(-) create mode 100644 cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/shell_commands create mode 100644 cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_cam create mode 100644 cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_clm create mode 100644 cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/shell_commands create mode 100644 cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_cam create mode 100644 cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_clm diff --git a/.gitmodules b/.gitmodules index 224ee10052..c1256c91ff 100644 --- a/.gitmodules +++ b/.gitmodules @@ -144,21 +144,21 @@ fxDONOTUSEurl = https://github.com/ESCOMP/mizuRoute [submodule "ccs_config"] path = ccs_config url = https://github.com/ESMCI/ccs_config_cesm.git -fxtag = ccs_config_cesm1.0.7 +fxtag = ccs_config_cesm1.0.8 fxrequired = ToplevelRequired fxDONOTUSEurl = https://github.com/ESMCI/ccs_config_cesm.git [submodule "cime"] path = cime url = https://github.com/ESMCI/cime -fxtag = cime6.1.29 +fxtag = cime6.1.41 fxrequired = ToplevelRequired fxDONOTUSEurl = https://github.com/ESMCI/cime [submodule "cmeps"] path = components/cmeps url = https://github.com/ESCOMP/CMEPS.git -fxtag = cmeps1.0.16 +fxtag = cmeps1.0.22 fxrequired = ToplevelRequired fxDONOTUSEurl = https://github.com/ESCOMP/CMEPS.git diff --git a/cime_config/testdefs/testlist_cam.xml b/cime_config/testdefs/testlist_cam.xml index 941bfc6331..c95f004d25 100644 --- a/cime_config/testdefs/testlist_cam.xml +++ b/cime_config/testdefs/testlist_cam.xml @@ -1489,7 +1489,7 @@ - + @@ -1498,7 +1498,7 @@ - + diff --git a/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/shell_commands b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/shell_commands new file mode 100644 index 0000000000..eb3720c75f --- /dev/null +++ b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/shell_commands @@ -0,0 +1,12 @@ +./xmlchange NTASKS=128 +./xmlchange NTHRDS=1 +./xmlchange ROOTPE='0' +./xmlchange ROF_NCPL=`./xmlquery --value ATM_NCPL` +./xmlchange GLC_NCPL=`./xmlquery --value ATM_NCPL` +./xmlchange CAM_CONFIG_OPTS=' -microphys mg3 -rad rrtmg' --append +./xmlchange TIMER_DETAIL='6' +./xmlchange TIMER_LEVEL='999' +./xmlchange GPU_TYPE=a100 +./xmlchange OPENACC_GPU_OFFLOAD=TRUE +./xmlchange OVERSUBSCRIBE_GPU=TRUE +./xmlchange NGPUS_PER_NODE=4 \ No newline at end of file diff --git a/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_cam b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_cam new file mode 100644 index 0000000000..8482082dce --- /dev/null +++ b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_cam @@ -0,0 +1,4 @@ +mfilt=1,1,1,1,1,1 +ndens=1,1,1,1,1,1 +nhtfrq=9,9,9,9,9,9 +inithist='ENDOFRUN' diff --git a/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_clm b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_clm new file mode 100644 index 0000000000..12d5a36d2b --- /dev/null +++ b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default/user_nl_clm @@ -0,0 +1,26 @@ +!---------------------------------------------------------------------------------- +! Users should add all user specific namelist changes below in the form of +! namelist_var = new_namelist_value +! +! Include namelist variables for drv_flds_in ONLY if -megan and/or -drydep options +! are set in the CLM_NAMELIST_OPTS env variable. +! +! EXCEPTIONS: +! Set use_cndv by the compset you use and the CLM_BLDNML_OPTS -dynamic_vegetation setting +! Set use_vichydro by the compset you use and the CLM_BLDNML_OPTS -vichydro setting +! Set use_cn by the compset you use and CLM_BLDNML_OPTS -bgc setting +! Set use_crop by the compset you use and CLM_BLDNML_OPTS -crop setting +! Set spinup_state by the CLM_BLDNML_OPTS -bgc_spinup setting +! Set irrigate by the CLM_BLDNML_OPTS -irrig setting +! Set dtime with L_NCPL option +! Set fatmlndfrc with LND_DOMAIN_PATH/LND_DOMAIN_FILE options +! Set finidat with RUN_REFCASE/RUN_REFDATE/RUN_REFTOD options for hybrid or branch cases +! (includes $inst_string for multi-ensemble cases) +! Set glc_grid with CISM_GRID option +! Set glc_smb with GLC_SMB option +! Set maxpatch_glcmec with GLC_NEC option +! Set glc_do_dynglacier with GLC_TWO_WAY_COUPLING env variable +!---------------------------------------------------------------------------------- +hist_nhtfrq = 9 +hist_mfilt = 1 +hist_ndens = 1 diff --git a/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/shell_commands b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/shell_commands new file mode 100644 index 0000000000..fa18f065fb --- /dev/null +++ b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/shell_commands @@ -0,0 +1,12 @@ +./xmlchange NTASKS=64 +./xmlchange NTHRDS=1 +./xmlchange ROOTPE='0' +./xmlchange ROF_NCPL=`./xmlquery --value ATM_NCPL` +./xmlchange GLC_NCPL=`./xmlquery --value ATM_NCPL` +./xmlchange CAM_CONFIG_OPTS=' -microphys mg3 -rad rrtmg -pcols 760 ' --append +./xmlchange TIMER_DETAIL='6' +./xmlchange TIMER_LEVEL='999' +./xmlchange GPU_TYPE=a100 +./xmlchange OPENACC_GPU_OFFLOAD=TRUE +./xmlchange OVERSUBSCRIBE_GPU=TRUE +./xmlchange NGPUS_PER_NODE=4 diff --git a/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_cam b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_cam new file mode 100644 index 0000000000..8482082dce --- /dev/null +++ b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_cam @@ -0,0 +1,4 @@ +mfilt=1,1,1,1,1,1 +ndens=1,1,1,1,1,1 +nhtfrq=9,9,9,9,9,9 +inithist='ENDOFRUN' diff --git a/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_clm b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_clm new file mode 100644 index 0000000000..12d5a36d2b --- /dev/null +++ b/cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760/user_nl_clm @@ -0,0 +1,26 @@ +!---------------------------------------------------------------------------------- +! Users should add all user specific namelist changes below in the form of +! namelist_var = new_namelist_value +! +! Include namelist variables for drv_flds_in ONLY if -megan and/or -drydep options +! are set in the CLM_NAMELIST_OPTS env variable. +! +! EXCEPTIONS: +! Set use_cndv by the compset you use and the CLM_BLDNML_OPTS -dynamic_vegetation setting +! Set use_vichydro by the compset you use and the CLM_BLDNML_OPTS -vichydro setting +! Set use_cn by the compset you use and CLM_BLDNML_OPTS -bgc setting +! Set use_crop by the compset you use and CLM_BLDNML_OPTS -crop setting +! Set spinup_state by the CLM_BLDNML_OPTS -bgc_spinup setting +! Set irrigate by the CLM_BLDNML_OPTS -irrig setting +! Set dtime with L_NCPL option +! Set fatmlndfrc with LND_DOMAIN_PATH/LND_DOMAIN_FILE options +! Set finidat with RUN_REFCASE/RUN_REFDATE/RUN_REFTOD options for hybrid or branch cases +! (includes $inst_string for multi-ensemble cases) +! Set glc_grid with CISM_GRID option +! Set glc_smb with GLC_SMB option +! Set maxpatch_glcmec with GLC_NEC option +! Set glc_do_dynglacier with GLC_TWO_WAY_COUPLING env variable +!---------------------------------------------------------------------------------- +hist_nhtfrq = 9 +hist_mfilt = 1 +hist_ndens = 1 From 1492847bdd17f5c8c62f275697ae357f3fbe72c6 Mon Sep 17 00:00:00 2001 From: Jian Sun Date: Wed, 6 Nov 2024 09:46:35 -0700 Subject: [PATCH 2/4] update ChangeLog draft --- doc/ChangeLog | 237 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 237 insertions(+) diff --git a/doc/ChangeLog b/doc/ChangeLog index 0dc0a989f8..93261f40db 100644 --- a/doc/ChangeLog +++ b/doc/ChangeLog @@ -1,5 +1,242 @@ =============================================================== +Tag name: cam6_4_0xx +Originator(s): sjsprecious +Date: 04 November 2024 +One-line Summary: update GPU regression tests with new XML options +Github PR URL: https://github.com/ESCOMP/CAM/pull/1186 + +Purpose of changes (include the issue number and title text for each relevant GitHub issue): + +. As discussed in https://github.com/ESMCI/cime/pull/4687, it is better remove the GPU options from the Python workflow in CIME and use XML files instead to configure a GPU test for CESM. + + The following tags should be brought into CAM together to make the new GPU workflow function properly: + - cmeps1.0.22 or newer + - ccs_config_cesm1.0.8 or newer + - cime6.1.33 or newer + + Once those new tags are merged in, the GPU test definition here (https://github.com/ESCOMP/CAM/blob/cam_development/cime_config/testdefs/testlist_cam.xml#L1493-L1510) needs to be updated accordingly. + +Describe any changes made to build system: none + +Describe any changes made to the namelist: none + +List any changes to the defaults for the boundary datasets: none + +Describe any substantial timing or memory changes: none + +Code reviewed by: YYY + +List all files eliminated: none + +List all files added and what they do: + +. The following files are added to perform a GPU regresesion test with PCOLS=16 and two GPU nodes on Derecho + - cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_default + - shell_commands + - user_nl_cam + - user_nl_clm + +. The following files are added to perform a GPU regresesion test with PCOLS=760 and one GPU node on Derecho + - cime_config/testdefs/testmods_dirs/cam/outfrq9s_gpu_pcols760 + - shell_commands + - user_nl_cam + - user_nl_clm + +List all existing files that have been modified, and describe the changes: + +.gitmodules +. update the tags for the external components + +cime_config/testdefs/testlist_cam.xml +. update the GPU regression tests to use the right setups + +If there were any failures reported from running test_driver.sh on any test +platform, and checkin with these failures has been OK'd by the gatekeeper, +then copy the lines from the td.*.status files for the failed tests to the +appropriate machine below. All failed tests must be justified. + +derecho/intel/aux_cam: There is a difference in the namelist comparison and FIELDLIST field, otherwise bit-for-bit. + + ERC_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq3s_cosp (Overall: DIFF) details: + FAIL ERC_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq3s_cosp NLCOMP + FAIL ERC_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq3s_cosp BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERC_D_Ln9.f19_f19_mg17.QPMOZ.derecho_intel.cam-outfrq3s (Overall: DIFF) details: + FAIL ERC_D_Ln9.f19_f19_mg17.QPMOZ.derecho_intel.cam-outfrq3s NLCOMP + FAIL ERC_D_Ln9.f19_f19_mg17.QPMOZ.derecho_intel.cam-outfrq3s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERC_D_Ln9.f19_f19_mg17.QPX2000.derecho_intel.cam-outfrq3s (Overall: DIFF) details: + FAIL ERC_D_Ln9.f19_f19_mg17.QPX2000.derecho_intel.cam-outfrq3s NLCOMP + FAIL ERC_D_Ln9.f19_f19_mg17.QPX2000.derecho_intel.cam-outfrq3s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERC_D_Ln9.ne16_ne16_mg17.FADIAB.derecho_intel.cam-terminator (Overall: NLFAIL) details: + FAIL ERC_D_Ln9.ne16_ne16_mg17.FADIAB.derecho_intel.cam-terminator NLCOMP + ERC_D_Ln9.ne16_ne16_mg17.QPC5HIST.derecho_intel.cam-outfrq3s_usecase (Overall: DIFF) details: + FAIL ERC_D_Ln9.ne16_ne16_mg17.QPC5HIST.derecho_intel.cam-outfrq3s_usecase NLCOMP + FAIL ERC_D_Ln9.ne16_ne16_mg17.QPC5HIST.derecho_intel.cam-outfrq3s_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERC_D_Ln9_P144x1.ne16pg3_ne16pg3_mg17.QPC6HIST.derecho_intel.cam-outfrq3s_ttrac_usecase (Overall: DIFF) details: + FAIL ERC_D_Ln9_P144x1.ne16pg3_ne16pg3_mg17.QPC6HIST.derecho_intel.cam-outfrq3s_ttrac_usecase NLCOMP + FAIL ERC_D_Ln9_P144x1.ne16pg3_ne16pg3_mg17.QPC6HIST.derecho_intel.cam-outfrq3s_ttrac_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERC_D_Ln9.T42_T42_mg17.FDABIP04.derecho_intel.cam-outfrq3s_usecase (Overall: NLFAIL) details: + FAIL ERC_D_Ln9.T42_T42_mg17.FDABIP04.derecho_intel.cam-outfrq3s_usecase NLCOMP + ERC_D_Ln9.T42_T42_mg17.FHS94.derecho_intel.cam-outfrq3s_usecase (Overall: NLFAIL) details: + FAIL ERC_D_Ln9.T42_T42_mg17.FHS94.derecho_intel.cam-outfrq3s_usecase NLCOMP + ERI_D_Ln18.f45_f45_mg37.QPC41850.derecho_intel.cam-co2rmp_usecase (Overall: DIFF) details: + FAIL ERI_D_Ln18.f45_f45_mg37.QPC41850.derecho_intel.cam-co2rmp_usecase NLCOMP + FAIL ERI_D_Ln18.f45_f45_mg37.QPC41850.derecho_intel.cam-co2rmp_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_D_Ln9.ne30pg3_ne30pg3_mg17.FLTHIST.derecho_intel.cam-outfrq9s (Overall: NLFAIL) details: + FAIL ERP_D_Ln9.ne30pg3_ne30pg3_mg17.FLTHIST.derecho_intel.cam-outfrq9s NLCOMP + ERP_D_Ln9_P64x2.f09_f09_mg17.QSC6.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_D_Ln9_P64x2.f09_f09_mg17.QSC6.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_D_Ln9_P64x2.f09_f09_mg17.QSC6.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ld3.f09_f09_mg17.FWHIST.derecho_intel.cam-reduced_hist1d (Overall: DIFF) details: + FAIL ERP_Ld3.f09_f09_mg17.FWHIST.derecho_intel.cam-reduced_hist1d NLCOMP + FAIL ERP_Ld3.f09_f09_mg17.FWHIST.derecho_intel.cam-reduced_hist1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ld3.ne30pg3_ne30pg3_mg17.FHISTC_MTt4s.derecho_intel.cam-outfrq1d_aoa (Overall: NLFAIL) details: + FAIL ERP_Ld3.ne30pg3_ne30pg3_mg17.FHISTC_MTt4s.derecho_intel.cam-outfrq1d_aoa NLCOMP + ERP_Lh12.f19_f19_mg17.FW4madSD.derecho_intel.cam-outfrq3h (Overall: DIFF) details: + FAIL ERP_Lh12.f19_f19_mg17.FW4madSD.derecho_intel.cam-outfrq3h NLCOMP + FAIL ERP_Lh12.f19_f19_mg17.FW4madSD.derecho_intel.cam-outfrq3h BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.C96_C96_mg17.F2000climo.derecho_intel.cam-outfrq9s_mg3 (Overall: DIFF) details: + FAIL ERP_Ln9.C96_C96_mg17.F2000climo.derecho_intel.cam-outfrq9s_mg3 NLCOMP + FAIL ERP_Ln9.C96_C96_mg17.F2000climo.derecho_intel.cam-outfrq9s_mg3 BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.f09_f09_mg17.F1850.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_Ln9.f09_f09_mg17.F1850.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.f09_f09_mg17.F1850.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.f09_f09_mg17.F2000climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_Ln9.f09_f09_mg17.F2000climo.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.f09_f09_mg17.F2000climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s (Overall: FAIL) details: + FAIL ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s COMPARE_base_rest + FAIL ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.f09_f09_mg17.FHIST_BDRD.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_Ln9.f09_f09_mg17.FHIST_BDRD.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.f09_f09_mg17.FHIST_BDRD.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.f19_f19_mg17.FWsc1850.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_Ln9.f19_f19_mg17.FWsc1850.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.f19_f19_mg17.FWsc1850.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.ne30pg3_ne30pg3_mg17.FCnudged.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FCnudged.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FCnudged.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERP_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERS_Ln9.f09_f09_mg17.FX2000.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERS_Ln9.f09_f09_mg17.FX2000.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERS_Ln9.f09_f09_mg17.FX2000.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERS_Ln9.f19_f19_mg17.FSPCAMS.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERS_Ln9.f19_f19_mg17.FSPCAMS.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERS_Ln9.f19_f19_mg17.FSPCAMS.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERS_Ln9.f19_f19_mg17.FXSD.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL ERS_Ln9.f19_f19_mg17.FXSD.derecho_intel.cam-outfrq9s NLCOMP + FAIL ERS_Ln9.f19_f19_mg17.FXSD.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + ERS_Ln9.ne0TESTONLYne5x4_ne0TESTONLYne5x4_mg37.FADIAB.derecho_intel.cam-outfrq3s_refined (Overall: NLFAIL) details: + FAIL ERS_Ln9.ne0TESTONLYne5x4_ne0TESTONLYne5x4_mg37.FADIAB.derecho_intel.cam-outfrq3s_refined NLCOMP + ERS_Ln9_P288x1.mpasa120_mpasa120.F2000climo.derecho_intel.cam-outfrq9s_mpasa120 (Overall: DIFF) details: + FAIL ERS_Ln9_P288x1.mpasa120_mpasa120.F2000climo.derecho_intel.cam-outfrq9s_mpasa120 NLCOMP + FAIL ERS_Ln9_P288x1.mpasa120_mpasa120.F2000climo.derecho_intel.cam-outfrq9s_mpasa120 BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SCT_D_Ln7.ne3_ne3_mg37.QPC5.derecho_intel.cam-scm_prep (Overall: DIFF) details: + FAIL SCT_D_Ln7.ne3_ne3_mg37.QPC5.derecho_intel.cam-scm_prep NLCOMP + FAIL SCT_D_Ln7.ne3_ne3_mg37.QPC5.derecho_intel.cam-scm_prep BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SCT_D_Ln7.T42_T42_mg17.QPC5.derecho_intel.cam-scm_prep (Overall: DIFF) details: + FAIL SCT_D_Ln7.T42_T42_mg17.QPC5.derecho_intel.cam-scm_prep NLCOMP + FAIL SCT_D_Ln7.T42_T42_mg17.QPC5.derecho_intel.cam-scm_prep BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ld2.f19_f19_mg17.QPC5HIST.derecho_intel.cam-volc_usecase (Overall: DIFF) details: + FAIL SMS_D_Ld2.f19_f19_mg17.QPC5HIST.derecho_intel.cam-volc_usecase NLCOMP + FAIL SMS_D_Ld2.f19_f19_mg17.QPC5HIST.derecho_intel.cam-volc_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ld5.f19_f19_mg17.PC4.derecho_intel.cam-cam4_port5d (Overall: NLFAIL) details: + FAIL SMS_D_Ld5.f19_f19_mg17.PC4.derecho_intel.cam-cam4_port5d NLCOMP + SMS_D_Ln9.f09_f09_mg17.FCts2nudged.derecho_intel.cam-outfrq9s_leapday (Overall: DIFF) details: + FAIL SMS_D_Ln9.f09_f09_mg17.FCts2nudged.derecho_intel.cam-outfrq9s_leapday NLCOMP + FAIL SMS_D_Ln9.f09_f09_mg17.FCts2nudged.derecho_intel.cam-outfrq9s_leapday BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.f09_f09_mg17.FCvbsxHIST.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9.f09_f09_mg17.FCvbsxHIST.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9.f09_f09_mg17.FCvbsxHIST.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.f09_f09_mg17.FSD.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9.f09_f09_mg17.FSD.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9.f09_f09_mg17.FSD.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s_waccm_ma_mam4 (Overall: DIFF) details: + FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s_waccm_ma_mam4 NLCOMP + FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s_waccm_ma_mam4 BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.f19_f19_mg17.FXHIST.derecho_intel.cam-outfrq9s_amie (Overall: FAIL) details: + FAIL SMS_D_Ln9.f19_f19_mg17.FXHIST.derecho_intel.cam-outfrq9s_amie SETUP + SMS_D_Ln9.f19_f19_mg17.QPC2000climo.derecho_intel.cam-outfrq3s_usecase (Overall: DIFF) details: + FAIL SMS_D_Ln9.f19_f19_mg17.QPC2000climo.derecho_intel.cam-outfrq3s_usecase NLCOMP + FAIL SMS_D_Ln9.f19_f19_mg17.QPC2000climo.derecho_intel.cam-outfrq3s_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.f19_f19_mg17.QPC5M7.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9.f19_f19_mg17.QPC5M7.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9.f19_f19_mg17.QPC5M7.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.ne16_ne16_mg17.QPX2000.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9.ne16_ne16_mg17.QPX2000.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9.ne16_ne16_mg17.QPX2000.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.ne16pg3_ne16pg3_mg17.FX2000.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9.ne16pg3_ne16pg3_mg17.FX2000.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9.ne16pg3_ne16pg3_mg17.FX2000.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9.ne30pg3_ne30pg3_mg17.FMTHIST.derecho_intel.cam-outfrq9s (Overall: NLFAIL) details: + FAIL SMS_D_Ln9.ne30pg3_ne30pg3_mg17.FMTHIST.derecho_intel.cam-outfrq9s NLCOMP + SMS_D_Ln9_P1280x1.ne0ARCTICne30x4_ne0ARCTICne30x4_mt12.FHIST.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9_P1280x1.ne0ARCTICne30x4_ne0ARCTICne30x4_mt12.FHIST.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9_P1280x1.ne0ARCTICne30x4_ne0ARCTICne30x4_mt12.FHIST.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_D_Ln9_P1280x1.ne0CONUSne30x8_ne0CONUSne30x8_mt12.FCHIST.derecho_intel.cam-outfrq9s (Overall: FAIL) details: + FAIL SMS_D_Ln9_P1280x1.ne0CONUSne30x8_ne0CONUSne30x8_mt12.FCHIST.derecho_intel.cam-outfrq9s SETUP + SMS_D_Ln9_P1280x1.ne30pg3_ne30pg3_mg17.FHISTC_MTt1s.derecho_intel.cam-outfrq9s_Leung_dust (Overall: NLFAIL) details: + FAIL SMS_D_Ln9_P1280x1.ne30pg3_ne30pg3_mg17.FHISTC_MTt1s.derecho_intel.cam-outfrq9s_Leung_dust NLCOMP + SMS_D_Ln9.T42_T42.FSCAMARM97.derecho_intel.cam-outfrq9s (Overall: DIFF) details: + FAIL SMS_D_Ln9.T42_T42.FSCAMARM97.derecho_intel.cam-outfrq9s NLCOMP + FAIL SMS_D_Ln9.T42_T42.FSCAMARM97.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ld1.f09_f09_mg17.FCHIST_GC.derecho_intel.cam-outfrq1d (Overall: DIFF) details: + FAIL SMS_Ld1.f09_f09_mg17.FCHIST_GC.derecho_intel.cam-outfrq1d NLCOMP + FAIL SMS_Ld1.f09_f09_mg17.FCHIST_GC.derecho_intel.cam-outfrq1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ld1.f09_f09_mg17.FW2000climo.derecho_intel.cam-outfrq1d (Overall: DIFF) details: + FAIL SMS_Ld1.f09_f09_mg17.FW2000climo.derecho_intel.cam-outfrq1d NLCOMP + FAIL SMS_Ld1.f09_f09_mg17.FW2000climo.derecho_intel.cam-outfrq1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ld1.ne30pg3_ne30pg3_mg17.FC2010climo.derecho_intel.cam-outfrq1d (Overall: DIFF) details: + FAIL SMS_Ld1.ne30pg3_ne30pg3_mg17.FC2010climo.derecho_intel.cam-outfrq1d NLCOMP + FAIL SMS_Ld1.ne30pg3_ne30pg3_mg17.FC2010climo.derecho_intel.cam-outfrq1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ld5.f09_f09_mg17.PC6.derecho_intel.cam-cam6_port_f09 (Overall: NLFAIL) details: + FAIL SMS_Ld5.f09_f09_mg17.PC6.derecho_intel.cam-cam6_port_f09 NLCOMP + SMS_Lh12.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq3h (Overall: DIFF) details: + FAIL SMS_Lh12.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq3h NLCOMP + FAIL SMS_Lh12.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq3h BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-nudging (Overall: DIFF) details: + FAIL SMS_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-nudging NLCOMP + FAIL SMS_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-nudging BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ln9.f09_f09_mg17.FW1850.derecho_intel.cam-reduced_hist3s (Overall: DIFF) details: + FAIL SMS_Ln9.f09_f09_mg17.FW1850.derecho_intel.cam-reduced_hist3s NLCOMP + FAIL SMS_Ln9.f09_f09_mg17.FW1850.derecho_intel.cam-reduced_hist3s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ln9.f19_f19.F2000climo.derecho_intel.cam-silhs (Overall: DIFF) details: + FAIL SMS_Ln9.f19_f19.F2000climo.derecho_intel.cam-silhs NLCOMP + FAIL SMS_Ln9.f19_f19.F2000climo.derecho_intel.cam-silhs BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ln9.f19_f19_mg17.FHIST.derecho_intel.cam-outfrq9s_nochem (Overall: DIFF) details: + FAIL SMS_Ln9.f19_f19_mg17.FHIST.derecho_intel.cam-outfrq9s_nochem NLCOMP + FAIL SMS_Ln9.f19_f19_mg17.FHIST.derecho_intel.cam-outfrq9s_nochem BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + SMS_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s_rrtmgp (Overall: DIFF) details: + FAIL SMS_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s_rrtmgp NLCOMP + FAIL SMS_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s_rrtmgp BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) + +derecho/nvhpc/aux_cam: The baseline is generated successfully. + +izumi/nag/aux_cam: I do not know how to run on Izumi + +izumi/gnu/aux_cam: I do not know how to run on Izumi + +CAM tag used for the baseline comparison tests if different than previous +tag: cam6_4_044 + +Summarize any changes to answers: BFB + +=============================================================== + +=============================================================== + Tag name: cam6_4_044 Originator(s): eaton Date: 04 November 2024 From 89655a4ffe6a44feccc576c65615f5826600861e Mon Sep 17 00:00:00 2001 From: Jian Sun Date: Wed, 6 Nov 2024 11:02:21 -0700 Subject: [PATCH 3/4] update change log --- doc/ChangeLog | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/doc/ChangeLog b/doc/ChangeLog index 93261f40db..1988c5dfe8 100644 --- a/doc/ChangeLog +++ b/doc/ChangeLog @@ -2,12 +2,14 @@ Tag name: cam6_4_0xx Originator(s): sjsprecious -Date: 04 November 2024 +Date: 06 November 2024 One-line Summary: update GPU regression tests with new XML options Github PR URL: https://github.com/ESCOMP/CAM/pull/1186 Purpose of changes (include the issue number and title text for each relevant GitHub issue): +. GitHub issue: https://github.com/ESCOMP/CAM/issues/1165 + . As discussed in https://github.com/ESMCI/cime/pull/4687, it is better remove the GPU options from the Python workflow in CIME and use XML files instead to configure a GPU test for CESM. The following tags should be brought into CAM together to make the new GPU workflow function properly: @@ -25,7 +27,7 @@ List any changes to the defaults for the boundary datasets: none Describe any substantial timing or memory changes: none -Code reviewed by: YYY +Code reviewed by: peverwhee List all files eliminated: none From 9a14ae3ea237e8b36beaa6ca74ef23d4302a0080 Mon Sep 17 00:00:00 2001 From: Jesse Nusbaumer Date: Fri, 8 Nov 2024 15:17:05 -0700 Subject: [PATCH 4/4] Finalize ChangeLog and update submodules. --- ccs_config | 2 +- cime | 2 +- components/cmeps | 2 +- doc/ChangeLog | 196 +++++++---------------------------------------- 4 files changed, 30 insertions(+), 172 deletions(-) diff --git a/ccs_config b/ccs_config index e4ac80ef14..775e9f7900 160000 --- a/ccs_config +++ b/ccs_config @@ -1 +1 @@ -Subproject commit e4ac80ef142954e582b4065222145352f22cd3a4 +Subproject commit 775e9f790044c3632e70e2beda9d66db34558b7b diff --git a/cime b/cime index 2776043f0d..1236c0fede 160000 --- a/cime +++ b/cime @@ -1 +1 @@ -Subproject commit 2776043f0d20d2bc1094afeb48e0cc242b0b0407 +Subproject commit 1236c0feded460aef3e5bdba18e4b850f1997346 diff --git a/components/cmeps b/components/cmeps index 5b7d76978e..1355710f04 160000 --- a/components/cmeps +++ b/components/cmeps @@ -1 +1 @@ -Subproject commit 5b7d76978e2fdc661ec2de4ba9834b985decadc6 +Subproject commit 1355710f04fa6286a13e8056e35c6736e7250e3d diff --git a/doc/ChangeLog b/doc/ChangeLog index 550759daf7..fdc0c4aa65 100644 --- a/doc/ChangeLog +++ b/doc/ChangeLog @@ -58,182 +58,41 @@ platform, and checkin with these failures has been OK'd by the gatekeeper, then copy the lines from the td.*.status files for the failed tests to the appropriate machine below. All failed tests must be justified. -derecho/intel/aux_cam: There is a difference in the namelist comparison and FIELDLIST field, otherwise bit-for-bit. +derecho/intel/aux_cam: - ERC_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq3s_cosp (Overall: DIFF) details: - FAIL ERC_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq3s_cosp NLCOMP - FAIL ERC_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq3s_cosp BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERC_D_Ln9.f19_f19_mg17.QPMOZ.derecho_intel.cam-outfrq3s (Overall: DIFF) details: - FAIL ERC_D_Ln9.f19_f19_mg17.QPMOZ.derecho_intel.cam-outfrq3s NLCOMP - FAIL ERC_D_Ln9.f19_f19_mg17.QPMOZ.derecho_intel.cam-outfrq3s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERC_D_Ln9.f19_f19_mg17.QPX2000.derecho_intel.cam-outfrq3s (Overall: DIFF) details: - FAIL ERC_D_Ln9.f19_f19_mg17.QPX2000.derecho_intel.cam-outfrq3s NLCOMP - FAIL ERC_D_Ln9.f19_f19_mg17.QPX2000.derecho_intel.cam-outfrq3s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERC_D_Ln9.ne16_ne16_mg17.FADIAB.derecho_intel.cam-terminator (Overall: NLFAIL) details: - FAIL ERC_D_Ln9.ne16_ne16_mg17.FADIAB.derecho_intel.cam-terminator NLCOMP - ERC_D_Ln9.ne16_ne16_mg17.QPC5HIST.derecho_intel.cam-outfrq3s_usecase (Overall: DIFF) details: - FAIL ERC_D_Ln9.ne16_ne16_mg17.QPC5HIST.derecho_intel.cam-outfrq3s_usecase NLCOMP - FAIL ERC_D_Ln9.ne16_ne16_mg17.QPC5HIST.derecho_intel.cam-outfrq3s_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERC_D_Ln9_P144x1.ne16pg3_ne16pg3_mg17.QPC6HIST.derecho_intel.cam-outfrq3s_ttrac_usecase (Overall: DIFF) details: - FAIL ERC_D_Ln9_P144x1.ne16pg3_ne16pg3_mg17.QPC6HIST.derecho_intel.cam-outfrq3s_ttrac_usecase NLCOMP - FAIL ERC_D_Ln9_P144x1.ne16pg3_ne16pg3_mg17.QPC6HIST.derecho_intel.cam-outfrq3s_ttrac_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERC_D_Ln9.T42_T42_mg17.FDABIP04.derecho_intel.cam-outfrq3s_usecase (Overall: NLFAIL) details: - FAIL ERC_D_Ln9.T42_T42_mg17.FDABIP04.derecho_intel.cam-outfrq3s_usecase NLCOMP - ERC_D_Ln9.T42_T42_mg17.FHS94.derecho_intel.cam-outfrq3s_usecase (Overall: NLFAIL) details: - FAIL ERC_D_Ln9.T42_T42_mg17.FHS94.derecho_intel.cam-outfrq3s_usecase NLCOMP - ERI_D_Ln18.f45_f45_mg37.QPC41850.derecho_intel.cam-co2rmp_usecase (Overall: DIFF) details: - FAIL ERI_D_Ln18.f45_f45_mg37.QPC41850.derecho_intel.cam-co2rmp_usecase NLCOMP - FAIL ERI_D_Ln18.f45_f45_mg37.QPC41850.derecho_intel.cam-co2rmp_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_D_Ln9.f19_f19_mg17.QPC6.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_D_Ln9.ne30pg3_ne30pg3_mg17.FLTHIST.derecho_intel.cam-outfrq9s (Overall: NLFAIL) details: - FAIL ERP_D_Ln9.ne30pg3_ne30pg3_mg17.FLTHIST.derecho_intel.cam-outfrq9s NLCOMP - ERP_D_Ln9_P64x2.f09_f09_mg17.QSC6.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_D_Ln9_P64x2.f09_f09_mg17.QSC6.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_D_Ln9_P64x2.f09_f09_mg17.QSC6.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ld3.f09_f09_mg17.FWHIST.derecho_intel.cam-reduced_hist1d (Overall: DIFF) details: - FAIL ERP_Ld3.f09_f09_mg17.FWHIST.derecho_intel.cam-reduced_hist1d NLCOMP - FAIL ERP_Ld3.f09_f09_mg17.FWHIST.derecho_intel.cam-reduced_hist1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ld3.ne30pg3_ne30pg3_mg17.FHISTC_MTt4s.derecho_intel.cam-outfrq1d_aoa (Overall: NLFAIL) details: - FAIL ERP_Ld3.ne30pg3_ne30pg3_mg17.FHISTC_MTt4s.derecho_intel.cam-outfrq1d_aoa NLCOMP - ERP_Lh12.f19_f19_mg17.FW4madSD.derecho_intel.cam-outfrq3h (Overall: DIFF) details: - FAIL ERP_Lh12.f19_f19_mg17.FW4madSD.derecho_intel.cam-outfrq3h NLCOMP - FAIL ERP_Lh12.f19_f19_mg17.FW4madSD.derecho_intel.cam-outfrq3h BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.C96_C96_mg17.F2000climo.derecho_intel.cam-outfrq9s_mg3 (Overall: DIFF) details: - FAIL ERP_Ln9.C96_C96_mg17.F2000climo.derecho_intel.cam-outfrq9s_mg3 NLCOMP - FAIL ERP_Ln9.C96_C96_mg17.F2000climo.derecho_intel.cam-outfrq9s_mg3 BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.f09_f09_mg17.F1850.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_Ln9.f09_f09_mg17.F1850.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.f09_f09_mg17.F1850.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.f09_f09_mg17.F2000climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_Ln9.f09_f09_mg17.F2000climo.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.f09_f09_mg17.F2000climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s (Overall: FAIL) details: - FAIL ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s COMPARE_base_rest - FAIL ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.f09_f09_mg17.FHIST_BDRD.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_Ln9.f09_f09_mg17.FHIST_BDRD.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.f09_f09_mg17.FHIST_BDRD.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.f19_f19_mg17.FWsc1850.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_Ln9.f19_f19_mg17.FWsc1850.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.f19_f19_mg17.FWsc1850.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.ne30pg3_ne30pg3_mg17.FCnudged.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FCnudged.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FCnudged.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERP_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERP_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERS_Ln9.f09_f09_mg17.FX2000.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERS_Ln9.f09_f09_mg17.FX2000.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERS_Ln9.f09_f09_mg17.FX2000.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERS_Ln9.f19_f19_mg17.FSPCAMS.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERS_Ln9.f19_f19_mg17.FSPCAMS.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERS_Ln9.f19_f19_mg17.FSPCAMS.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERS_Ln9.f19_f19_mg17.FXSD.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL ERS_Ln9.f19_f19_mg17.FXSD.derecho_intel.cam-outfrq9s NLCOMP - FAIL ERS_Ln9.f19_f19_mg17.FXSD.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - ERS_Ln9.ne0TESTONLYne5x4_ne0TESTONLYne5x4_mg37.FADIAB.derecho_intel.cam-outfrq3s_refined (Overall: NLFAIL) details: - FAIL ERS_Ln9.ne0TESTONLYne5x4_ne0TESTONLYne5x4_mg37.FADIAB.derecho_intel.cam-outfrq3s_refined NLCOMP - ERS_Ln9_P288x1.mpasa120_mpasa120.F2000climo.derecho_intel.cam-outfrq9s_mpasa120 (Overall: DIFF) details: - FAIL ERS_Ln9_P288x1.mpasa120_mpasa120.F2000climo.derecho_intel.cam-outfrq9s_mpasa120 NLCOMP - FAIL ERS_Ln9_P288x1.mpasa120_mpasa120.F2000climo.derecho_intel.cam-outfrq9s_mpasa120 BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SCT_D_Ln7.ne3_ne3_mg37.QPC5.derecho_intel.cam-scm_prep (Overall: DIFF) details: - FAIL SCT_D_Ln7.ne3_ne3_mg37.QPC5.derecho_intel.cam-scm_prep NLCOMP - FAIL SCT_D_Ln7.ne3_ne3_mg37.QPC5.derecho_intel.cam-scm_prep BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SCT_D_Ln7.T42_T42_mg17.QPC5.derecho_intel.cam-scm_prep (Overall: DIFF) details: - FAIL SCT_D_Ln7.T42_T42_mg17.QPC5.derecho_intel.cam-scm_prep NLCOMP - FAIL SCT_D_Ln7.T42_T42_mg17.QPC5.derecho_intel.cam-scm_prep BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ld2.f19_f19_mg17.QPC5HIST.derecho_intel.cam-volc_usecase (Overall: DIFF) details: - FAIL SMS_D_Ld2.f19_f19_mg17.QPC5HIST.derecho_intel.cam-volc_usecase NLCOMP - FAIL SMS_D_Ld2.f19_f19_mg17.QPC5HIST.derecho_intel.cam-volc_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ld5.f19_f19_mg17.PC4.derecho_intel.cam-cam4_port5d (Overall: NLFAIL) details: - FAIL SMS_D_Ld5.f19_f19_mg17.PC4.derecho_intel.cam-cam4_port5d NLCOMP - SMS_D_Ln9.f09_f09_mg17.FCts2nudged.derecho_intel.cam-outfrq9s_leapday (Overall: DIFF) details: - FAIL SMS_D_Ln9.f09_f09_mg17.FCts2nudged.derecho_intel.cam-outfrq9s_leapday NLCOMP - FAIL SMS_D_Ln9.f09_f09_mg17.FCts2nudged.derecho_intel.cam-outfrq9s_leapday BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.f09_f09_mg17.FCvbsxHIST.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9.f09_f09_mg17.FCvbsxHIST.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9.f09_f09_mg17.FCvbsxHIST.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.f09_f09_mg17.FSD.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9.f09_f09_mg17.FSD.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9.f09_f09_mg17.FSD.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s_waccm_ma_mam4 (Overall: DIFF) details: - FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s_waccm_ma_mam4 NLCOMP - FAIL SMS_D_Ln9.f19_f19_mg17.FWma2000climo.derecho_intel.cam-outfrq9s_waccm_ma_mam4 BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.f19_f19_mg17.FXHIST.derecho_intel.cam-outfrq9s_amie (Overall: FAIL) details: - FAIL SMS_D_Ln9.f19_f19_mg17.FXHIST.derecho_intel.cam-outfrq9s_amie SETUP - SMS_D_Ln9.f19_f19_mg17.QPC2000climo.derecho_intel.cam-outfrq3s_usecase (Overall: DIFF) details: - FAIL SMS_D_Ln9.f19_f19_mg17.QPC2000climo.derecho_intel.cam-outfrq3s_usecase NLCOMP - FAIL SMS_D_Ln9.f19_f19_mg17.QPC2000climo.derecho_intel.cam-outfrq3s_usecase BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.f19_f19_mg17.QPC5M7.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9.f19_f19_mg17.QPC5M7.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9.f19_f19_mg17.QPC5M7.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.ne16_ne16_mg17.QPX2000.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9.ne16_ne16_mg17.QPX2000.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9.ne16_ne16_mg17.QPX2000.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.ne16pg3_ne16pg3_mg17.FX2000.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9.ne16pg3_ne16pg3_mg17.FX2000.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9.ne16pg3_ne16pg3_mg17.FX2000.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9.ne30pg3_ne30pg3_mg17.FMTHIST.derecho_intel.cam-outfrq9s (Overall: NLFAIL) details: - FAIL SMS_D_Ln9.ne30pg3_ne30pg3_mg17.FMTHIST.derecho_intel.cam-outfrq9s NLCOMP - SMS_D_Ln9_P1280x1.ne0ARCTICne30x4_ne0ARCTICne30x4_mt12.FHIST.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9_P1280x1.ne0ARCTICne30x4_ne0ARCTICne30x4_mt12.FHIST.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9_P1280x1.ne0ARCTICne30x4_ne0ARCTICne30x4_mt12.FHIST.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_D_Ln9_P1280x1.ne0CONUSne30x8_ne0CONUSne30x8_mt12.FCHIST.derecho_intel.cam-outfrq9s (Overall: FAIL) details: - FAIL SMS_D_Ln9_P1280x1.ne0CONUSne30x8_ne0CONUSne30x8_mt12.FCHIST.derecho_intel.cam-outfrq9s SETUP - SMS_D_Ln9_P1280x1.ne30pg3_ne30pg3_mg17.FHISTC_MTt1s.derecho_intel.cam-outfrq9s_Leung_dust (Overall: NLFAIL) details: - FAIL SMS_D_Ln9_P1280x1.ne30pg3_ne30pg3_mg17.FHISTC_MTt1s.derecho_intel.cam-outfrq9s_Leung_dust NLCOMP - SMS_D_Ln9.T42_T42.FSCAMARM97.derecho_intel.cam-outfrq9s (Overall: DIFF) details: - FAIL SMS_D_Ln9.T42_T42.FSCAMARM97.derecho_intel.cam-outfrq9s NLCOMP - FAIL SMS_D_Ln9.T42_T42.FSCAMARM97.derecho_intel.cam-outfrq9s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ld1.f09_f09_mg17.FCHIST_GC.derecho_intel.cam-outfrq1d (Overall: DIFF) details: - FAIL SMS_Ld1.f09_f09_mg17.FCHIST_GC.derecho_intel.cam-outfrq1d NLCOMP - FAIL SMS_Ld1.f09_f09_mg17.FCHIST_GC.derecho_intel.cam-outfrq1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ld1.f09_f09_mg17.FW2000climo.derecho_intel.cam-outfrq1d (Overall: DIFF) details: - FAIL SMS_Ld1.f09_f09_mg17.FW2000climo.derecho_intel.cam-outfrq1d NLCOMP - FAIL SMS_Ld1.f09_f09_mg17.FW2000climo.derecho_intel.cam-outfrq1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ld1.ne30pg3_ne30pg3_mg17.FC2010climo.derecho_intel.cam-outfrq1d (Overall: DIFF) details: - FAIL SMS_Ld1.ne30pg3_ne30pg3_mg17.FC2010climo.derecho_intel.cam-outfrq1d NLCOMP - FAIL SMS_Ld1.ne30pg3_ne30pg3_mg17.FC2010climo.derecho_intel.cam-outfrq1d BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ld5.f09_f09_mg17.PC6.derecho_intel.cam-cam6_port_f09 (Overall: NLFAIL) details: - FAIL SMS_Ld5.f09_f09_mg17.PC6.derecho_intel.cam-cam6_port_f09 NLCOMP - SMS_Lh12.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq3h (Overall: DIFF) details: - FAIL SMS_Lh12.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq3h NLCOMP - FAIL SMS_Lh12.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq3h BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-nudging (Overall: DIFF) details: - FAIL SMS_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-nudging NLCOMP - FAIL SMS_Ln9.f09_f09_mg17.F2010climo.derecho_intel.cam-nudging BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ln9.f09_f09_mg17.FW1850.derecho_intel.cam-reduced_hist3s (Overall: DIFF) details: - FAIL SMS_Ln9.f09_f09_mg17.FW1850.derecho_intel.cam-reduced_hist3s NLCOMP - FAIL SMS_Ln9.f09_f09_mg17.FW1850.derecho_intel.cam-reduced_hist3s BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ln9.f19_f19.F2000climo.derecho_intel.cam-silhs (Overall: DIFF) details: - FAIL SMS_Ln9.f19_f19.F2000climo.derecho_intel.cam-silhs NLCOMP - FAIL SMS_Ln9.f19_f19.F2000climo.derecho_intel.cam-silhs BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ln9.f19_f19_mg17.FHIST.derecho_intel.cam-outfrq9s_nochem (Overall: DIFF) details: - FAIL SMS_Ln9.f19_f19_mg17.FHIST.derecho_intel.cam-outfrq9s_nochem NLCOMP - FAIL SMS_Ln9.f19_f19_mg17.FHIST.derecho_intel.cam-outfrq9s_nochem BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) - SMS_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s_rrtmgp (Overall: DIFF) details: - FAIL SMS_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s_rrtmgp NLCOMP - FAIL SMS_Ln9.ne30pg3_ne30pg3_mg17.FW2000climo.derecho_intel.cam-outfrq9s_rrtmgp BASELINE /glade/campaign/cesm/community/amwg/cam_baselines/cam6_4_044_intel: FIELDLIST field lists differ (otherwise bit-for-bit) +All tests had differences in the namelist comparision and FIELDLIST field, +otherwise, unless listed below, they were bit-for-bit. -derecho/nvhpc/aux_cam: The baseline is generated successfully. +SMS_D_Ln9.f19_f19_mg17.FXHIST.derecho_intel.cam-outfrq9s_amie (Overall: FAIL) +SMS_D_Ln9_P1280x1.ne0CONUSne30x8_ne0CONUSne30x8_mt12.FCHIST.derecho_intel.cam-outfrq9s (Overall: FAIL) + - pre-existing failures due to build-namelist error requiring CLM/CTSM external update. + +ERP_Ln9.f09_f09_mg17.FCSD_HCO.derecho_intel.cam-outfrq9s (Overall: FAIL) +SMS_Ld1.f09_f09_mg17.FCHIST_GC.derecho_intel.cam-outfrq1d (Overall: DIFF) + - pre-existing failure due to HEMCO not having reproducible results issues #1018 and #856 + +derecho/nvhpc/aux_cam: -izumi/nag/aux_cam: I do not know how to run on Izumi +A new baseline was generated successfully, and a second test +with that new baseline passed as expected. -izumi/gnu/aux_cam: I do not know how to run on Izumi +izumi/nag/aux_cam: + +All tests had differences in the namelist comparision and FIELDLIST field, +otherwise, unless listed below, they were bit-for-bit. + +DAE.f45_f45_mg37.FHS94.izumi_nag.cam-dae (Overall: FAIL) + - pre-existing failure -- issue #670 + +izumi/gnu/aux_cam: + +All tests had differences in the namelist comparision and FIELDLIST field, +otherwise they were all bit-for-bit. CAM tag used for the baseline comparison tests if different than previous tag: cam6_4_045 -Summarize any changes to answers: BFB +Summarize any changes to answers: BFB except name anf field list changes. =============================================================== @@ -330,7 +189,6 @@ URL for AMWG diagnostics output used to validate new climate: N/A =============================================================== =============================================================== ->>>>>>> upstream/cam_development Tag name: cam6_4_044 Originator(s): eaton Date: 04 November 2024