From bcb5dce9008e0a43888884a441869fda3f03dc31 Mon Sep 17 00:00:00 2001 From: Elizabeth Esparza Date: Wed, 6 Nov 2024 16:28:30 -0600 Subject: [PATCH] feat: parameters to check added --- src/tt_um_waves.v | 5 ++--- test/test.py | 4 ++-- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/src/tt_um_waves.v b/src/tt_um_waves.v index e2cc00d..6291bea 100644 --- a/src/tt_um_waves.v +++ b/src/tt_um_waves.v @@ -172,9 +172,8 @@ module tt_um_waves ( .ena(ena) ); - // Assign I2S output pins to uo_out[2:0] and zero remaining bits - assign uo_out[2:0] = {sck, ws, sd}; - assign uo_out[7:3] = 5'b0; // Ensure remaining bits are zero + // Assign I2S output pins to uo_out[2:0] and zero out remaining bits + assign uo_out = {5'b00000, sck, ws, sd}; // Unused output assignments assign uio_out = 8'b0; diff --git a/test/test.py b/test/test.py index 8cc0517..99d5dc3 100644 --- a/test/test.py +++ b/test/test.py @@ -1,5 +1,6 @@ import cocotb from cocotb.clock import Clock +from cocotb.regression import TestFactory from cocotb.triggers import RisingEdge, ClockCycles async def send_uart_byte(dut, byte_value): @@ -27,7 +28,7 @@ def is_resolvable(signal_value): @cocotb.test() async def test_tt_um_waves(dut): """Test and debug I2S output and `uo_out[6]` issue.""" - clock = Clock(dut.clk, 40, units="ns") # 25 MHz clock + clock = Clock(dut.clk, 40, units="ns") # 25 MHz clock (40 ns period) cocotb.start_soon(clock.start()) # Apply reset and allow extra stabilization time @@ -46,7 +47,6 @@ async def test_tt_um_waves(dut): # Confirm that `uo_out` has stabilized before proceeding assert is_resolvable(dut.uo_out.value), "uo_out still contains unresolvable states after retries" - # Test UART Reception by sending 'T' for Triangle wave await send_uart_byte(dut, 0x54) # 'T' character in ASCII await ClockCycles(dut.clk, 500)