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Alignment issues with instructions that use 128bit registers and data #8
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It depends on what exactly your patch was doing. Could you post an example transform that reproduces this? |
I've reproduced this and it probably could be considered a bug in ddisasm. Until that gets addressed, a potential workaround is to:
(or some other variation of using the instructions to infer which data blocks must be 16-byte aligned) |
For anyone else coming across this, binaries built with MSVC will crash in initialisation code if data added by gtirb-rewriting isn't aligned. |
Hello,
I ran into an issue inserting a patch with data into a binary that uses instructions operating on 128bit registers, specifically this instruction:
xorpd xmm2, XMMWORD PTR [rip+0x69aed]
.This was as the memory operand needed to be 16 byte aligned and the data I had inserted with my patch had moved this alignment. After I ensured my patch was 16-byte aligned the binary rewrote successfully.
I'm not sure if this is actually an issue or maybe more something to be aware of when writing patches but I thought I might make an issue for anyone else with this problem.
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