diff --git a/src/main/scala/hajime/publicmodules/Decoder.scala b/src/main/scala/hajime/publicmodules/Decoder.scala index 93cea852..e3d1ec94 100644 --- a/src/main/scala/hajime/publicmodules/Decoder.scala +++ b/src/main/scala/hajime/publicmodules/Decoder.scala @@ -187,6 +187,7 @@ object RvvDecode extends DecodeConstants { VSUB_VX -> List(Y, Branch.NONE, Value1.RS1, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VRSUB_VX -> List(Y, Branch.NONE, Value1.RS1, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VRSUB_VI -> List(Y, Branch.NONE, Value1.UIMM19_15, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), + /* VADC_VVM -> List(Y, Branch.NONE, Value1.ZERO, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VADC_VXM -> List(Y, Branch.NONE, Value1.RS1, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VADC_VIM -> List(Y, Branch.NONE, Value1.UIMM19_15, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), @@ -202,6 +203,7 @@ object RvvDecode extends DecodeConstants { VMSBC_VXM -> List(Y, Branch.NONE, Value1.RS1, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VMSBC_VV -> List(Y, Branch.NONE, Value1.ZERO, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VMSBC_VX -> List(Y, Branch.NONE, Value1.RS1, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), + */ VAND_VV -> List(Y, Branch.NONE, Value1.ZERO, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VAND_VX -> List(Y, Branch.NONE, Value1.RS1, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), VAND_VI -> List(Y, Branch.NONE, Value1.UIMM19_15, Value2.ZERO, ARITHMETIC_FCN.NONE, N, N, WB_SEL.NONE, MEM_FCN.M_NONE, MEM_LEN.B, N, CSR_FCN.N, N, Y), diff --git a/src/main/scala/hajime/vectormodules/VectorDecoder.scala b/src/main/scala/hajime/vectormodules/VectorDecoder.scala index 6e4fd511..e635df04 100644 --- a/src/main/scala/hajime/vectormodules/VectorDecoder.scala +++ b/src/main/scala/hajime/vectormodules/VectorDecoder.scala @@ -101,6 +101,7 @@ object VDecode extends DecodeConstants with VectorOpConstants { VSUB_VX -> amogus("vsub", VSOURCE.VX), VRSUB_VX -> amogus("vrsub", VSOURCE.VX), VRSUB_VI -> amogus("vrsub", VSOURCE.VI), + /* VADC_VVM -> amogus("vadc", VSOURCE.VV), VADC_VXM -> amogus("vadc", VSOURCE.VX), VADC_VIM -> amogus("vadc", VSOURCE.VI), @@ -116,6 +117,7 @@ object VDecode extends DecodeConstants with VectorOpConstants { VMSBC_VXM -> amogus("vmsbc", VSOURCE.VX), VMSBC_VV -> amogus("vmsbc", VSOURCE.VV), VMSBC_VX -> amogus("vmsbc", VSOURCE.VX), + */ VAND_VV -> amogus("vand", VSOURCE.VV), VAND_VX -> amogus("vand", VSOURCE.VX), VAND_VI -> amogus("vand", VSOURCE.VI), diff --git a/src/test/scala/hajime/vectormodules/VectorCpuSpec.scala b/src/test/scala/hajime/vectormodules/VectorCpuSpec.scala index 2e211f5a..8ca99657 100644 --- a/src/test/scala/hajime/vectormodules/VectorCpuSpec.scala +++ b/src/test/scala/hajime/vectormodules/VectorCpuSpec.scala @@ -143,8 +143,7 @@ class Zve64xAppTestForVecCpu extends AnyFlatSpec with ChiselScalatestTester { val applicationTest = Seq( "vector_median" ) - val zve64xTestList: Seq[String] = (if(true) ldstTest else Nil) ++ (if(true) arithmeticTest else Nil) ++ - (if(true) applicationTest else Nil) + val zve64xTestList: Seq[String] = ldstTest ++ arithmeticTest ++ applicationTest for (e <- zve64xTestList) { it should s"Vector CPU execute $e" in { test(new Core_and_cache(useVector = true, cpu = classOf[VectorCpu])).withAnnotations(Seq(WriteVcdAnnotation, VerilatorBackendAnnotation)) { dut =>