Aligned decoration and its connection to Vulkan's Alignment Requirements

[nanokatze]

Vulkan describes constraints on how types may be laid out in memory, in section 15.6.4. Offset and Stride Assignment, but then seems to not say anything about Load and Store operations that specify a lower alignment. Indeed, it seems that the only rules mentioning Aligned decoration are

VUID-StandaloneSpirv-PhysicalStorageBuffer64-04708
If the PhysicalStorageBuffer64 addressing model is enabled, all instructions that support memory access operands and that use a physical pointer must include the Aligned operand

and

VUID-RuntimeSpirv-PhysicalStorageBuffer64-06315
If the PhysicalStorageBuffer64 addressing model is enabled the pointer value of a memory access instruction must be at least as aligned as specified by the Aligned memory access operand.

Moreover, emitting Loads and Stores of int32 with Aligned value of 1 seems not to trip the validator, though I haven't tested whether misaligned loads and stores actually happen to work or not.

Thus far it appears to me that this is hole in the specification, and it would be nice to see it clarified and validator fixed.

[johnkslang]

Regarding which specification, the SPIR-V specification says "Valid values are defined by the execution environment.", for the Aligned Memory Operand.

[nanokatze]

Yes, this is up to Vulkan specification to address (which is what the issue description talks about) but I wasn't sure whether the issue should be opened against this repo or Vulkan-Docs.