From 5989d9d61dc2856a2750d710d23031fcae04b026 Mon Sep 17 00:00:00 2001 From: TuxSH <1922548+TuxSH@users.noreply.github.com> Date: Thu, 10 Aug 2023 16:41:40 +0200 Subject: [PATCH] hbldr: fix DSPmem cacheability attrib regression --- sysmodules/loader/source/hbldr.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/sysmodules/loader/source/hbldr.c b/sysmodules/loader/source/hbldr.c index c1d9ccfea..0b87cb448 100644 --- a/sysmodules/loader/source/hbldr.c +++ b/sysmodules/loader/source/hbldr.c @@ -172,10 +172,10 @@ static const u32 kernelCaps[] = { 0xFC00022C, // Kernel release version 8.0 is necessary for using the new linear mapping. Modified below. - // Normal applications only have access to 0x1FF50000-0x1FF58000, 0x1FF70000-0x1FF78000, + // Normal applications only have access to 0x1FF50000-0x1FF58000, 0x1FF70000-0x1FF78000 (both as IO), // however we can load unsigned DSP firmware binaries. 0xFF81FF00, // RW static range mapping: 0x1FF00000 (DSP RAM, start) - 0xFF91FF80, // RW static range mapping: 0x1FF80000 (DSP RAM, end) + 0xFF81FF80, // RW static range mapping: 0x1FF80000 (DSP RAM, end) 0xFF91F000, // RO static range mapping: 0x1F000000 (VRAM, start) 0xFF91F600, // RO static range mapping: 0x1F600000 (VRAM, end)