diff --git a/cpu/samd21/include/periph_cpu.h b/cpu/samd21/include/periph_cpu.h index 8d306a8226b57..70a264373ae25 100644 --- a/cpu/samd21/include/periph_cpu.h +++ b/cpu/samd21/include/periph_cpu.h @@ -95,6 +95,9 @@ static inline int _sercom_id(SercomUsart *sercom) return ((((uint32_t)sercom) >> 10) & 0x7) - 2; } +/* these functions are documented in periph_cpu_common.h, but Doxygen + * is unable to connect the dots */ +#if !DOXYGEN static inline void sercom_apb_enable(sercom_t sercom) { PM->APBCMASK.reg |= (PM_APBCMASK_SERCOM0 << sercom); @@ -111,6 +114,7 @@ static inline void sercom_gclk_enable(sercom_t sercom, uint8_t gclk) (SERCOM0_GCLK_ID_CORE + sercom)); while (GCLK->STATUS.reg & GCLK_STATUS_SYNCBUSY) {} } +#endif /** * @brief Pins that can be used for ADC input diff --git a/cpu/samd5x/include/periph_cpu.h b/cpu/samd5x/include/periph_cpu.h index 0686a2b6e71b1..52ca606f7fdf0 100644 --- a/cpu/samd5x/include/periph_cpu.h +++ b/cpu/samd5x/include/periph_cpu.h @@ -296,6 +296,9 @@ struct sam0_aux_cfg_mapping { #define SAM0_SDHC1_PIN_SDCK GPIO_PIN(PA, 21) /**< Clock */ /** @} */ +/* these functions are documented in periph_cpu_common.h, but Doxygen + * is unable to connect the dots */ +#if !DOXYGEN static inline void sercom_apb_enable(sercom_t sercom) { if (sercom < 2) { @@ -326,6 +329,7 @@ static inline void sercom_gclk_enable(sercom_t sercom, uint8_t gclk) { GCLK->PCHCTRL[_sercom_gclk_id_core(sercom)].reg = (GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(gclk)); } +#endif #ifdef __cplusplus } diff --git a/cpu/saml1x/include/periph_cpu.h b/cpu/saml1x/include/periph_cpu.h index 8fcfa477f35f8..8208b70729f42 100644 --- a/cpu/saml1x/include/periph_cpu.h +++ b/cpu/saml1x/include/periph_cpu.h @@ -155,6 +155,9 @@ struct sam0_aux_cfg_mapping { uint32_t user_crc; /**< CRC of NVM User Row bits 223:64 (words 2…6) */ }; +/* these functions are documented in periph_cpu_common.h, but Doxygen + * is unable to connect the dots */ +#if !DOXYGEN static inline void sercom_apb_enable(sercom_t sercom) { MCLK->APBCMASK.reg |= (MCLK_APBCMASK_SERCOM0 << sercom); @@ -169,6 +172,7 @@ static inline void sercom_gclk_enable(sercom_t sercom, uint8_t gclk) { GCLK->PCHCTRL[SERCOM0_GCLK_ID_CORE + sercom].reg = (GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(gclk)); } +#endif #ifdef __cplusplus } diff --git a/cpu/saml21/include/periph_cpu.h b/cpu/saml21/include/periph_cpu.h index 56c22c578b126..d81ff05c567bf 100644 --- a/cpu/saml21/include/periph_cpu.h +++ b/cpu/saml21/include/periph_cpu.h @@ -169,6 +169,9 @@ struct sam0_aux_cfg_mapping { }; /** @} */ +/* these functions are documented in periph_cpu_common.h, but Doxygen + * is unable to connect the dots */ +#if !DOXYGEN static inline void sercom_apb_enable(sercom_t sercom) { if (sercom < 5) { @@ -198,6 +201,7 @@ static inline void sercom_gclk_enable(sercom_t sercom, uint8_t gclk) GCLK->PCHCTRL[SERCOM5_GCLK_ID_CORE].reg = (GCLK_PCHCTRL_CHEN | GCLK_PCHCTRL_GEN(gclk)); } } +#endif #ifdef __cplusplus }