Feature request: identify Pins facing the wrong way #215
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lukasc-ubc
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lukasc-ubc
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* wip #205 * Bump black in /klayout_dot_config/python/SiEPIC/tidy3d/requirements Bumps [black](https://github.com/psf/black) from 22.3.0 to 24.3.0. - [Release notes](https://github.com/psf/black/releases) - [Changelog](https://github.com/psf/black/blob/main/CHANGES.md) - [Commits](psf/black@22.3.0...24.3.0) --- updated-dependencies: - dependency-name: black dependency-type: direct:development ... Signed-off-by: dependabot[bot] <[email protected]> * Update extend.py * Update run-layout-tests.yml * Update run-layout-tests.yml * Fix number of periods not passing to CDC model * Fix OPICS loading contraDC element parameters simulation results are now appended to xml * opics fixes WIP * Update utils.py * Create pcell_python_GDSfactory2.lym * Update run-layout-tests.yml * Update run-layout-tests.yml * Component min spacing (#210) * minimum-gc-spacing implemented, from DFT.xml, using <minimum-gc-spacing>60</minimum-gc-spacing> * v0.5.7 * Update run-layout-tests.yml * Update docker-image.yml * verification: print error messages * Update Functional Layout Check.lym * verification fix Verification.xml wasn't being read for PDK installed via PyPi. * v0.5.8 * Update __init__.py * Update sampling.py `ptp` was removed from the ndarray class in NumPy 2.0. Use np.ptp(arr, ...) instead * v0.5.9 * Update Dockerfile (#213) * layout_waveguide2/3 update - docstring - parameter checking: CML - added option for drawing PinRec & DevRec layers in layout_waveguide3() * create_cell2 function Wrapper for KLayout's Layout.create_cell(name, library), with error handling, and debugging information if unsuccessful * strip2rib pcell function * make_pin: option for layer name * Create KLayout-SiEPIC-Tools Python Programming.ipynb * find_pins, hierarchical improvement (WIP) - allow for overlapping pins, in different cells. Look for exact pin match. Implemented in PinA. Needs to be done for PinB. @lukasc-ubc * cell.find_pin improvement * new load_layout function * new SiEPIC.utils.waveguide_length function * sliver fix #214 * verification: shapesoutside check, fix * v0.5.10 * fixes to SiEPIC.scripts.connect_pins_with_waveguide * netlist via Script, updated unit test * unit tests connect_pin_with_waveguide: relaxed_pinnames connect_pin_with_waveguide: for connecting between different cells, hierarchially. delete_extra_topcells find_automated_measurement_labels calculate_area * unit testing test all fixed and PCells. fixes to two cells. * unit testing, SiEPIC.utils SiEPIC.utils.load_layout SiEPIC.utils.create_cell2 SiEPIC.utils.waveguide_length * Pin verification #215 * Pin verification #215 (fix) * Update run-layout-tests.yml * Unit testing: SiEPIC.scripts.instantiate_all_library_cells: add terminators (#216) Improved unit testing, where we test all cells by connecting a terminator, and run verification. And other cell fixes necessary to get this to work. * Update run-layout-tests.yml * Jupyter notebook, Programming new functions, Cell.plot (show an image), Cell.show (show in KLayout) in SiEPIC.extend * Update extend.py * Update run-layout-tests.yml * minor errors * bezier bend, sbend, taper * Update __init__.py * bezier update * fix menu Layout > Show selected components * Update README.md * remove Radius check in Verification Disabled for EBeam PDK, since we now have S-Bends, and the checker doesn't recognize them. * simply loading PDK libraries * Update test_load_libraries.py * Update run-layout-tests.yml * Create python-publish.yml * update scripts.load_klayout_library * Update run-layout-tests.yml * v0.5.14 * Update python-publish.yml * benchmark 100 MZIs conclusion: faster than gdsfactory for generic (lightweight) technology * FaML function and tests - new PCell GSiP.FaML_Si_1550_BB, for a facet-attached micro-lens - new function SiEPIC.utils.layout.FaML_two() to create a facet-attached micro-lens array (two channels), with test labels - new layer BlackBox - new unit test for the function and PCell - fix WAVEGUIDES.xml, by adding DevRec layer to Strip waveguide * v0.5.15 * pytest update * SiEPIC.utils.geometry.box_bezier_corners (new) * Update .gitignore * Update scripts.py - SiEPIC.scripts.export_layout (): export cell rather than entire layout * Update layout.py FaML defaults * Update test_FaML.py * SiEPIC.scripts.load_klayout_library: abs path allow either relative path or absolute path as input * Create check-path-length.yml * Update layout.py * Update check-path-length.yml * fix for SiEPIC.scripts.replace_cell() * fix for SiEPIC.utils.layout.coupler_array() * version check @mustafacc I think it would be nice to add an automated check when SiEPIC-Tools (and also the PDKs) are loaded. This takes 0.2 s. I tried to use concurrent.futures, but it doesn't seem to speed things up. * remove temporary files * requirements * new: SiEPIC.scripts.layout_diff Compare the difference between layouts. Useful for blackbox replacement double-checking. * Update __init__.py * Update test_scripts_layout_diff.py * test SiEPIC.utils.layout.coupler_array() * v0.5.16 * unit tests, remove temporary files --------- Signed-off-by: dependabot[bot] <[email protected]> Co-authored-by: dependabot[bot] <49699333+dependabot[bot]@users.noreply.github.com> Co-authored-by: mustafacc <[email protected]> Co-authored-by: Sean Lam <[email protected]>
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Sometimes cells have the pins facing the wrong way in a component. The Pin should be pointing outwards. It would be nice to generate an error.
Solution:
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