From 8977332612655943b763d74591760e341fa2bd34 Mon Sep 17 00:00:00 2001 From: arthur Date: Fri, 27 Sep 2024 14:19:43 -0300 Subject: [PATCH 1/8] avoid overlapping buffer in level balancer Signed-off-by: arthur --- src/cts/src/LevelBalancer.cpp | 25 ++++++++++++++----------- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/src/cts/src/LevelBalancer.cpp b/src/cts/src/LevelBalancer.cpp index cb60fc25660..540841a6955 100644 --- a/src/cts/src/LevelBalancer.cpp +++ b/src/cts/src/LevelBalancer.cpp @@ -94,22 +94,25 @@ void LevelBalancer::addBufferLevels(TreeBuilder* builder, totalX += clockInstObj->getX(); totalY += clockInstObj->getY(); } + double height = builder->getBufferHeight() * wireSegmentUnit_; + double width = builder->getBufferWidth() * wireSegmentUnit_; + const double centroidX = totalX / cluster.size(); const double centroidY = totalY / cluster.size(); - const int driverX = prevLevelSubNet->getDriver()->getX(); - const int driverY = prevLevelSubNet->getDriver()->getY(); + int x = prevLevelSubNet->getDriver()->getX(); + int y = prevLevelSubNet->getDriver()->getY(); + + int steps = std::max((int)((centroidY - y) / height), 1); + int buffPerStep = std::ceil((float)bufLevels / (float)steps); for (unsigned level = 0; level < bufLevels; level++) { // Add buffer - double x - = (driverX - + (centroidX - driverX) * (double) (level + 1) / (bufLevels + 1)) - / wireSegmentUnit_; - double y - = (driverY - + (centroidY - driverY) * (double) (level + 1) / (bufLevels + 1)) - / wireSegmentUnit_; - Point bufferLoc(x, y); + if(level % buffPerStep) { + x = (x + width) ; + } else { + y = (y + height) ; + } + Point bufferLoc(x / wireSegmentUnit_, y / wireSegmentUnit_); Point legalBufferLoc = builder->legalizeOneBuffer(bufferLoc, options_->getSinkBuffer()); ClockInst& levelBuffer = builder->getClock().addClockBuffer( From 5a15c55e2da2e3e35c92d12a501c4976e7c4c1fc Mon Sep 17 00:00:00 2001 From: arthur Date: Fri, 27 Sep 2024 19:12:39 -0300 Subject: [PATCH 2/8] calng format Signed-off-by: arthur --- src/cts/src/LevelBalancer.cpp | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/cts/src/LevelBalancer.cpp b/src/cts/src/LevelBalancer.cpp index 540841a6955..7e513569c77 100644 --- a/src/cts/src/LevelBalancer.cpp +++ b/src/cts/src/LevelBalancer.cpp @@ -101,16 +101,16 @@ void LevelBalancer::addBufferLevels(TreeBuilder* builder, const double centroidY = totalY / cluster.size(); int x = prevLevelSubNet->getDriver()->getX(); int y = prevLevelSubNet->getDriver()->getY(); - - int steps = std::max((int)((centroidY - y) / height), 1); - int buffPerStep = std::ceil((float)bufLevels / (float)steps); + + int steps = std::max((int) ((centroidY - y) / height), 1); + int buffPerStep = std::ceil((float) bufLevels / (float) steps); for (unsigned level = 0; level < bufLevels; level++) { // Add buffer - if(level % buffPerStep) { - x = (x + width) ; + if (level % buffPerStep) { + x = (x + width); } else { - y = (y + height) ; + y = (y + height); } Point bufferLoc(x / wireSegmentUnit_, y / wireSegmentUnit_); Point legalBufferLoc From b59b0a54d53e6a2980f1c0adfe093666d58cb176 Mon Sep 17 00:00:00 2001 From: arthur Date: Fri, 27 Sep 2024 19:42:33 -0300 Subject: [PATCH 3/8] update direction to where the buffers go Signed-off-by: arthur --- src/cts/src/LevelBalancer.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/cts/src/LevelBalancer.cpp b/src/cts/src/LevelBalancer.cpp index 7e513569c77..7511df45617 100644 --- a/src/cts/src/LevelBalancer.cpp +++ b/src/cts/src/LevelBalancer.cpp @@ -94,15 +94,17 @@ void LevelBalancer::addBufferLevels(TreeBuilder* builder, totalX += clockInstObj->getX(); totalY += clockInstObj->getY(); } - double height = builder->getBufferHeight() * wireSegmentUnit_; - double width = builder->getBufferWidth() * wireSegmentUnit_; const double centroidX = totalX / cluster.size(); const double centroidY = totalY / cluster.size(); int x = prevLevelSubNet->getDriver()->getX(); int y = prevLevelSubNet->getDriver()->getY(); - int steps = std::max((int) ((centroidY - y) / height), 1); + int dir = (centroidY - y) / std::abs(centroidY - y); + double height = builder->getBufferHeight() * wireSegmentUnit_ * dir; + double width = builder->getBufferWidth() * wireSegmentUnit_ * dir; + + int steps = std::max((int) (std::abs((centroidY - y) / height)), 1); int buffPerStep = std::ceil((float) bufLevels / (float) steps); for (unsigned level = 0; level < bufLevels; level++) { From 5497643cb532a64f176d068dae93ac8b6c04fd56 Mon Sep 17 00:00:00 2001 From: arthur Date: Mon, 30 Sep 2024 15:43:38 -0300 Subject: [PATCH 4/8] updtae regression test Signed-off-by: arthur --- src/cts/test/balance_levels.defok | 96 +++++++++++++++---------------- src/cts/test/balance_levels.ok | 2 +- 2 files changed, 49 insertions(+), 49 deletions(-) diff --git a/src/cts/test/balance_levels.defok b/src/cts/test/balance_levels.defok index 37dd5644672..0b1370056f7 100644 --- a/src/cts/test/balance_levels.defok +++ b/src/cts/test/balance_levels.defok @@ -40,54 +40,54 @@ COMPONENTS 413 ; - clkbuf_4_8__f_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 141948 26508 ) N ; - clkbuf_4_9__f_CELL\/clk2 CLKBUF_X3 + SOURCE TIMING + PLACED ( 135237 124256 ) N ; - clkbuf_4_9__f_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 135237 35368 ) N ; - - clkbuf_level_0_1_1027_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 133484 35513 ) N ; - - clkbuf_level_0_1_10_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 36329 22762 ) N ; - - clkbuf_level_0_1_1130_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 170571 22017 ) N ; - - clkbuf_level_0_1_1233_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 179381 31532 ) N ; - - clkbuf_level_0_1_1336_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 134033 58567 ) N ; - - clkbuf_level_0_1_1439_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 136203 73072 ) N ; - - clkbuf_level_0_1_1542_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 177253 58502 ) N ; - - clkbuf_level_0_1_1645_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175553 72615 ) N ; - - clkbuf_level_0_1_23_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 27455 30225 ) N ; - - clkbuf_level_0_1_36_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 66780 23660 ) N ; - - clkbuf_level_0_1_49_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 72971 35513 ) N ; - - clkbuf_level_0_1_512_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 30235 60113 ) N ; - - clkbuf_level_0_1_615_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 31658 77098 ) N ; - - clkbuf_level_0_1_718_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 70393 59940 ) N ; - - clkbuf_level_0_1_821_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 68117 75839 ) N ; - - clkbuf_level_0_1_924_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 139675 23660 ) N ; - - clkbuf_level_1_1_1028_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 131732 35659 ) N ; - - clkbuf_level_1_1_1131_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 171668 19585 ) N ; - - clkbuf_level_1_1_11_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 35613 21140 ) N ; - - clkbuf_level_1_1_1234_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 181774 31102 ) N ; - - clkbuf_level_1_1_1337_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 132612 57767 ) N ; - - clkbuf_level_1_1_1440_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 134807 74545 ) N ; - - clkbuf_level_1_1_1543_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 178768 57665 ) N ; - - clkbuf_level_1_1_1646_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 177165 74128 ) N ; - - clkbuf_level_1_1_24_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 24524 29407 ) N ; - - clkbuf_level_1_1_37_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 69053 20813 ) N ; - - clkbuf_level_1_1_410_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 74723 35659 ) N ; - - clkbuf_level_1_1_513_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 28640 59003 ) N ; - - clkbuf_level_1_1_616_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 29589 79586 ) N ; - - clkbuf_level_1_1_719_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 72079 58888 ) N ; - - clkbuf_level_1_1_822_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 69636 77821 ) N ; - - clkbuf_level_1_1_925_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 137402 20813 ) N ; - - clkbuf_level_2_1_1029_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 129980 35805 ) N ; - - clkbuf_level_2_1_1132_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 172765 17153 ) N ; - - clkbuf_level_2_1_1235_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 184167 30671 ) N ; - - clkbuf_level_2_1_12_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 34897 19518 ) N ; - - clkbuf_level_2_1_1338_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 131192 56967 ) N ; - - clkbuf_level_2_1_1441_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 133411 76018 ) N ; - - clkbuf_level_2_1_1544_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 180283 56828 ) N ; - - clkbuf_level_2_1_1647_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 178776 75641 ) N ; - - clkbuf_level_2_1_25_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 21592 28590 ) N ; - - clkbuf_level_2_1_38_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 71326 17965 ) N ; - - clkbuf_level_2_1_411_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 76476 35805 ) N ; - - clkbuf_level_2_1_514_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 27046 57894 ) N ; - - clkbuf_level_2_1_617_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 27520 82074 ) N ; - - clkbuf_level_2_1_720_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 73765 57836 ) N ; - - clkbuf_level_2_1_823_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 71154 79802 ) N ; - - clkbuf_level_2_1_926_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 135130 17965 ) N ; + - clkbuf_level_0_1_1027_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 135237 38168 ) N ; + - clkbuf_level_0_1_10_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 37046 21585 ) N ; + - clkbuf_level_0_1_1130_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 169474 21649 ) N ; + - clkbuf_level_0_1_1233_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 176988 29163 ) N ; + - clkbuf_level_0_1_1336_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 135454 56567 ) N ; + - clkbuf_level_0_1_1439_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 137599 74399 ) N ; + - clkbuf_level_0_1_1542_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175738 56539 ) N ; + - clkbuf_level_0_1_1645_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 173942 73902 ) N ; + - clkbuf_level_0_1_23_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 30387 28243 ) N ; + - clkbuf_level_0_1_36_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 64508 23708 ) N ; + - clkbuf_level_0_1_49_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 71219 38168 ) N ; + - clkbuf_level_0_1_512_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 31830 58423 ) N ; + - clkbuf_level_0_1_615_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 33728 77410 ) N ; + - clkbuf_level_0_1_718_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 68707 58192 ) N ; + - clkbuf_level_0_1_821_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 66599 76658 ) N ; + - clkbuf_level_0_1_924_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 141948 23708 ) N ; + - clkbuf_level_1_1_1028_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 137137 38168 ) N ; + - clkbuf_level_1_1_1131_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 169474 18849 ) N ; + - clkbuf_level_1_1_11_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 35146 21585 ) N ; + - clkbuf_level_1_1_1234_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175088 29163 ) N ; + - clkbuf_level_1_1_1337_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 133554 56567 ) N ; + - clkbuf_level_1_1_1440_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 139499 74399 ) N ; + - clkbuf_level_1_1_1543_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 173838 56539 ) N ; + - clkbuf_level_1_1_1646_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175842 73902 ) N ; + - clkbuf_level_1_1_24_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 28487 28243 ) N ; + - clkbuf_level_1_1_37_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 64508 20908 ) N ; + - clkbuf_level_1_1_410_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 73119 38168 ) N ; + - clkbuf_level_1_1_513_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 29930 58423 ) N ; + - clkbuf_level_1_1_616_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 33728 80210 ) N ; + - clkbuf_level_1_1_719_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 66807 58192 ) N ; + - clkbuf_level_1_1_822_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 68499 76658 ) N ; + - clkbuf_level_1_1_925_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 141948 20908 ) N ; + - clkbuf_level_2_1_1029_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 139037 38168 ) N ; + - clkbuf_level_2_1_1132_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 169474 16049 ) N ; + - clkbuf_level_2_1_1235_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 173188 29163 ) N ; + - clkbuf_level_2_1_12_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 35146 18785 ) N ; + - clkbuf_level_2_1_1338_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 131654 56567 ) N ; + - clkbuf_level_2_1_1441_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 139499 77199 ) N ; + - clkbuf_level_2_1_1544_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 171938 56539 ) N ; + - clkbuf_level_2_1_1647_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175842 76702 ) N ; + - clkbuf_level_2_1_25_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 26587 28243 ) N ; + - clkbuf_level_2_1_38_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 64508 18108 ) N ; + - clkbuf_level_2_1_411_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 75019 38168 ) N ; + - clkbuf_level_2_1_514_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 28030 58423 ) N ; + - clkbuf_level_2_1_617_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 33728 83010 ) N ; + - clkbuf_level_2_1_720_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 64907 58192 ) N ; + - clkbuf_level_2_1_823_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 68499 79458 ) N ; + - clkbuf_level_2_1_926_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 141948 18108 ) N ; - clkload0 CLKBUF_X3 + SOURCE TIMING + PLACED ( 37046 24385 ) N ; - clkload1 CLKBUF_X3 + SOURCE TIMING + PLACED ( 30387 31043 ) N ; - clkload10 CLKBUF_X3 + SOURCE TIMING + PLACED ( 176988 31963 ) N ; diff --git a/src/cts/test/balance_levels.ok b/src/cts/test/balance_levels.ok index db4d578ee6c..7857247c601 100644 --- a/src/cts/test/balance_levels.ok +++ b/src/cts/test/balance_levels.ok @@ -94,7 +94,7 @@ Fixing from level 2 (parent=0 + current=2) to max 5 for driver clk [INFO CTS-0098] Clock net "clk" [INFO CTS-0099] Sinks 151 [INFO CTS-0100] Leaf buffers 0 -[INFO CTS-0101] Average sink wire length 125.08 um +[INFO CTS-0101] Average sink wire length 125.43 um [INFO CTS-0102] Path depth 2 - 5 [INFO CTS-0207] Leaf load cells 30 [INFO CTS-0098] Clock net "CELL\/clk2" From b5187f27a795c317e556ceedd820e9e707ffb250 Mon Sep 17 00:00:00 2001 From: arthur Date: Fri, 4 Oct 2024 13:17:53 -0300 Subject: [PATCH 5/8] remove unused variable Signed-off-by: arthur --- src/cts/src/LevelBalancer.cpp | 1 - 1 file changed, 1 deletion(-) diff --git a/src/cts/src/LevelBalancer.cpp b/src/cts/src/LevelBalancer.cpp index 7511df45617..d466933f970 100644 --- a/src/cts/src/LevelBalancer.cpp +++ b/src/cts/src/LevelBalancer.cpp @@ -95,7 +95,6 @@ void LevelBalancer::addBufferLevels(TreeBuilder* builder, totalY += clockInstObj->getY(); } - const double centroidX = totalX / cluster.size(); const double centroidY = totalY / cluster.size(); int x = prevLevelSubNet->getDriver()->getX(); int y = prevLevelSubNet->getDriver()->getY(); From 70910add8d6fd1b14f587a0e006c41e544f4cc85 Mon Sep 17 00:00:00 2001 From: arthur Date: Fri, 4 Oct 2024 15:41:37 -0300 Subject: [PATCH 6/8] add const to varibles Signed-off-by: arthur --- src/cts/src/LevelBalancer.cpp | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/src/cts/src/LevelBalancer.cpp b/src/cts/src/LevelBalancer.cpp index d466933f970..be09683fd13 100644 --- a/src/cts/src/LevelBalancer.cpp +++ b/src/cts/src/LevelBalancer.cpp @@ -99,19 +99,19 @@ void LevelBalancer::addBufferLevels(TreeBuilder* builder, int x = prevLevelSubNet->getDriver()->getX(); int y = prevLevelSubNet->getDriver()->getY(); - int dir = (centroidY - y) / std::abs(centroidY - y); - double height = builder->getBufferHeight() * wireSegmentUnit_ * dir; - double width = builder->getBufferWidth() * wireSegmentUnit_ * dir; + const int dir = (centroidY - y) / std::abs(centroidY - y); + const double height = builder->getBufferHeight() * wireSegmentUnit_ * dir; + const double width = builder->getBufferWidth() * wireSegmentUnit_ * dir; - int steps = std::max((int) (std::abs((centroidY - y) / height)), 1); - int buffPerStep = std::ceil((float) bufLevels / (float) steps); + const int steps = std::max((int) (std::abs((centroidY - y) / height)), 1); + const int buffPerStep = std::ceil((float) bufLevels / (float) steps); for (unsigned level = 0; level < bufLevels; level++) { // Add buffer if (level % buffPerStep) { - x = (x + width); + x += width; } else { - y = (y + height); + y += height; } Point bufferLoc(x / wireSegmentUnit_, y / wireSegmentUnit_); Point legalBufferLoc From ef722189de4ab7d0015f20fedbc12d3b39908d24 Mon Sep 17 00:00:00 2001 From: arthur Date: Fri, 4 Oct 2024 15:42:28 -0300 Subject: [PATCH 7/8] uso correct direction for centroid X Signed-off-by: arthur --- src/cts/src/LevelBalancer.cpp | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/src/cts/src/LevelBalancer.cpp b/src/cts/src/LevelBalancer.cpp index be09683fd13..75244118179 100644 --- a/src/cts/src/LevelBalancer.cpp +++ b/src/cts/src/LevelBalancer.cpp @@ -96,12 +96,14 @@ void LevelBalancer::addBufferLevels(TreeBuilder* builder, } const double centroidY = totalY / cluster.size(); + const double centroidX = totalX / cluster.size(); int x = prevLevelSubNet->getDriver()->getX(); int y = prevLevelSubNet->getDriver()->getY(); - const int dir = (centroidY - y) / std::abs(centroidY - y); - const double height = builder->getBufferHeight() * wireSegmentUnit_ * dir; - const double width = builder->getBufferWidth() * wireSegmentUnit_ * dir; + const int y_dir = (centroidY - y) / std::abs(centroidY - y); + const int x_dir = (centroidX - x) / std::abs(centroidX - x); + const double height = builder->getBufferHeight() * wireSegmentUnit_ * y_dir; + const double width = builder->getBufferWidth() * wireSegmentUnit_ * x_dir; const int steps = std::max((int) (std::abs((centroidY - y) / height)), 1); const int buffPerStep = std::ceil((float) bufLevels / (float) steps); From 378a04cdf7ca0613b5f134b87ba1d2bf1d8b7fb9 Mon Sep 17 00:00:00 2001 From: arthur Date: Fri, 4 Oct 2024 16:33:10 -0300 Subject: [PATCH 8/8] update ok files Signed-off-by: arthur --- src/cts/test/balance_levels.defok | 20 ++++++++++---------- src/cts/test/balance_levels.ok | 2 +- 2 files changed, 11 insertions(+), 11 deletions(-) diff --git a/src/cts/test/balance_levels.defok b/src/cts/test/balance_levels.defok index 0b1370056f7..f9dd935dd26 100644 --- a/src/cts/test/balance_levels.defok +++ b/src/cts/test/balance_levels.defok @@ -56,36 +56,36 @@ COMPONENTS 413 ; - clkbuf_level_0_1_718_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 68707 58192 ) N ; - clkbuf_level_0_1_821_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 66599 76658 ) N ; - clkbuf_level_0_1_924_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 141948 23708 ) N ; - - clkbuf_level_1_1_1028_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 137137 38168 ) N ; + - clkbuf_level_1_1_1028_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 133337 38168 ) N ; - clkbuf_level_1_1_1131_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 169474 18849 ) N ; - clkbuf_level_1_1_11_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 35146 21585 ) N ; - - clkbuf_level_1_1_1234_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175088 29163 ) N ; + - clkbuf_level_1_1_1234_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 178888 29163 ) N ; - clkbuf_level_1_1_1337_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 133554 56567 ) N ; - - clkbuf_level_1_1_1440_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 139499 74399 ) N ; - - clkbuf_level_1_1_1543_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 173838 56539 ) N ; + - clkbuf_level_1_1_1440_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 135699 74399 ) N ; + - clkbuf_level_1_1_1543_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 177638 56539 ) N ; - clkbuf_level_1_1_1646_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175842 73902 ) N ; - clkbuf_level_1_1_24_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 28487 28243 ) N ; - clkbuf_level_1_1_37_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 64508 20908 ) N ; - clkbuf_level_1_1_410_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 73119 38168 ) N ; - clkbuf_level_1_1_513_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 29930 58423 ) N ; - clkbuf_level_1_1_616_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 33728 80210 ) N ; - - clkbuf_level_1_1_719_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 66807 58192 ) N ; + - clkbuf_level_1_1_719_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 70607 58192 ) N ; - clkbuf_level_1_1_822_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 68499 76658 ) N ; - clkbuf_level_1_1_925_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 141948 20908 ) N ; - - clkbuf_level_2_1_1029_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 139037 38168 ) N ; + - clkbuf_level_2_1_1029_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 131437 38168 ) N ; - clkbuf_level_2_1_1132_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 169474 16049 ) N ; - - clkbuf_level_2_1_1235_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 173188 29163 ) N ; + - clkbuf_level_2_1_1235_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 180788 29163 ) N ; - clkbuf_level_2_1_12_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 35146 18785 ) N ; - clkbuf_level_2_1_1338_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 131654 56567 ) N ; - - clkbuf_level_2_1_1441_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 139499 77199 ) N ; - - clkbuf_level_2_1_1544_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 171938 56539 ) N ; + - clkbuf_level_2_1_1441_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 135699 77199 ) N ; + - clkbuf_level_2_1_1544_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 179538 56539 ) N ; - clkbuf_level_2_1_1647_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 175842 76702 ) N ; - clkbuf_level_2_1_25_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 26587 28243 ) N ; - clkbuf_level_2_1_38_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 64508 18108 ) N ; - clkbuf_level_2_1_411_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 75019 38168 ) N ; - clkbuf_level_2_1_514_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 28030 58423 ) N ; - clkbuf_level_2_1_617_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 33728 83010 ) N ; - - clkbuf_level_2_1_720_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 64907 58192 ) N ; + - clkbuf_level_2_1_720_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 72507 58192 ) N ; - clkbuf_level_2_1_823_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 68499 79458 ) N ; - clkbuf_level_2_1_926_clk CLKBUF_X3 + SOURCE TIMING + PLACED ( 141948 18108 ) N ; - clkload0 CLKBUF_X3 + SOURCE TIMING + PLACED ( 37046 24385 ) N ; diff --git a/src/cts/test/balance_levels.ok b/src/cts/test/balance_levels.ok index 7857247c601..742865d2111 100644 --- a/src/cts/test/balance_levels.ok +++ b/src/cts/test/balance_levels.ok @@ -94,7 +94,7 @@ Fixing from level 2 (parent=0 + current=2) to max 5 for driver clk [INFO CTS-0098] Clock net "clk" [INFO CTS-0099] Sinks 151 [INFO CTS-0100] Leaf buffers 0 -[INFO CTS-0101] Average sink wire length 125.43 um +[INFO CTS-0101] Average sink wire length 125.01 um [INFO CTS-0102] Path depth 2 - 5 [INFO CTS-0207] Leaf load cells 30 [INFO CTS-0098] Clock net "CELL\/clk2"