From 4e1717d5b3f5437a53bb5201104f90b17a7d07bd Mon Sep 17 00:00:00 2001 From: Alex Cockrean <84676155+ABenC377@users.noreply.github.com> Date: Mon, 9 Dec 2024 16:53:42 +0000 Subject: [PATCH] clang format --- src/include/simeng/Instruction.hh | 2 +- src/include/simeng/arch/ArchInfo.hh | 2 +- src/include/simeng/arch/Architecture.hh | 4 +- .../simeng/branchpredictors/BranchHistory.hh | 8 ++-- .../branchpredictors/BranchPredictor.hh | 2 +- .../simeng/branchpredictors/TagePredictor.hh | 13 +++--- src/include/simeng/config/ExpectationNode.hh | 4 +- src/include/simeng/pipeline/PortAllocator.hh | 2 +- src/lib/branchpredictors/TagePredictor.cc | 41 ++++++++----------- src/lib/config/ModelConfig.cc | 19 +++++---- src/lib/models/inorder/Core.cc | 6 ++- test/integration/ConfigTest.cc | 8 +--- test/regression/aarch64/instructions/neon.cc | 2 +- test/unit/aarch64/AuxiliaryFunctionsTest.cc | 27 ++++++------ test/unit/pipeline/FetchUnitTest.cc | 3 +- 15 files changed, 70 insertions(+), 73 deletions(-) diff --git a/src/include/simeng/Instruction.hh b/src/include/simeng/Instruction.hh index b5a4e33e3b..5004942539 100644 --- a/src/include/simeng/Instruction.hh +++ b/src/include/simeng/Instruction.hh @@ -29,7 +29,7 @@ struct ExecutionInfo { * Each supported ISA should provide a derived implementation of this class. */ class Instruction { public: - virtual ~Instruction(){}; + virtual ~Instruction() {}; /** Retrieve the source registers this instruction reads. */ virtual const span getSourceRegisters() const = 0; diff --git a/src/include/simeng/arch/ArchInfo.hh b/src/include/simeng/arch/ArchInfo.hh index e029699c07..eed7055cf7 100644 --- a/src/include/simeng/arch/ArchInfo.hh +++ b/src/include/simeng/arch/ArchInfo.hh @@ -12,7 +12,7 @@ namespace arch { /** A class to hold and generate architecture specific configuration options. */ class ArchInfo { public: - virtual ~ArchInfo(){}; + virtual ~ArchInfo() {}; /** Get the set of system register enums currently supported. */ virtual const std::vector& getSysRegEnums() const = 0; diff --git a/src/include/simeng/arch/Architecture.hh b/src/include/simeng/arch/Architecture.hh index aa293d6f5f..b4e6ac6001 100644 --- a/src/include/simeng/arch/Architecture.hh +++ b/src/include/simeng/arch/Architecture.hh @@ -30,7 +30,7 @@ struct ExceptionResult { * cycle until complete. */ class ExceptionHandler { public: - virtual ~ExceptionHandler(){}; + virtual ~ExceptionHandler() {}; /** Tick the exception handler to progress handling of the exception. Should * return `false` if the exception requires further handling, or `true` once * complete. */ @@ -46,7 +46,7 @@ class Architecture { public: Architecture(kernel::Linux& kernel) : linux_(kernel) {} - virtual ~Architecture(){}; + virtual ~Architecture() {}; /** Attempt to pre-decode from `bytesAvailable` bytes of instruction memory. * Writes into the supplied macro-op vector, and returns the number of bytes diff --git a/src/include/simeng/branchpredictors/BranchHistory.hh b/src/include/simeng/branchpredictors/BranchHistory.hh index 04d4d7e08c..2106676669 100644 --- a/src/include/simeng/branchpredictors/BranchHistory.hh +++ b/src/include/simeng/branchpredictors/BranchHistory.hh @@ -24,7 +24,8 @@ class BranchHistory { * integer. */ uint64_t getHistory(uint8_t numBits) { assert(numBits <= 64 && "Cannot get more than 64 bits without rolling"); - assert(numBits <= size_ && "Cannot get more bits of branch history than " + assert(numBits <= size_ && + "Cannot get more bits of branch history than " "the size of the history"); return (history_[0] & ((1 << numBits) - 1)); } @@ -33,7 +34,8 @@ class BranchHistory { * value of size 'length'. The global history is folded by taking an * XOR hash with the overflowing bits to get an output of 'length' bits. */ uint64_t getFolded(uint8_t numBits, uint8_t length) { - assert(numBits <= size_ && "Cannot get more bits of branch history than " + assert(numBits <= size_ && + "Cannot get more bits of branch history than " "the size of the history"); uint64_t output = 0; @@ -105,4 +107,4 @@ class BranchHistory { std::vector history_; }; -} \ No newline at end of file +} // namespace simeng \ No newline at end of file diff --git a/src/include/simeng/branchpredictors/BranchPredictor.hh b/src/include/simeng/branchpredictors/BranchPredictor.hh index 7779fe0703..d1cf1eeec3 100644 --- a/src/include/simeng/branchpredictors/BranchPredictor.hh +++ b/src/include/simeng/branchpredictors/BranchPredictor.hh @@ -12,7 +12,7 @@ namespace simeng { /** An abstract branch predictor interface. */ class BranchPredictor { public: - virtual ~BranchPredictor(){}; + virtual ~BranchPredictor() {}; /** Generate a branch prediction for the supplied instruction address, a * branch type, and a known branch offset. Returns a branch direction and diff --git a/src/include/simeng/branchpredictors/TagePredictor.hh b/src/include/simeng/branchpredictors/TagePredictor.hh index 2afaa0f7d7..1b52f44173 100644 --- a/src/include/simeng/branchpredictors/TagePredictor.hh +++ b/src/include/simeng/branchpredictors/TagePredictor.hh @@ -1,13 +1,13 @@ #pragma once +#include #include #include #include #include -#include -#include "simeng/branchpredictors/BranchPredictor.hh" #include "simeng/branchpredictors/BranchHistory.hh" +#include "simeng/branchpredictors/BranchPredictor.hh" #include "simeng/config/SimInfo.hh" namespace simeng { @@ -17,7 +17,7 @@ namespace simeng { struct TageEntry { uint8_t satCnt; uint64_t tag; - uint8_t u; // usefulness counter + uint8_t u; // usefulness counter uint64_t target; }; @@ -86,8 +86,7 @@ class TagePredictor : public BranchPredictor { * alternative prediction. This prediction info is determined from the * tagged tables for a branch with the provided address. */ void getTaggedPrediction(uint64_t address, BranchPrediction* prediction, - BranchPrediction* altPrediction, - uint8_t* predTable, + BranchPrediction* altPrediction, uint8_t* predTable, std::vector* indices, std::vector* tags); @@ -96,8 +95,8 @@ class TagePredictor : public BranchPredictor { uint64_t getTaggedIndex(uint64_t address, uint8_t table); /** Returns a hash of the address and the global history that is then trimmed - * to the appropriate tag length. The tag varies depending on the table - * that is being accessed. */ + * to the appropriate tag length. The tag varies depending on the table + * that is being accessed. */ uint64_t getTag(uint64_t address, uint8_t table); /** Updates the default, untagged prediction table on the basis of the diff --git a/src/include/simeng/config/ExpectationNode.hh b/src/include/simeng/config/ExpectationNode.hh index 187d3ed37a..cbf59d5750 100644 --- a/src/include/simeng/config/ExpectationNode.hh +++ b/src/include/simeng/config/ExpectationNode.hh @@ -134,9 +134,9 @@ class ExpectationNode { /** Default constructor. Used primarily to provide a root node for populated * ExpectationNode instances to be added to. */ - ExpectationNode(){}; + ExpectationNode() {}; - ~ExpectationNode(){}; + ~ExpectationNode() {}; /** A getter function to retrieve the key of a node. */ std::string getKey() const { return nodeKey_; } diff --git a/src/include/simeng/pipeline/PortAllocator.hh b/src/include/simeng/pipeline/PortAllocator.hh index 78e3a0c5c9..bd566702ae 100644 --- a/src/include/simeng/pipeline/PortAllocator.hh +++ b/src/include/simeng/pipeline/PortAllocator.hh @@ -16,7 +16,7 @@ const uint8_t OPTIONAL = 1; /** An abstract execution port allocator interface. */ class PortAllocator { public: - virtual ~PortAllocator(){}; + virtual ~PortAllocator() {}; /** Allocate a port for the specified instruction group; returns the allocated * port. */ diff --git a/src/lib/branchpredictors/TagePredictor.cc b/src/lib/branchpredictors/TagePredictor.cc index bdc7c43241..dcfe1a5050 100644 --- a/src/lib/branchpredictors/TagePredictor.cc +++ b/src/lib/branchpredictors/TagePredictor.cc @@ -14,18 +14,18 @@ TagePredictor::TagePredictor(ryml::ConstNodeRef config) config["Branch-Predictor"]["Global-History-Length"].as()), rasSize_(config["Branch-Predictor"]["RAS-entries"].as()), globalHistory_(1 << (numTageTables_ + 1)), - tagLength_(config["Branch-Predictor"]["Tag-Length"].as()) - { + tagLength_(config["Branch-Predictor"]["Tag-Length"].as()) { // Calculate the saturation counter boundary between weakly taken and // not-taken. `(2 ^ num_sat_cnt_bits) / 2` gives the weakly taken state // value uint8_t weaklyTaken = (uint8_t)1 << (satCntBits_ - 1); uint8_t satCntVal = (config["Branch-Predictor"]["Fallback-Static-Predictor"] .as() == "Always-Taken") - ? weaklyTaken : (weaklyTaken - 1); + ? weaklyTaken + : (weaklyTaken - 1); // Create branch prediction structures - btb_ = std::vector>( - (uint8_t)1 << btbBits_, {satCntVal, 0}); + btb_ = std::vector>((uint8_t)1 << btbBits_, + {satCntVal, 0}); // Set up Tagged tables for (uint32_t i = 0; i < numTageTables_; i++) { @@ -96,8 +96,8 @@ BranchPrediction TagePredictor::predict(uint64_t address, BranchType type, } void TagePredictor::update(uint64_t address, bool isTaken, - uint64_t targetAddress, - simeng::BranchType type, uint64_t instructionId) { + uint64_t targetAddress, simeng::BranchType type, + uint64_t instructionId) { // Make sure that this function is called in program order; and then update // the lastUpdatedInstructionId variable assert(instructionId >= lastUpdatedInstructionId && @@ -148,7 +148,6 @@ void TagePredictor::flush(uint64_t address) { // Roll back global history globalHistory_.rollBack(); - } void TagePredictor::getTaggedPrediction(uint64_t address, @@ -194,20 +193,19 @@ BranchPrediction TagePredictor::getBtbPrediction(uint64_t address) { uint64_t TagePredictor::getTaggedIndex(uint64_t address, uint8_t table) { // Hash function here is pretty arbitrary. uint64_t h1 = (address >> 2); - uint64_t h2 = globalHistory_.getFolded(1 << (table + 1), - (1 << tageTableBits_) - 1); + uint64_t h2 = + globalHistory_.getFolded(1 << (table + 1), (1 << tageTableBits_) - 1); return (h1 ^ h2) & ((1 << tageTableBits_) - 1); } uint64_t TagePredictor::getTag(uint64_t address, uint8_t table) { // Hash function here is pretty arbitrary. uint64_t h1 = address; - uint64_t h2 = globalHistory_.getFolded((1ull << table), - ((1ull << tagLength_) - 1)); + uint64_t h2 = + globalHistory_.getFolded((1ull << table), ((1ull << tagLength_) - 1)); return (h1 ^ h2) & ((1ull << tagLength_) - 1); } - void TagePredictor::updateBtb(uint64_t address, bool isTaken, uint64_t targetAddress) { // Calculate 2-bit saturating counter value @@ -226,9 +224,7 @@ void TagePredictor::updateBtb(uint64_t address, bool isTaken, } } - -void TagePredictor::updateTaggedTables(bool isTaken, - uint64_t target) { +void TagePredictor::updateTaggedTables(bool isTaken, uint64_t target) { // Get stored information from the FTQ uint8_t predTable = ftq_.front().predTable; std::vector indices = ftq_.front().indices; @@ -236,7 +232,6 @@ void TagePredictor::updateTaggedTables(bool isTaken, BranchPrediction pred = ftq_.front().prediction; BranchPrediction altPred = ftq_.front().altPrediction; - // Update the prediction counter uint64_t predIndex = indices[predTable]; if (isTaken && (tageTables_[predTable][predIndex].satCnt < 3)) { @@ -252,9 +247,9 @@ void TagePredictor::updateTaggedTables(bool isTaken, bool allocated = false; for (uint8_t table = predTable + 1; table < numTageTables_; table++) { if (!allocated && (tageTables_[table][indices[table]].u <= 1)) { - tageTables_[table][indices[table]] = {((isTaken) ? (uint8_t)2 : - (uint8_t)1), - tags[table], (uint8_t)2, target}; + tageTables_[table][indices[table]] = { + ((isTaken) ? (uint8_t)2 : (uint8_t)1), tags[table], (uint8_t)2, + target}; allocated = true; } } @@ -267,11 +262,11 @@ void TagePredictor::updateTaggedTables(bool isTaken, uint8_t currentU = tageTables_[predTable][indices[predTable]].u; if (wasUseful && currentU < 3) { (tageTables_[predTable][indices[predTable]].u)++; - } if (!wasUseful && currentU > 0) { + } + if (!wasUseful && currentU > 0) { (tageTables_[predTable][indices[predTable]].u)--; } - } } -} // namespace simeng \ No newline at end of file +} // namespace simeng \ No newline at end of file diff --git a/src/lib/config/ModelConfig.cc b/src/lib/config/ModelConfig.cc index 1708b3e1f0..d6f2732b45 100644 --- a/src/lib/config/ModelConfig.cc +++ b/src/lib/config/ModelConfig.cc @@ -531,8 +531,9 @@ void ModelConfig::setExpectations(bool isDefault) { // associated YAML node if (configTree_["Branch-Predictor"].has_child(ryml::to_csubstr("Type"))) { if ((configTree_["Branch-Predictor"]["Type"].as() == - "Generic") || (configTree_["Branch-Predictor"]["Type"] - .as() == "Tage")) { + "Generic") || + (configTree_["Branch-Predictor"]["Type"].as() == + "Tage")) { expectations_["Branch-Predictor"].addChild( ExpectationNode::createExpectation( 2, "Saturating-Count-Bits")); @@ -546,17 +547,17 @@ void ModelConfig::setExpectations(bool isDefault) { .setValueSet( std::vector{"Always-Taken", "Always-Not-Taken"}); } - if ((configTree_["Branch-Predictor"]["Type"].as() - == "Tage")) { + if ((configTree_["Branch-Predictor"]["Type"].as() == + "Tage")) { expectations_["Branch-Predictor"].addChild( - ExpectationNode::createExpectation( - 12, "Tage-Table-Bits")); + ExpectationNode::createExpectation(12, + "Tage-Table-Bits")); expectations_["Branch-Predictor"]["Tage-Table-Bits"] - .setValueBounds(1, UINT8_MAX); + .setValueBounds(1, UINT8_MAX); expectations_["Branch-Predictor"].addChild( - ExpectationNode::createExpectation( - 6, "Num-Tage-Tables")); + ExpectationNode::createExpectation(6, + "Num-Tage-Tables")); expectations_["Branch-Predictor"]["Num-Tage-Tables"] .setValueBounds(1, UINT8_MAX); diff --git a/src/lib/models/inorder/Core.cc b/src/lib/models/inorder/Core.cc index 4df754a60d..53ea8ec61c 100644 --- a/src/lib/models/inorder/Core.cc +++ b/src/lib/models/inorder/Core.cc @@ -148,8 +148,10 @@ std::map Core::getStats() const { ipcStr << std::setprecision(2) << ipc; return { - {"cycles", std::to_string(ticks_)}, {"retired", std::to_string(retired)}, - {"ipc", ipcStr.str()}, {"flushes", std::to_string(flushes_)}, + {"cycles", std::to_string(ticks_)}, + {"retired", std::to_string(retired)}, + {"ipc", ipcStr.str()}, + {"flushes", std::to_string(flushes_)}, }; } diff --git a/test/integration/ConfigTest.cc b/test/integration/ConfigTest.cc index 12c295d2d4..bd2c64382f 100644 --- a/test/integration/ConfigTest.cc +++ b/test/integration/ConfigTest.cc @@ -300,9 +300,7 @@ TEST(ConfigTest, invalidTypeOnSetBounds) { simeng::config::ExpectationNode::createExpectation("DEFAULT", "CHILD")); ASSERT_DEATH( - { - expectations["HEAD"]["CHILD"].setValueSet({0, 1, 2}); - }, + { expectations["HEAD"]["CHILD"].setValueSet({0, 1, 2}); }, "The data type of the passed vector used in setValueSet\\() " "does not match that held within the ExpectationNode with key " "HEAD:CHILD. Passed vector elements are of type 32-bit integer and the " @@ -320,9 +318,7 @@ TEST(ConfigTest, alreadyDefinedBounds) { simeng::config::ExpectationNode::createExpectation(0, "CHILD")); expectations["HEAD"]["CHILD"].setValueBounds(0, 10); ASSERT_DEATH( - { - expectations["HEAD"]["CHILD"].setValueSet({1, 2, 3}); - }, + { expectations["HEAD"]["CHILD"].setValueSet({1, 2, 3}); }, "Invalid call of setValueSet\\() for the ExpectationNode with key " "HEAD:CHILD as value bounds have already been defined."); } diff --git a/test/regression/aarch64/instructions/neon.cc b/test/regression/aarch64/instructions/neon.cc index a4731f388f..64efb68110 100644 --- a/test/regression/aarch64/instructions/neon.cc +++ b/test/regression/aarch64/instructions/neon.cc @@ -2546,7 +2546,7 @@ TEST_P(InstNeon, mvni) { ~((32u << 8) | 255)}); } -TEST_P(InstNeon, not ) { +TEST_P(InstNeon, not) { initialHeapData_.resize(128); uint8_t* heap = reinterpret_cast(initialHeapData_.data()); heap[0] = 0b11111111; diff --git a/test/unit/aarch64/AuxiliaryFunctionsTest.cc b/test/unit/aarch64/AuxiliaryFunctionsTest.cc index dd18b16a31..c7b823f5c7 100644 --- a/test/unit/aarch64/AuxiliaryFunctionsTest.cc +++ b/test/unit/aarch64/AuxiliaryFunctionsTest.cc @@ -71,10 +71,11 @@ TEST(AArch64AuxiliaryFunctionTest, BitfieldManipulate) { { bitfieldManipulate(0, 0, 16, 0, false); }, "Attempted to use a rotate amount of 16 in bitfieldManipulate which is " "greater than or equal to the data type size of 16b in use"); - ASSERT_DEATH({ bitfieldManipulate(0, 0, 0, 16, false); }, - "Attempted to use a source bit position value of 16 in " - "bitfieldManipulate which is greater than or equal to the data " - "type size of 16b in use"); + ASSERT_DEATH( + { bitfieldManipulate(0, 0, 0, 16, false); }, + "Attempted to use a source bit position value of 16 in " + "bitfieldManipulate which is greater than or equal to the data " + "type size of 16b in use"); // uint32 EXPECT_EQ(bitfieldManipulate(0x0000FFFF, 0xFFFF0000, 0, 0, false), @@ -104,10 +105,11 @@ TEST(AArch64AuxiliaryFunctionTest, BitfieldManipulate) { { bitfieldManipulate(0, 0, 32, 0, false); }, "Attempted to use a rotate amount of 32 in bitfieldManipulate which is " "greater than or equal to the data type size of 32b in use"); - ASSERT_DEATH({ bitfieldManipulate(0, 0, 0, 32, false); }, - "Attempted to use a source bit position value of 32 in " - "bitfieldManipulate which is greater than or equal to the data " - "type size of 32b in use"); + ASSERT_DEATH( + { bitfieldManipulate(0, 0, 0, 32, false); }, + "Attempted to use a source bit position value of 32 in " + "bitfieldManipulate which is greater than or equal to the data " + "type size of 32b in use"); // uint64 EXPECT_EQ(bitfieldManipulate(0x00000000FFFFFFFF, 0xFFFFFFFF00000000, @@ -147,10 +149,11 @@ TEST(AArch64AuxiliaryFunctionTest, BitfieldManipulate) { { bitfieldManipulate(0, 0, 64, 0, false); }, "Attempted to use a rotate amount of 64 in bitfieldManipulate which is " "greater than or equal to the data type size of 64b in use"); - ASSERT_DEATH({ bitfieldManipulate(0, 0, 0, 64, false); }, - "Attempted to use a source bit position value of 64 in " - "bitfieldManipulate which is greater than or equal to the data " - "type size of 64b in use"); + ASSERT_DEATH( + { bitfieldManipulate(0, 0, 0, 64, false); }, + "Attempted to use a source bit position value of 64 in " + "bitfieldManipulate which is greater than or equal to the data " + "type size of 64b in use"); } /** `conditionHolds` Tests */ diff --git a/test/unit/pipeline/FetchUnitTest.cc b/test/unit/pipeline/FetchUnitTest.cc index 2c1c99b69b..90870fb5e2 100644 --- a/test/unit/pipeline/FetchUnitTest.cc +++ b/test/unit/pipeline/FetchUnitTest.cc @@ -279,8 +279,7 @@ TEST_P(PipelineFetchUnitTest, fetchTakenBranchMidBlock) { EXPECT_CALL(*uop, getBranchType()).WillOnce(Return(bType)); EXPECT_CALL(*uop, getKnownOffset()).WillOnce(Return(knownOff)); BranchPrediction pred = {true, pc + knownOff}; - EXPECT_CALL(predictor, predict(20, bType, knownOff)) - .WillOnce(Return(pred)); + EXPECT_CALL(predictor, predict(20, bType, knownOff)).WillOnce(Return(pred)); fetchUnit.tick(); // Ensure on next tick, predecode is not called