-
Notifications
You must be signed in to change notification settings - Fork 1
/
Copy pathSelfParkingCars.lst
4016 lines (4015 loc) · 143 KB
/
SelfParkingCars.lst
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
; LST file generated by mikroListExporter - v.2.0
; Date/Time: 9/14/2017 3:36:47 PM
;----------------------------------------------
;Address Opcode ASM
____SysVT:
0x0000 0xFFFC2001 537001980
0x0004 0x11C10000 4545
0x0008 0x16F50000 5877
0x000C 0x16F50000 5877
0x0010 0x16F50000 5877
0x0014 0x16F50000 5877
0x0018 0x16F50000 5877
0x001C 0x16F50000 5877
0x0020 0x16F50000 5877
0x0024 0x16F50000 5877
0x0028 0x16F50000 5877
0x002C 0x16F50000 5877
0x0030 0x16F50000 5877
0x0034 0x16F50000 5877
0x0038 0x16F50000 5877
0x003C 0x16F50000 5877
0x0040 0x16F50000 5877
0x0044 0x16F50000 5877
0x0048 0x16F50000 5877
0x004C 0x16F50000 5877
0x0050 0x16F50000 5877
0x0054 0x16F50000 5877
0x0058 0x16F50000 5877
0x005C 0x12110000 4625
0x0060 0x12690000 4713
0x0064 0x11490000 4425
0x0068 0x12C10000 4801
0x006C 0x16F50000 5877
0x0070 0x16F50000 5877
0x0074 0x16F50000 5877
0x0078 0x16F50000 5877
0x007C 0x16F50000 5877
0x0080 0x16F50000 5877
0x0084 0x16F50000 5877
0x0088 0x16F50000 5877
0x008C 0x16F50000 5877
0x0090 0x16F50000 5877
0x0094 0x16F50000 5877
0x0098 0x16F50000 5877
0x009C 0x16F50000 5877
0x00A0 0x16F50000 5877
0x00A4 0x16F50000 5877
0x00A8 0x16F50000 5877
0x00AC 0x16F50000 5877
0x00B0 0x16F50000 5877
0x00B4 0x16F50000 5877
0x00B8 0x16F50000 5877
0x00BC 0x16F50000 5877
0x00C0 0x16F50000 5877
0x00C4 0x16F50000 5877
0x00C8 0x16F50000 5877
0x00CC 0x16F50000 5877
0x00D0 0x16F50000 5877
0x00D4 0x16F50000 5877
0x00D8 0x16F50000 5877
0x00DC 0x16F50000 5877
0x00E0 0x16F50000 5877
0x00E4 0x16F50000 5877
0x00E8 0x16F50000 5877
0x00EC 0x16F50000 5877
0x00F0 0x16F50000 5877
0x00F4 0x16F50000 5877
0x00F8 0x16F50000 5877
0x00FC 0x16F50000 5877
0x0100 0x16F50000 5877
0x0104 0x16F50000 5877
0x0108 0x16F50000 5877
0x010C 0x16F50000 5877
0x0110 0x16F50000 5877
0x0114 0x16F50000 5877
0x0118 0x16F50000 5877
0x011C 0x16F50000 5877
0x0120 0x16F50000 5877
0x0124 0x16F50000 5877
0x0128 0x16F50000 5877
0x012C 0x16F50000 5877
0x0130 0x16F50000 5877
0x0134 0x16F50000 5877
0x0138 0x16F50000 5877
0x013C 0x16F50000 5877
0x0140 0x16F50000 5877
0x0144 0x16F50000 5877
0x0148 0x16F50000 5877
0x014C 0x16F50000 5877
0x0150 0x16F50000 5877
0x0154 0x16F50000 5877
0x0158 0x16F50000 5877
0x015C 0x16F50000 5877
0x0160 0x16F50000 5877
0x0164 0x16F50000 5877
0x0168 0x16F50000 5877
0x016C 0x16F50000 5877
0x0170 0x16F50000 5877
0x0174 0x16F50000 5877
0x0178 0x16F50000 5877
0x017C 0x16F50000 5877
0x0180 0x16F50000 5877
0x0184 0x16F50000 5877
; end of ____SysVT
_main:
;SelfParkingCars.c, 239 :: void main() {
0x11C0 0xB081 SUB SP, SP, #4
0x11C2 0xF000F8D1 BL 4968
0x11C6 0xF000FA7F BL 5832
0x11CA 0xF000FBE3 BL 6548
0x11CE 0xF000F8B9 BL 4932
0x11D2 0xF000FB91 BL 6392
;SelfParkingCars.c, 243 :: InitializeSensors();
0x11D6 0xF7FFFF03 BL _InitializeSensors+0
;SelfParkingCars.c, 244 :: AlignRightSensors();
0x11DA 0xF7FFFF91 BL _AlignRightSensors+0
;SelfParkingCars.c, 245 :: Delay_ms(4000);
0x11DE 0xF24677FE MOVW R7, #26622
0x11E2 0xF6C01789 MOVT R7, #2441
0x11E6 0xBF00 NOP
0x11E8 0xBF00 NOP
L_main44:
0x11EA 0x1E7F SUBS R7, R7, #1
0x11EC 0xD1FD BNE L_main44
0x11EE 0xBF00 NOP
0x11F0 0xBF00 NOP
0x11F2 0xBF00 NOP
;SelfParkingCars.c, 246 :: InitializeWheels();
0x11F4 0xF7FFFF9A BL _InitializeWheels+0
;SelfParkingCars.c, 247 :: DriveWhileParkingNotSpotted();
0x11F8 0xF7FFFD9C BL _DriveWhileParkingNotSpotted+0
;SelfParkingCars.c, 248 :: RotateFor90Right();
0x11FC 0xF7FFFE1C BL _RotateFor90Right+0
;SelfParkingCars.c, 249 :: RotateFrontSensorFront();
0x1200 0xF7FFFE58 BL _RotateFrontSensorFront+0
;SelfParkingCars.c, 250 :: DriveUntillWall();
0x1204 0xF7FFFE64 BL _DriveUntillWall+0
;SelfParkingCars.c, 251 :: RotateFor90Right();
0x1208 0xF7FFFE16 BL _RotateFor90Right+0
;SelfParkingCars.c, 253 :: while(1);
L_main46:
0x120C 0xE7FE B L_main46
;SelfParkingCars.c, 267 :: }
L_end_main:
L__main_end_loop:
0x120E 0xE7FE B L__main_end_loop
; end of _main
___CC2DW:
;__Lib_System_4XX.c, 43 ::
0x10D4 0xB081 SUB SP, SP, #4
;__Lib_System_4XX.c, 45 ::
L_loopDW:
;__Lib_System_4XX.c, 46 ::
0x10D6 0xF81C9B01 LDRB R9, [R12], #1
;__Lib_System_4XX.c, 47 ::
0x10DA 0xF80B9B01 STRB R9, [R11], #1
;__Lib_System_4XX.c, 48 ::
0x10DE 0xEBBB0F0A CMP R11, R10, LSL #0
;__Lib_System_4XX.c, 49 ::
0x10E2 0xD1F8 BNE L_loopDW
;__Lib_System_4XX.c, 51 ::
L_end___CC2DW:
0x10E4 0xB001 ADD SP, SP, #4
0x10E6 0x4770 BX LR
; end of ___CC2DW
___FillZeros:
;__Lib_System_4XX.c, 85 ::
0x1098 0xB081 SUB SP, SP, #4
;__Lib_System_4XX.c, 87 ::
0x109A 0xF04F0900 MOV R9, #0
;__Lib_System_4XX.c, 88 ::
0x109E 0xF04F0C00 MOV R12, #0
;__Lib_System_4XX.c, 89 ::
0x10A2 0xEBBD0F0A CMP SP, R10, LSL #0
;__Lib_System_4XX.c, 90 ::
0x10A6 0xDC04 BGT L_loopFZs
;__Lib_System_4XX.c, 91 ::
0x10A8 0xEBBD0F0B CMP SP, R11, LSL #0
;__Lib_System_4XX.c, 92 ::
0x10AC 0xDB01 BLT L_loopFZs
;__Lib_System_4XX.c, 93 ::
0x10AE 0x46D4 MOV R12, R10
;__Lib_System_4XX.c, 94 ::
0x10B0 0x46EA MOV R10, SP
;__Lib_System_4XX.c, 95 ::
L_loopFZs:
;__Lib_System_4XX.c, 96 ::
0x10B2 0xF84B9B04 STR R9, [R11], #4
;__Lib_System_4XX.c, 97 ::
0x10B6 0xEBBB0F0A CMP R11, R10, LSL #0
;__Lib_System_4XX.c, 98 ::
0x10BA 0xD1FA BNE L_loopFZs
;__Lib_System_4XX.c, 99 ::
0x10BC 0xEBBC0F0A CMP R12, R10, LSL #0
;__Lib_System_4XX.c, 100 ::
0x10C0 0xDD05 BLE L_norep
;__Lib_System_4XX.c, 101 ::
0x10C2 0x46E2 MOV R10, R12
;__Lib_System_4XX.c, 102 ::
0x10C4 0xF8D9B000 LDR R11, [R9, #0]
;__Lib_System_4XX.c, 103 ::
0x10C8 0xF10B0B04 ADD R11, R11, #4
;__Lib_System_4XX.c, 104 ::
0x10CC 0xE7F1 B L_loopFZs
;__Lib_System_4XX.c, 105 ::
L_norep:
;__Lib_System_4XX.c, 107 ::
L_end___FillZeros:
0x10CE 0xB001 ADD SP, SP, #4
0x10D0 0x4770 BX LR
; end of ___FillZeros
_InitializeSensors:
;Sensors.c, 68 :: void InitializeSensors()
0x0FE0 0xB081 SUB SP, SP, #4
0x0FE2 0xF8CDE000 STR LR, [SP, #0]
;Sensors.c, 70 :: Timer();
0x0FE6 0xF7FFFCC9 BL _Timer+0
;Sensors.c, 72 :: InitBackServoPWM_Timer10_CH1_PB8();
0x0FEA 0xF7FFFD05 BL _InitBackServoPWM_Timer10_CH1_PB8+0
;Sensors.c, 73 :: InitFrontServoPWM_Timer11_CH1_PB9();
0x0FEE 0xF7FFFCDF BL _InitFrontServoPWM_Timer11_CH1_PB9+0
;Sensors.c, 76 :: GPIO_Digital_Output(&GPIOD_BASE, _GPIO_PINMASK_11); // Front sensor Trigger: PD11
0x0FF2 0xF6400100 MOVW R1, #2048
0x0FF6 0x4820 LDR R0, [PC, #128]
0x0FF8 0xF7FFFCB2 BL _GPIO_Digital_Output+0
;Sensors.c, 77 :: GPIO_Digital_Output(&GPIOD_BASE, _GPIO_PINMASK_10); // Back sensor Trigger : PD10
0x0FFC 0xF2404100 MOVW R1, #1024
0x1000 0x481D LDR R0, [PC, #116]
0x1002 0xF7FFFCAD BL _GPIO_Digital_Output+0
;Sensors.c, 80 :: GPIO_Digital_Input(&GPIOC_BASE, _GPIO_PINMASK_3); // Back sensor Echo : PC3
0x1006 0xF2400108 MOVW R1, #8
0x100A 0x481C LDR R0, [PC, #112]
0x100C 0xF7FFFD18 BL _GPIO_Digital_Input+0
;Sensors.c, 81 :: GPIO_Digital_Input(&GPIOC_BASE, _GPIO_PINMASK_4); // Front sensor Echo: PC4
0x1010 0xF2400110 MOVW R1, #16
0x1014 0x4819 LDR R0, [PC, #100]
0x1016 0xF7FFFD13 BL _GPIO_Digital_Input+0
;Sensors.c, 84 :: SYSCFGEN_bit = 1;
0x101A 0x2101 MOVS R1, #1
0x101C 0xB249 SXTB R1, R1
0x101E 0x4818 LDR R0, [PC, #96]
0x1020 0x6001 STR R1, [R0, #0]
;Sensors.c, 87 :: EXTI_RTSR |= 0x8 | 0x10; // Set interrupt on Rising edge
0x1022 0x4818 LDR R0, [PC, #96]
0x1024 0x6800 LDR R0, [R0, #0]
0x1026 0xF0400118 ORR R1, R0, #24
0x102A 0x4816 LDR R0, [PC, #88]
0x102C 0x6001 STR R1, [R0, #0]
;Sensors.c, 88 :: EXTI_FTSR |= 0x8 | 0x10; // Set interrupt on Falling edge
0x102E 0x4816 LDR R0, [PC, #88]
0x1030 0x6800 LDR R0, [R0, #0]
0x1032 0xF0400118 ORR R1, R0, #24
0x1036 0x4814 LDR R0, [PC, #80]
0x1038 0x6001 STR R1, [R0, #0]
;Sensors.c, 89 :: EXTI_IMR |= 0x8 | 0x10; // Set mask
0x103A 0x4814 LDR R0, [PC, #80]
0x103C 0x6800 LDR R0, [R0, #0]
0x103E 0xF0400118 ORR R1, R0, #24
0x1042 0x4812 LDR R0, [PC, #72]
0x1044 0x6001 STR R1, [R0, #0]
;Sensors.c, 90 :: SYSCFG_EXTICR1 |= 0x2000; SYSCFG_EXTICR2 |= 0x2;
0x1046 0x4812 LDR R0, [PC, #72]
0x1048 0x6800 LDR R0, [R0, #0]
0x104A 0xF4405100 ORR R1, R0, #8192
0x104E 0x4810 LDR R0, [PC, #64]
0x1050 0x6001 STR R1, [R0, #0]
0x1052 0x4810 LDR R0, [PC, #64]
0x1054 0x6800 LDR R0, [R0, #0]
0x1056 0xF0400102 ORR R1, R0, #2
0x105A 0x480E LDR R0, [PC, #56]
0x105C 0x6001 STR R1, [R0, #0]
;Sensors.c, 91 :: NVIC_IntEnable(IVT_INT_EXTI3); NVIC_IntEnable(IVT_INT_EXTI4);
0x105E 0xF2400019 MOVW R0, #25
0x1062 0xF7FFFC41 BL _NVIC_IntEnable+0
0x1066 0xF240001A MOVW R0, #26
0x106A 0xF7FFFC3D BL _NVIC_IntEnable+0
;Sensors.c, 92 :: }
L_end_InitializeSensors:
0x106E 0xF8DDE000 LDR LR, [SP, #0]
0x1072 0xB001 ADD SP, SP, #4
0x1074 0x4770 BX LR
0x1076 0xBF00 NOP
0x1078 0x0C004002 GPIOD_BASE+0
0x107C 0x08004002 GPIOC_BASE+0
0x1080 0x08B84247 SYSCFGEN_bit+0
0x1084 0x3C084001 EXTI_RTSR+0
0x1088 0x3C0C4001 EXTI_FTSR+0
0x108C 0x3C004001 EXTI_IMR+0
0x1090 0x38084001 SYSCFG_EXTICR1+0
0x1094 0x380C4001 SYSCFG_EXTICR2+0
; end of _InitializeSensors
_NVIC_IntEnable:
;__Lib_System_4XX.c, 171 ::
; ivt start address is: 0 (R0)
0x08E8 0xB081 SUB SP, SP, #4
; ivt end address is: 0 (R0)
; ivt start address is: 0 (R0)
;__Lib_System_4XX.c, 183 ::
0x08EA 0x2804 CMP R0, #4
0x08EC 0xD106 BNE L_NVIC_IntEnable6
; ivt end address is: 0 (R0)
;__Lib_System_4XX.c, 188 ::
0x08EE 0x4919 LDR R1, [PC, #100]
0x08F0 0x6809 LDR R1, [R1, #0]
0x08F2 0xF4413280 ORR R2, R1, #65536
0x08F6 0x4917 LDR R1, [PC, #92]
0x08F8 0x600A STR R2, [R1, #0]
;__Lib_System_4XX.c, 189 ::
0x08FA 0xE028 B L_NVIC_IntEnable7
L_NVIC_IntEnable6:
;__Lib_System_4XX.c, 190 ::
; ivt start address is: 0 (R0)
0x08FC 0x2805 CMP R0, #5
0x08FE 0xD106 BNE L_NVIC_IntEnable8
; ivt end address is: 0 (R0)
;__Lib_System_4XX.c, 195 ::
0x0900 0x4914 LDR R1, [PC, #80]
0x0902 0x6809 LDR R1, [R1, #0]
0x0904 0xF4413200 ORR R2, R1, #131072
0x0908 0x4912 LDR R1, [PC, #72]
0x090A 0x600A STR R2, [R1, #0]
;__Lib_System_4XX.c, 196 ::
0x090C 0xE01F B L_NVIC_IntEnable9
L_NVIC_IntEnable8:
;__Lib_System_4XX.c, 197 ::
; ivt start address is: 0 (R0)
0x090E 0x2806 CMP R0, #6
0x0910 0xD106 BNE L_NVIC_IntEnable10
; ivt end address is: 0 (R0)
;__Lib_System_4XX.c, 202 ::
0x0912 0x4910 LDR R1, [PC, #64]
0x0914 0x6809 LDR R1, [R1, #0]
0x0916 0xF4412280 ORR R2, R1, #262144
0x091A 0x490E LDR R1, [PC, #56]
0x091C 0x600A STR R2, [R1, #0]
;__Lib_System_4XX.c, 203 ::
0x091E 0xE016 B L_NVIC_IntEnable11
L_NVIC_IntEnable10:
;__Lib_System_4XX.c, 204 ::
; ivt start address is: 0 (R0)
0x0920 0x280F CMP R0, #15
0x0922 0xD106 BNE L_NVIC_IntEnable12
; ivt end address is: 0 (R0)
;__Lib_System_4XX.c, 209 ::
0x0924 0x490C LDR R1, [PC, #48]
0x0926 0x6809 LDR R1, [R1, #0]
0x0928 0xF0410202 ORR R2, R1, #2
0x092C 0x490A LDR R1, [PC, #40]
0x092E 0x600A STR R2, [R1, #0]
;__Lib_System_4XX.c, 210 ::
0x0930 0xE00D B L_NVIC_IntEnable13
L_NVIC_IntEnable12:
;__Lib_System_4XX.c, 211 ::
; ivt start address is: 0 (R0)
0x0932 0x2810 CMP R0, #16
0x0934 0xD30B BCC L_NVIC_IntEnable14
;__Lib_System_4XX.c, 216 ::
0x0936 0xF2A00410 SUBW R4, R0, #16
; ivt end address is: 0 (R0)
0x093A 0x0961 LSRS R1, R4, #5
0x093C 0x008A LSLS R2, R1, #2
0x093E 0x4907 LDR R1, [PC, #28]
0x0940 0x188B ADDS R3, R1, R2
;__Lib_System_4XX.c, 217 ::
0x0942 0xF004021F AND R2, R4, #31
0x0946 0xF04F0101 MOV R1, #1
0x094A 0x4091 LSLS R1, R2
0x094C 0x6019 STR R1, [R3, #0]
;__Lib_System_4XX.c, 218 ::
L_NVIC_IntEnable14:
L_NVIC_IntEnable13:
L_NVIC_IntEnable11:
L_NVIC_IntEnable9:
L_NVIC_IntEnable7:
;__Lib_System_4XX.c, 219 ::
L_end_NVIC_IntEnable:
0x094E 0xB001 ADD SP, SP, #4
0x0950 0x4770 BX LR
0x0952 0xBF00 NOP
0x0954 0xED24E000 SCB_SHCRS+0
0x0958 0xE010E000 STK_CTRL+0
0x095C 0xE100E000 NVIC_ISER0+0
; end of _NVIC_IntEnable
_Timer:
;Sensors.c, 60 :: void Timer()
0x097C 0xB081 SUB SP, SP, #4
;Sensors.c, 62 :: RCC_APB1ENR.TIM2EN = 1;
0x097E 0x2101 MOVS R1, #1
0x0980 0xB249 SXTB R1, R1
0x0982 0x4807 LDR R0, [PC, #28]
0x0984 0x6001 STR R1, [R0, #0]
;Sensors.c, 63 :: TIM2_CR1.CEN = 0;
0x0986 0x2100 MOVS R1, #0
0x0988 0xB249 SXTB R1, R1
0x098A 0x4806 LDR R0, [PC, #24]
0x098C 0x6001 STR R1, [R0, #0]
;Sensors.c, 64 :: TIM2_PSC = 5; // Prescaller+1 (120 Mhz / prescaller+1 represents frequency of Timer calls)
0x098E 0x2105 MOVS R1, #5
0x0990 0x4805 LDR R0, [PC, #20]
0x0992 0x6001 STR R1, [R0, #0]
;Sensors.c, 65 :: TIM2_ARR = 65535;
0x0994 0xF64F71FF MOVW R1, #65535
0x0998 0x4804 LDR R0, [PC, #16]
0x099A 0x6001 STR R1, [R0, #0]
;Sensors.c, 66 :: }
L_end_Timer:
0x099C 0xB001 ADD SP, SP, #4
0x099E 0x4770 BX LR
0x09A0 0x08004247 RCC_APB1ENR+0
0x09A4 0x00004200 TIM2_CR1+0
0x09A8 0x00284000 TIM2_PSC+0
0x09AC 0x002C4000 TIM2_ARR+0
; end of _Timer
_InitBackServoPWM_Timer10_CH1_PB8:
;Sensors.c, 36 :: void InitBackServoPWM_Timer10_CH1_PB8()
0x09F8 0xB081 SUB SP, SP, #4
0x09FA 0xF8CDE000 STR LR, [SP, #0]
;Sensors.c, 38 :: pwmPeriod[BACK_SENSOR] = PWM_TIM10_Init(INITIAL_SENSOR_FREQUENCY);
0x09FE 0x2032 MOVS R0, #50
0x0A00 0xF7FFFEDE BL _PWM_TIM10_Init+0
0x0A04 0x490A LDR R1, [PC, #40]
0x0A06 0x8008 STRH R0, [R1, #0]
;Sensors.c, 39 :: pwmDuty[BACK_SENSOR] = sensorPositions[0];
0x0A08 0xF640212C MOVW R1, #2604
0x0A0C 0xB209 SXTH R1, R1
0x0A0E 0x4809 LDR R0, [PC, #36]
0x0A10 0x8001 STRH R1, [R0, #0]
;Sensors.c, 40 :: ChangeDuty[BACK_SENSOR](pwmDuty[BACK_SENSOR]);
0x0A12 0xF640242C MOVW R4, #2604
0x0A16 0xB2A0 UXTH R0, R4
0x0A18 0x4C07 LDR R4, [PC, #28]
0x0A1A 0x6824 LDR R4, [R4, #0]
0x0A1C 0x47A0 BLX R4
;Sensors.c, 41 :: PWM_TIM10_Start(_PWM_CHANNEL1, &_GPIO_MODULE_TIM10_CH1_PB8);
0x0A1E 0x4907 LDR R1, [PC, #28]
0x0A20 0x2000 MOVS R0, #0
0x0A22 0xF7FFFEDB BL _PWM_TIM10_Start+0
;Sensors.c, 42 :: }
L_end_InitBackServoPWM_Timer10_CH1_PB8:
0x0A26 0xF8DDE000 LDR LR, [SP, #0]
0x0A2A 0xB001 ADD SP, SP, #4
0x0A2C 0x4770 BX LR
0x0A2E 0xBF00 NOP
0x0A30 0x00422000 Sensors_pwmPeriod+6
0x0A34 0x004A2000 Sensors_pwmDuty+6
0x0A38 0x00282000 Sensors_ChangeDuty+12
0x0A3C 0x17680000 __GPIO_MODULE_TIM10_CH1_PB8+0
; end of _InitBackServoPWM_Timer10_CH1_PB8
SelfParkingCars_PWM_TIM4_Set_Duty_Wrapper:
;selfparkingcars.h, 37 :: static void PWM_TIM4_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x10E8 0xB081 SUB SP, SP, #4
0x10EA 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 38 :: PWM_TIM4_Set_Duty(ratio, _PWM_INVERTED, _PWM_CHANNEL1);
0x10EE 0x2200 MOVS R2, #0
0x10F0 0x2101 MOVS R1, #1
; ratio end address is: 0 (R0)
0x10F2 0xF7FFFDF1 BL _PWM_TIM4_Set_Duty+0
;selfparkingcars.h, 39 :: }
L_end_PWM_TIM4_Set_Duty_Wrapper:
0x10F6 0xF8DDE000 LDR LR, [SP, #0]
0x10FA 0xB001 ADD SP, SP, #4
0x10FC 0x4770 BX LR
; end of SelfParkingCars_PWM_TIM4_Set_Duty_Wrapper
_PWM_TIM4_Set_Duty:
;__Lib_PWM_1234589_12_10_11_13_14.c, 258 ::
; channel start address is: 8 (R2)
; inverted start address is: 4 (R1)
; duty_ratio start address is: 0 (R0)
0x0CD8 0xB081 SUB SP, SP, #4
0x0CDA 0xF8CDE000 STR LR, [SP, #0]
; channel end address is: 8 (R2)
; inverted end address is: 4 (R1)
; duty_ratio end address is: 0 (R0)
; duty_ratio start address is: 0 (R0)
; inverted start address is: 4 (R1)
; channel start address is: 8 (R2)
;__Lib_PWM_1234589_12_10_11_13_14.c, 259 ::
0x0CDE 0xB2D3 UXTB R3, R2
; channel end address is: 8 (R2)
0x0CE0 0xB2CA UXTB R2, R1
; inverted end address is: 4 (R1)
0x0CE2 0xB281 UXTH R1, R0
; duty_ratio end address is: 0 (R0)
0x0CE4 0x4803 LDR R0, [PC, #12]
0x0CE6 0xF7FFFDDB BL __Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty+0
;__Lib_PWM_1234589_12_10_11_13_14.c, 260 ::
L_end_PWM_TIM4_Set_Duty:
0x0CEA 0xF8DDE000 LDR LR, [SP, #0]
0x0CEE 0xB001 ADD SP, SP, #4
0x0CF0 0x4770 BX LR
0x0CF2 0xBF00 NOP
0x0CF4 0x08004000 TIM4_CR1+0
; end of _PWM_TIM4_Set_Duty
__Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty:
;__Lib_PWM_1234589_12_10_11_13_14.c, 121 ::
; channel start address is: 12 (R3)
; inverted start address is: 8 (R2)
; duty_ratio start address is: 4 (R1)
; PWM_Base start address is: 0 (R0)
0x08A0 0xB081 SUB SP, SP, #4
0x08A2 0xB2D5 UXTB R5, R2
; channel end address is: 12 (R3)
; inverted end address is: 8 (R2)
; duty_ratio end address is: 4 (R1)
; PWM_Base end address is: 0 (R0)
; PWM_Base start address is: 0 (R0)
; duty_ratio start address is: 4 (R1)
; inverted start address is: 20 (R5)
; channel start address is: 12 (R3)
;__Lib_PWM_1234589_12_10_11_13_14.c, 126 ::
0x08A4 0xF2000420 ADDW R4, R0, #32
0x08A8 0x6822 LDR R2, [R4, #0]
; tmpLong start address is: 8 (R2)
;__Lib_PWM_1234589_12_10_11_13_14.c, 127 ::
0x08AA 0x2D01 CMP R5, #1
0x08AC 0xD108 BNE L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty14
; inverted end address is: 20 (R5)
;__Lib_PWM_1234589_12_10_11_13_14.c, 128 ::
0x08AE 0x009C LSLS R4, R3, #2
0x08B0 0xB224 SXTH R4, R4
0x08B2 0x1C65 ADDS R5, R4, #1
0x08B4 0xB22D SXTH R5, R5
0x08B6 0xF04F0401 MOV R4, #1
0x08BA 0x40AC LSLS R4, R5
0x08BC 0x4322 ORRS R2, R4
0x08BE 0xE008 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty15
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty14:
;__Lib_PWM_1234589_12_10_11_13_14.c, 130 ::
0x08C0 0x009C LSLS R4, R3, #2
0x08C2 0xB224 SXTH R4, R4
0x08C4 0x1C65 ADDS R5, R4, #1
0x08C6 0xB22D SXTH R5, R5
0x08C8 0xF04F0401 MOV R4, #1
0x08CC 0x40AC LSLS R4, R5
0x08CE 0x43E4 MVN R4, R4
0x08D0 0x4022 ANDS R2, R4
; tmpLong end address is: 8 (R2)
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty15:
;__Lib_PWM_1234589_12_10_11_13_14.c, 131 ::
; tmpLong start address is: 8 (R2)
0x08D2 0xF2000420 ADDW R4, R0, #32
0x08D6 0x6022 STR R2, [R4, #0]
; tmpLong end address is: 8 (R2)
;__Lib_PWM_1234589_12_10_11_13_14.c, 134 ::
0x08D8 0xF2000534 ADDW R5, R0, #52
; PWM_Base end address is: 0 (R0)
0x08DC 0x009C LSLS R4, R3, #2
; channel end address is: 12 (R3)
0x08DE 0x192C ADDS R4, R5, R4
0x08E0 0x6021 STR R1, [R4, #0]
; duty_ratio end address is: 4 (R1)
;__Lib_PWM_1234589_12_10_11_13_14.c, 135 ::
L_end_PWM_TIMx_Set_Duty:
0x08E2 0xB001 ADD SP, SP, #4
0x08E4 0x4770 BX LR
; end of __Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty
SelfParkingCars_PWM_TIM9_Set_Duty_Wrapper:
;selfparkingcars.h, 42 :: static void PWM_TIM9_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x0F68 0xB081 SUB SP, SP, #4
0x0F6A 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 43 :: PWM_TIM9_Set_Duty(ratio, _PWM_INVERTED, _PWM_CHANNEL1);
0x0F6E 0x2200 MOVS R2, #0
0x0F70 0x2101 MOVS R1, #1
; ratio end address is: 0 (R0)
0x0F72 0xF7FFFE99 BL _PWM_TIM9_Set_Duty+0
;selfparkingcars.h, 44 :: }
L_end_PWM_TIM9_Set_Duty_Wrapper:
0x0F76 0xF8DDE000 LDR LR, [SP, #0]
0x0F7A 0xB001 ADD SP, SP, #4
0x0F7C 0x4770 BX LR
; end of SelfParkingCars_PWM_TIM9_Set_Duty_Wrapper
_PWM_TIM9_Set_Duty:
;__Lib_PWM_1234589_12_10_11_13_14.c, 318 ::
; channel start address is: 8 (R2)
; inverted start address is: 4 (R1)
; duty_ratio start address is: 0 (R0)
0x0CA8 0xB081 SUB SP, SP, #4
0x0CAA 0xF8CDE000 STR LR, [SP, #0]
; channel end address is: 8 (R2)
; inverted end address is: 4 (R1)
; duty_ratio end address is: 0 (R0)
; duty_ratio start address is: 0 (R0)
; inverted start address is: 4 (R1)
; channel start address is: 8 (R2)
;__Lib_PWM_1234589_12_10_11_13_14.c, 319 ::
0x0CAE 0xB2D3 UXTB R3, R2
; channel end address is: 8 (R2)
0x0CB0 0xB2CA UXTB R2, R1
; inverted end address is: 4 (R1)
0x0CB2 0xB281 UXTH R1, R0
; duty_ratio end address is: 0 (R0)
0x0CB4 0x4803 LDR R0, [PC, #12]
0x0CB6 0xF7FFFDF3 BL __Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty+0
;__Lib_PWM_1234589_12_10_11_13_14.c, 320 ::
L_end_PWM_TIM9_Set_Duty:
0x0CBA 0xF8DDE000 LDR LR, [SP, #0]
0x0CBE 0xB001 ADD SP, SP, #4
0x0CC0 0x4770 BX LR
0x0CC2 0xBF00 NOP
0x0CC4 0x40004001 TIM9_CR1+0
; end of _PWM_TIM9_Set_Duty
SelfParkingCars_PWM_TIM10_Set_Duty_Wrapper:
;selfparkingcars.h, 47 :: static void PWM_TIM10_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x0F50 0xB081 SUB SP, SP, #4
0x0F52 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 48 :: PWM_TIM10_Set_Duty(ratio, _PWM_NON_INVERTED, _PWM_CHANNEL1);
0x0F56 0x2200 MOVS R2, #0
0x0F58 0x2100 MOVS R1, #0
; ratio end address is: 0 (R0)
0x0F5A 0xF7FFFE85 BL _PWM_TIM10_Set_Duty+0
;selfparkingcars.h, 49 :: }
L_end_PWM_TIM10_Set_Duty_Wrapper:
0x0F5E 0xF8DDE000 LDR LR, [SP, #0]
0x0F62 0xB001 ADD SP, SP, #4
0x0F64 0x4770 BX LR
; end of SelfParkingCars_PWM_TIM10_Set_Duty_Wrapper
_PWM_TIM10_Set_Duty:
;__Lib_PWM_1234589_12_10_11_13_14.c, 338 ::
; channel start address is: 8 (R2)
; inverted start address is: 4 (R1)
; duty_ratio start address is: 0 (R0)
0x0C68 0xB081 SUB SP, SP, #4
0x0C6A 0xF8CDE000 STR LR, [SP, #0]
; channel end address is: 8 (R2)
; inverted end address is: 4 (R1)
; duty_ratio end address is: 0 (R0)
; duty_ratio start address is: 0 (R0)
; inverted start address is: 4 (R1)
; channel start address is: 8 (R2)
;__Lib_PWM_1234589_12_10_11_13_14.c, 339 ::
0x0C6E 0xB2D3 UXTB R3, R2
; channel end address is: 8 (R2)
0x0C70 0xB2CA UXTB R2, R1
; inverted end address is: 4 (R1)
0x0C72 0xB281 UXTH R1, R0
; duty_ratio end address is: 0 (R0)
0x0C74 0x4803 LDR R0, [PC, #12]
0x0C76 0xF7FFFE13 BL __Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty+0
;__Lib_PWM_1234589_12_10_11_13_14.c, 340 ::
L_end_PWM_TIM10_Set_Duty:
0x0C7A 0xF8DDE000 LDR LR, [SP, #0]
0x0C7E 0xB001 ADD SP, SP, #4
0x0C80 0x4770 BX LR
0x0C82 0xBF00 NOP
0x0C84 0x44004001 TIM10_CR1+0
; end of _PWM_TIM10_Set_Duty
SelfParkingCars_PWM_TIM11_Set_Duty_Wrapper:
;selfparkingcars.h, 52 :: static void PWM_TIM11_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x0F38 0xB081 SUB SP, SP, #4
0x0F3A 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 53 :: PWM_TIM11_Set_Duty(ratio, _PWM_NON_INVERTED, _PWM_CHANNEL1);
0x0F3E 0x2200 MOVS R2, #0
0x0F40 0x2100 MOVS R1, #0
; ratio end address is: 0 (R0)
0x0F42 0xF7FFFEA1 BL _PWM_TIM11_Set_Duty+0
;selfparkingcars.h, 54 :: }
L_end_PWM_TIM11_Set_Duty_Wrapper:
0x0F46 0xF8DDE000 LDR LR, [SP, #0]
0x0F4A 0xB001 ADD SP, SP, #4
0x0F4C 0x4770 BX LR
; end of SelfParkingCars_PWM_TIM11_Set_Duty_Wrapper
_PWM_TIM11_Set_Duty:
;__Lib_PWM_1234589_12_10_11_13_14.c, 358 ::
; channel start address is: 8 (R2)
; inverted start address is: 4 (R1)
; duty_ratio start address is: 0 (R0)
0x0C88 0xB081 SUB SP, SP, #4
0x0C8A 0xF8CDE000 STR LR, [SP, #0]
; channel end address is: 8 (R2)
; inverted end address is: 4 (R1)
; duty_ratio end address is: 0 (R0)
; duty_ratio start address is: 0 (R0)
; inverted start address is: 4 (R1)
; channel start address is: 8 (R2)
;__Lib_PWM_1234589_12_10_11_13_14.c, 359 ::
0x0C8E 0xB2D3 UXTB R3, R2
; channel end address is: 8 (R2)
0x0C90 0xB2CA UXTB R2, R1
; inverted end address is: 4 (R1)
0x0C92 0xB281 UXTH R1, R0
; duty_ratio end address is: 0 (R0)
0x0C94 0x4803 LDR R0, [PC, #12]
0x0C96 0xF7FFFE03 BL __Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Set_Duty+0
;__Lib_PWM_1234589_12_10_11_13_14.c, 360 ::
L_end_PWM_TIM11_Set_Duty:
0x0C9A 0xF8DDE000 LDR LR, [SP, #0]
0x0C9E 0xB001 ADD SP, SP, #4
0x0CA0 0x4770 BX LR
0x0CA2 0xBF00 NOP
0x0CA4 0x48004001 TIM11_CR1+0
; end of _PWM_TIM11_Set_Duty
Sensors_PWM_TIM4_Set_Duty_Wrapper:
;selfparkingcars.h, 37 :: static void PWM_TIM4_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x0F98 0xB081 SUB SP, SP, #4
0x0F9A 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 38 :: PWM_TIM4_Set_Duty(ratio, _PWM_INVERTED, _PWM_CHANNEL1);
0x0F9E 0x2200 MOVS R2, #0
0x0FA0 0x2101 MOVS R1, #1
; ratio end address is: 0 (R0)
0x0FA2 0xF7FFFE99 BL _PWM_TIM4_Set_Duty+0
;selfparkingcars.h, 39 :: }
L_end_PWM_TIM4_Set_Duty_Wrapper:
0x0FA6 0xF8DDE000 LDR LR, [SP, #0]
0x0FAA 0xB001 ADD SP, SP, #4
0x0FAC 0x4770 BX LR
; end of Sensors_PWM_TIM4_Set_Duty_Wrapper
Sensors_PWM_TIM9_Set_Duty_Wrapper:
;selfparkingcars.h, 42 :: static void PWM_TIM9_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x0FB0 0xB081 SUB SP, SP, #4
0x0FB2 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 43 :: PWM_TIM9_Set_Duty(ratio, _PWM_INVERTED, _PWM_CHANNEL1);
0x0FB6 0x2200 MOVS R2, #0
0x0FB8 0x2101 MOVS R1, #1
; ratio end address is: 0 (R0)
0x0FBA 0xF7FFFE75 BL _PWM_TIM9_Set_Duty+0
;selfparkingcars.h, 44 :: }
L_end_PWM_TIM9_Set_Duty_Wrapper:
0x0FBE 0xF8DDE000 LDR LR, [SP, #0]
0x0FC2 0xB001 ADD SP, SP, #4
0x0FC4 0x4770 BX LR
; end of Sensors_PWM_TIM9_Set_Duty_Wrapper
Sensors_PWM_TIM10_Set_Duty_Wrapper:
;selfparkingcars.h, 47 :: static void PWM_TIM10_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x0FC8 0xB081 SUB SP, SP, #4
0x0FCA 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 48 :: PWM_TIM10_Set_Duty(ratio, _PWM_NON_INVERTED, _PWM_CHANNEL1);
0x0FCE 0x2200 MOVS R2, #0
0x0FD0 0x2100 MOVS R1, #0
; ratio end address is: 0 (R0)
0x0FD2 0xF7FFFE49 BL _PWM_TIM10_Set_Duty+0
;selfparkingcars.h, 49 :: }
L_end_PWM_TIM10_Set_Duty_Wrapper:
0x0FD6 0xF8DDE000 LDR LR, [SP, #0]
0x0FDA 0xB001 ADD SP, SP, #4
0x0FDC 0x4770 BX LR
; end of Sensors_PWM_TIM10_Set_Duty_Wrapper
Sensors_PWM_TIM11_Set_Duty_Wrapper:
;selfparkingcars.h, 52 :: static void PWM_TIM11_Set_Duty_Wrapper(unsigned int ratio) {
; ratio start address is: 0 (R0)
0x0F80 0xB081 SUB SP, SP, #4
0x0F82 0xF8CDE000 STR LR, [SP, #0]
; ratio end address is: 0 (R0)
; ratio start address is: 0 (R0)
;selfparkingcars.h, 53 :: PWM_TIM11_Set_Duty(ratio, _PWM_NON_INVERTED, _PWM_CHANNEL1);
0x0F86 0x2200 MOVS R2, #0
0x0F88 0x2100 MOVS R1, #0
; ratio end address is: 0 (R0)
0x0F8A 0xF7FFFE7D BL _PWM_TIM11_Set_Duty+0
;selfparkingcars.h, 54 :: }
L_end_PWM_TIM11_Set_Duty_Wrapper:
0x0F8E 0xF8DDE000 LDR LR, [SP, #0]
0x0F92 0xB001 ADD SP, SP, #4
0x0F94 0x4770 BX LR
; end of Sensors_PWM_TIM11_Set_Duty_Wrapper
_PWM_TIM10_Init:
;__Lib_PWM_1234589_12_10_11_13_14.c, 334 ::
; freq_hz start address is: 0 (R0)
0x07C0 0xB081 SUB SP, SP, #4
0x07C2 0xF8CDE000 STR LR, [SP, #0]
; freq_hz end address is: 0 (R0)
; freq_hz start address is: 0 (R0)
;__Lib_PWM_1234589_12_10_11_13_14.c, 335 ::
0x07C6 0x4601 MOV R1, R0
; freq_hz end address is: 0 (R0)
0x07C8 0x4803 LDR R0, [PC, #12]
0x07CA 0xF7FFFF3B BL __Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init+0
;__Lib_PWM_1234589_12_10_11_13_14.c, 336 ::
L_end_PWM_TIM10_Init:
0x07CE 0xF8DDE000 LDR LR, [SP, #0]
0x07D2 0xB001 ADD SP, SP, #4
0x07D4 0x4770 BX LR
0x07D6 0xBF00 NOP
0x07D8 0x44004001 TIM10_CR1+0
; end of _PWM_TIM10_Init
__Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init:
;__Lib_PWM_1234589_12_10_11_13_14.c, 35 ::
; freq_hz start address is: 4 (R1)
; PWM_Base start address is: 0 (R0)
0x0644 0xB081 SUB SP, SP, #4
0x0646 0xF8CDE000 STR LR, [SP, #0]
0x064A 0x460C MOV R4, R1
0x064C 0x4601 MOV R1, R0
; freq_hz end address is: 4 (R1)
; PWM_Base end address is: 0 (R0)
; PWM_Base start address is: 4 (R1)
; freq_hz start address is: 16 (R4)
;__Lib_PWM_1234589_12_10_11_13_14.c, 39 ::
0x064E 0xF06F02FF MVN R2, #255
0x0652 0xEA010202 AND R2, R1, R2, LSL #0
; _PWM_Base start address is: 0 (R0)
0x0656 0x4610 MOV R0, R2
;__Lib_PWM_1234589_12_10_11_13_14.c, 41 ::
0x0658 0xE03B B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init0
; _PWM_Base end address is: 0 (R0)
;__Lib_PWM_1234589_12_10_11_13_14.c, 43 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init2:
;__Lib_PWM_1234589_12_10_11_13_14.c, 44 ::
0x065A 0x2301 MOVS R3, #1
0x065C 0xB25B SXTB R3, R3
0x065E 0x4A41 LDR R2, [PC, #260]
0x0660 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 45 ::
0x0662 0xE05A B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 48 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init3:
;__Lib_PWM_1234589_12_10_11_13_14.c, 49 ::
0x0664 0x2301 MOVS R3, #1
0x0666 0xB25B SXTB R3, R3
0x0668 0x4A3F LDR R2, [PC, #252]
0x066A 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 50 ::
0x066C 0xE055 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 53 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init4:
;__Lib_PWM_1234589_12_10_11_13_14.c, 54 ::
0x066E 0x2301 MOVS R3, #1
0x0670 0xB25B SXTB R3, R3
0x0672 0x4A3E LDR R2, [PC, #248]
0x0674 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 55 ::
0x0676 0xE050 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 58 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init5:
;__Lib_PWM_1234589_12_10_11_13_14.c, 59 ::
0x0678 0x2301 MOVS R3, #1
0x067A 0xB25B SXTB R3, R3
0x067C 0x4A3C LDR R2, [PC, #240]
0x067E 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 60 ::
0x0680 0xE04B B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 63 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init6:
;__Lib_PWM_1234589_12_10_11_13_14.c, 64 ::
0x0682 0x2301 MOVS R3, #1
0x0684 0xB25B SXTB R3, R3
0x0686 0x4A3B LDR R2, [PC, #236]
0x0688 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 65 ::
0x068A 0xE046 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 68 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init7:
;__Lib_PWM_1234589_12_10_11_13_14.c, 69 ::
0x068C 0x2301 MOVS R3, #1
0x068E 0xB25B SXTB R3, R3
0x0690 0x4A39 LDR R2, [PC, #228]
0x0692 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 70 ::
0x0694 0xE041 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 73 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init8:
;__Lib_PWM_1234589_12_10_11_13_14.c, 74 ::
0x0696 0x2301 MOVS R3, #1
0x0698 0xB25B SXTB R3, R3
0x069A 0x4A38 LDR R2, [PC, #224]
0x069C 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 75 ::
0x069E 0xE03C B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 78 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init9:
;__Lib_PWM_1234589_12_10_11_13_14.c, 79 ::
0x06A0 0x2301 MOVS R3, #1
0x06A2 0xB25B SXTB R3, R3
0x06A4 0x4A36 LDR R2, [PC, #216]
0x06A6 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 80 ::
0x06A8 0xE037 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 83 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init10:
;__Lib_PWM_1234589_12_10_11_13_14.c, 84 ::
0x06AA 0x2301 MOVS R3, #1
0x06AC 0xB25B SXTB R3, R3
0x06AE 0x4A35 LDR R2, [PC, #212]
0x06B0 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 85 ::
0x06B2 0xE032 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 88 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init11:
;__Lib_PWM_1234589_12_10_11_13_14.c, 89 ::
0x06B4 0x2301 MOVS R3, #1
0x06B6 0xB25B SXTB R3, R3
0x06B8 0x4A33 LDR R2, [PC, #204]
0x06BA 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 90 ::
0x06BC 0xE02D B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 93 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init12:
;__Lib_PWM_1234589_12_10_11_13_14.c, 94 ::
0x06BE 0x2301 MOVS R3, #1
0x06C0 0xB25B SXTB R3, R3
0x06C2 0x4A32 LDR R2, [PC, #200]
0x06C4 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 95 ::
0x06C6 0xE028 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 98 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init13:
;__Lib_PWM_1234589_12_10_11_13_14.c, 99 ::
0x06C8 0x2301 MOVS R3, #1
0x06CA 0xB25B SXTB R3, R3
0x06CC 0x4A30 LDR R2, [PC, #192]
0x06CE 0x6013 STR R3, [R2, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 100 ::
0x06D0 0xE023 B L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1
;__Lib_PWM_1234589_12_10_11_13_14.c, 102 ::
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init0:
; _PWM_Base start address is: 0 (R0)
0x06D2 0x4A30 LDR R2, [PC, #192]
0x06D4 0x4290 CMP R0, R2
0x06D6 0xD0C0 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init2
0x06D8 0xF1B04F80 CMP R0, #1073741824
0x06DC 0xD0C2 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init3
0x06DE 0x4A2E LDR R2, [PC, #184]
0x06E0 0x4290 CMP R0, R2
0x06E2 0xD0C4 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init4
0x06E4 0x4A2D LDR R2, [PC, #180]
0x06E6 0x4290 CMP R0, R2
0x06E8 0xD0C6 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init5
0x06EA 0x4A2D LDR R2, [PC, #180]
0x06EC 0x4290 CMP R0, R2
0x06EE 0xD0C8 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init6
0x06F0 0x4A2C LDR R2, [PC, #176]
0x06F2 0x4290 CMP R0, R2
0x06F4 0xD0CA BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init7
0x06F6 0x4A2C LDR R2, [PC, #176]
0x06F8 0x4290 CMP R0, R2
0x06FA 0xD0CC BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init8
0x06FC 0x4A2B LDR R2, [PC, #172]
0x06FE 0x4290 CMP R0, R2
0x0700 0xD0CE BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init9
0x0702 0x4A2B LDR R2, [PC, #172]
0x0704 0x4290 CMP R0, R2
0x0706 0xD0D0 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init10
0x0708 0x4A2A LDR R2, [PC, #168]
0x070A 0x4290 CMP R0, R2
0x070C 0xD0D2 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init11
0x070E 0x4A2A LDR R2, [PC, #168]
0x0710 0x4290 CMP R0, R2
0x0712 0xD0D4 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init12
0x0714 0x4A29 LDR R2, [PC, #164]
0x0716 0x4290 CMP R0, R2
0x0718 0xD0D6 BEQ L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init13
; _PWM_Base end address is: 0 (R0)
L___Lib_PWM_1234589_12_10_11_13_14_PWM_TIMx_Init1:
;__Lib_PWM_1234589_12_10_11_13_14.c, 104 ::
0x071A 0xF7FFFF1F BL _Get_Fosc_kHz+0
; clk start address is: 0 (R0)
;__Lib_PWM_1234589_12_10_11_13_14.c, 106 ::
0x071E 0x680B LDR R3, [R1, #0]
0x0720 0xF06F0210 MVN R2, #16
0x0724 0xEA030202 AND R2, R3, R2, LSL #0
0x0728 0x600A STR R2, [R1, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 108 ::
0x072A 0xF24032E8 MOVW R2, #1000
0x072E 0x4342 MULS R2, R0, R2
; clk end address is: 0 (R0)
0x0730 0xFBB2F3F4 UDIV R3, R2, R4
; freq_hz end address is: 16 (R4)
; per_reg start address is: 0 (R0)
0x0734 0x4618 MOV R0, R3
;__Lib_PWM_1234589_12_10_11_13_14.c, 109 ::
0x0736 0xF64F72FF MOVW R2, #65535
0x073A 0xFBB3F2F2 UDIV R2, R3, R2
; prescaler start address is: 16 (R4)
0x073E 0x4614 MOV R4, R2
;__Lib_PWM_1234589_12_10_11_13_14.c, 110 ::
0x0740 0xF2010328 ADDW R3, R1, #40
0x0744 0xB292 UXTH R2, R2
0x0746 0x601A STR R2, [R3, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 112 ::
0x0748 0x1C62 ADDS R2, R4, #1
; prescaler end address is: 16 (R4)
0x074A 0xFBB0F2F2 UDIV R2, R0, R2
0x074E 0x4610 MOV R0, R2
;__Lib_PWM_1234589_12_10_11_13_14.c, 114 ::
0x0750 0xF201032C ADDW R3, R1, #44
; PWM_Base end address is: 4 (R1)
0x0754 0xB292 UXTH R2, R2
0x0756 0x601A STR R2, [R3, #0]
;__Lib_PWM_1234589_12_10_11_13_14.c, 116 ::