One-byte cache cycling

[Yazwh0]

This probably needs its own heading \ section as it is under the 'transparency writes' heading.

When "one-byte cache cycling" is turned on and DATA0 or DATA1 is written to, the byte at the current cache index is written to VRAM. When "Cache write enable" is set as well, the byte is duplicated 4 times when writing to VRAM.

Does the byte written have any influence here? Does it get ignored? Follow the cache-write pattern? 'Duplicated' 4 times on a 4byte aligned boundary? Does it combine with the 'transparent' flag? Either way its worth explicitly stating what happens.

https://github.com/X16Community/x16-docs/blob/master/X16%20Reference%20-%2010%20-%20VERA%20FX%20Reference.md#transparency-writes