From 8ce22f7db41587e8f9b6d207aee7b1c4b758d382 Mon Sep 17 00:00:00 2001 From: Vaibhav Jain Date: Tue, 12 Sep 2023 16:44:41 +0800 Subject: [PATCH] change cv_slet,cv_sletu instr asm to cv_sle,cv_sleu to align with cv32e40p user manual v1.4.0 Signed-off-by: Vaibhav Jain --- cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr.sv | 4 ++-- .../env/corev-dv/custom/isa/custom/riscv_custom_instr_enum.sv | 4 ++-- cv32e40p/env/corev-dv/custom/isa/custom/rv32x_instr.sv | 4 ++-- 3 files changed, 6 insertions(+), 6 deletions(-) diff --git a/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr.sv b/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr.sv index 6055d03b43..aa66013e7e 100644 --- a/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr.sv +++ b/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr.sv @@ -419,7 +419,7 @@ class cv32e40p_instr extends riscv_instr; CV_EXTRACT, CV_EXTRACTU, CV_INSERT, CV_BCLR, CV_BSET, CV_BITREV : get_opcode = 7'b1011011; // General ALU - CV_ABS, CV_SLET, CV_SLETU, CV_MIN, CV_MINU, + CV_ABS, CV_SLE, CV_SLEU, CV_MIN, CV_MINU, CV_MAX, CV_MAXU, CV_EXTHS, CV_EXTHZ, CV_EXTBS, CV_EXTBZ, CV_CLIP, CV_CLIPU, CV_CLIPR, CV_CLIPUR, CV_ADDNR, CV_ADDUNR, CV_ADDRNR, CV_ADDURNR, @@ -581,7 +581,7 @@ class cv32e40p_instr extends riscv_instr; CV_EXTRACT, CV_EXTRACTU, CV_INSERT : get_func3 = 3'b000; CV_BCLR, CV_BSET, CV_BITREV : get_func3 = 3'b001; // General ALU - CV_ABS, CV_SLET, CV_SLETU, CV_MIN, CV_MINU, + CV_ABS, CV_SLE, CV_SLEU, CV_MIN, CV_MINU, CV_MAX, CV_MAXU, CV_EXTHS, CV_EXTHZ, CV_EXTBS, CV_EXTBZ, CV_CLIP, CV_CLIPU, CV_CLIPR, CV_CLIPUR, CV_ADDNR, CV_ADDUNR, CV_ADDRNR, CV_ADDURNR, diff --git a/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr_enum.sv b/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr_enum.sv index fc2a7b508a..cd44a53576 100644 --- a/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr_enum.sv +++ b/cv32e40p/env/corev-dv/custom/isa/custom/riscv_custom_instr_enum.sv @@ -35,8 +35,8 @@ CV_CLB, CV_CNT, CV_ABS, - CV_SLET, - CV_SLETU, + CV_SLE, + CV_SLEU, CV_MIN, CV_MINU, CV_MAX, diff --git a/cv32e40p/env/corev-dv/custom/isa/custom/rv32x_instr.sv b/cv32e40p/env/corev-dv/custom/isa/custom/rv32x_instr.sv index 4a60f7833e..ee4135b9c1 100644 --- a/cv32e40p/env/corev-dv/custom/isa/custom/rv32x_instr.sv +++ b/cv32e40p/env/corev-dv/custom/isa/custom/rv32x_instr.sv @@ -47,8 +47,8 @@ // ALU `DEFINE_CV32E40P_INSTR(CV_ABS , R_FORMAT , ALU , RV32X) -`DEFINE_CV32E40P_INSTR(CV_SLET , R_FORMAT , ALU , RV32X) -`DEFINE_CV32E40P_INSTR(CV_SLETU , R_FORMAT , ALU , RV32X) +`DEFINE_CV32E40P_INSTR(CV_SLE , R_FORMAT , ALU , RV32X) +`DEFINE_CV32E40P_INSTR(CV_SLEU , R_FORMAT , ALU , RV32X) `DEFINE_CV32E40P_INSTR(CV_MIN , R_FORMAT , ALU , RV32X) `DEFINE_CV32E40P_INSTR(CV_MINU , R_FORMAT , ALU , RV32X) `DEFINE_CV32E40P_INSTR(CV_MAX , R_FORMAT , ALU , RV32X)