RapidWright 2020.1.4-beta Release

Release Notes:

• Adds 2020.1 update 1 Vivado devices (XCVU19P, XCZU46DR, XCZU47DR,
  XCZU48DR, XCZU49DR; Alveo devices: U55N, U55C)
• Adds a netlist flattening helper method ()
• Adds preliminary support for reproducing intermediate clock routing
  state through the use of partial PIPs - not necessarily modifiable
  though. This is intermediate routing information added to clock nets
  after during place_design that informs clock routing during
  route_design. Previously this was causing some ERRORs when writing
  out placed DCPs.
  • Some PIPs in these intermediate clock nets can have PIPs with no
    end wire. This can be checked with PIP.isEndWireNull(). Or
    compare the end wire index with PIP.NULL_END_WIRE_IDX (0x0000FFFF).
• Various netlist helper methods (see commit log for details).

• API Additions:
  • com.xilinx.rapidwright.design.Net "public boolean hasGapRouting()"
  • com.xilinx.rapidwright.design.Net "public void setHasGapRouting(boolean hasGapRouting)"
  • com.xilinx.rapidwright.design.SitePinInst public Integer getSiteWireIndex()
  • com.xilinx.rapidwright.design.SitePinInst public Integer getSiteWireName()
  • com.xilinx.rapidwright.design.SitePinInst public Integer getSiteWireBELPins()
  • com.xilinx.rapidwright.device.PIP "public boolean isEndWireNull()"

RapidWright 2020.1.3-beta Release

Release Notes:

• Re-adds missing macro primitive definitions that were absent in previous releases
• Adds missing macro/translated primitive definitions IOBUFDS and OBUFTDS_DUAL_BUF
• Adds some basic helper methods to handle route-thrus
• Adds APIs to provide default property values for primitive cells (often unisims)
• Minor update with API additions

• API Additions:
  • com.xilinx.rapidwright.design.SiteInst "public void unrouteSite()"
  • com.xilinx.rapidwright.design.Design "public static EDIFLibrary getPrimitivesLibrary()"
  • com.xilinx.rapidwright.design.Design "public static VivadoProp getDefaultProperty(Series series, String cellTypeName, String propName)"
  • com.xilinx.rapidwright.design.Design "public static Map<String, VivadoProp> getDefaultCellProperties(Series series, String cellTypeName)"

RapidWright 2020.1.2-beta Release

Release Notes:

• Minor update with API additions

• API Additions:
  • com.xilinx.rapidwright.design.Cell "public AltPinMapping getAltPinMapping(String physicalPin)"
  • com.xilinx.rapidwright.design.Cell "public void addAltPinMapping(String physicalPin, AltPinMapping logicalPin)"
  • com.xilinx.rapidwright.design.Cell "public boolean hasAltPinMappings()"
  • com.xilinx.rapidwright.design.Cell "public Map<String,AltPinMapping> getAltPinMappings()"
  • com.xilinx.rapidwright.design.Cell "public boolean isLocked()"
  • com.xilinx.rapidwright.design.Cell "public void setNullBEL(boolean b)"
  • com.xilinx.rapidwright.design.Cell "public boolean isNullBEL()"
  • com.xilinx.rapidwright.design.Cell "public void setLocked(boolean isLocked)"
  • com.xilinx.rapidwright.design.Cell "public void setRoutethru(boolean isRoutethru)"
  • com.xilinx.rapidwright.design.Cell "public void setType(String type)"
  • com.xilinx.rapidwright.design.Cell "public void setAltBlockedSiteType(SiteTypeEnum typeEnum)"
  • com.xilinx.rapidwright.design.Cell "public SiteTypeEnum getAltBlockedSiteType()"
  • com.xilinx.rapidwright.design.SiteInst "public boolean isSiteLocked()"
  • com.xilinx.rapidwright.design.SiteInst "public void setSiteLocked(boolean isSiteLocked)"

NOTE: rapidwright_data.zip has not changed since 2020.1.0 and is not required to be re-downloaded to update.

UPDATE (9/2/2020): It appears the Macro Libs were missing from this release and a replacement data/unisim_data.dat file has been posted to replace it (just overwrite $RAPIDWRIGHT_PATH/data/unisim_data.dat).

RapidWright 2020.1.1-beta Release

Release Notes:

• Minor update with API additions
• Adds an alternative source pin to Nets (for dual output scenarios)

• API Additions:
  • com.xilinx.rapidwright.design.Design "public static readCheckpoint(String dcpFileName, String edfFileName, CodePerfTracker t)"
  • com.xilinx.rapidwright.design.Net "public SitePinInst getAlternateSource()"
  • com.xilinx.rapidwright.design.Net "public void setAlternateSource(SitePinInst altSource)"
  • com.xilinx.rapidwright.design.SiteInst "public BELPin[] getSiteWirePins(String siteWireName)"
  • com.xilinx.rapidwright.design.SiteInst "public BELPin[] getSiteWirePins(int siteWireIdx)"
  • com.xilinx.rapidwright.design.SiteInst "public String[] getSiteWires()"
  • com.xilinx.rapidwright.design.SiteInst "public String[] getSitePinNames()"
  • com.xilinx.rapidwright.design.SiteInst "public int getHighestSitePinInputIndex()"
  • com.xilinx.rapidwright.design.SiteInst "public boolean isSitePinInput(String pinName)"
  • com.xilinx.rapidwright.design.SiteInst "public boolean isSitePinOutput(String pinName)"
  • com.xilinx.rapidwright.device.Node "public IntentCode getIntentCode()"

NOTE: rapidwright_data.zip has not changed since 2020.1.0 and is not required to be re-downloaded to update.

RapidWright 2020.1.0-beta Release

Release Notes:

• Coresponds to the Vivado 2020.1 release, all device models consistent
• Fixed an issue where timing designs (gnl_timing_designs.zip) would not open in Vivado
• Adds utility method (DesignTools.createMissingSitePinInsts()) to
  create missing SitePinInsts to nets to faciltiate routing.
• Changes hashCode() and equals() on PIP class to ignore flags, only
  includes tile and wire names

• API Additions:
  • com.xilinx.rapidwright.design.Design "public ModuleInst createModuleInst(String name, Module module, boolean includePortRouting)"
  • com.xilinx.rapidwright.design.Design "public void copyPartitionPins(Design source, ModuleInst dest, Map<EDIFPort,EDIFPort> portMap)"
  • com.xilinx.rapidwright.design.Design "public void trimPartitionPins(Pair<Tile,Tile> range)"
  • com.xilinx.rapidwright.design.Net "public void trimPartitionPins(Pair<Tile,Tile> range)"
  • com.xilinx.rapidwright.device.BELPin "public SitePin getSitePin(Site site)"
  • com.xilinx.rapidwright.device.BELPin "public Node getExternalNode(Site site)"
  • com.xilinx.rapidwright.device.Node "public List getAllUphillNodes()"
  • com.xilinx.rapidwright.device.Node "public List getAllUphillPIPs()"
  • com.xilinx.rapidwright.device.PIP "public boolean isReversed()"
  • com.xilinx.rapidwright.device.PIP "public void setIsReversed(boolean isReversed)"
• API Refactored:
  • com.xilinx.rapidwright.device.Site "public Node getConnectedNode(int pinIndex)"
    • getconnectedNode(int pinIndex) --> getConnectedNode(int pinIndex)
• Bug Fixes / Pull Requests:
  • Issue #70 - Fixes NPE when EDIFCellInst is null on Cell.
  • Issue #35 - Missing SitePinInsts for placed-only designs.
  • Pull Request #68 - Fixed getLUTSize(), proper processing of LUT size/parsing.
  • Other bug fixes (see commit log for details).

RapidWright 2019.2.2-beta Release

Release Notes:

• Minor feature:
  • Support to manage/load EDIF files with blackboxes where encrypted
    IP is not populated.
  • Adds a very basic Makefile to compile without Gradle on
    Linux-based platforms.

• API Additions:

  • com.xilinx.rapidwright.device.Device "public int getSiteTypeCount()"
  • com.xilinx.rapidwright.device.Device "public int getTileTypeCount()"
  • com.xilinx.rapidwright.device.Site "public int getSiteWireCount()"
  • com.xilinx.rapidwright.device.Site "public String getSiteWireName(int wireIndex)"
  • com.xilinx.rapidwright.device.Site "public int getSitePinCount()"
  • com.xilinx.rapidwright.device.Site "public int getHighestInputPinIndex()"
  • com.xilinx.rapidwright.device.Site "public boolean isInputPin(int pinIndex)"
  • com.xilinx.rapidwright.device.Site "public boolean isOutputPin(int pinIndex)"
  • com.xilinx.rapidwright.device.Site "public SitePIP[] getSitePIPs()"
  • com.xilinx.rapidwright.device.Site "public SitePIP getSitePIP(int index)"
  • com.xilinx.rapidwright.device.Site "public int getSitePIPCount()"
  • com.xilinx.rapidwright.device.Site "public String[] getSiteWireNames()"
  • com.xilinx.rapidwright.device.Tile "public int getTilePatternIndex()"

• Bug Fixes / Pull Requests:

  • Issue #4 - Java 9 Compliance
    • Updates several libraries and provides a workaround for Kryo
      to avoid Illegal access messages from JVM
  • Pull Request #58 - Fixed file naming issues when having multiple instances of an IP
  • Pull Request #60 - Horizontal density (pblock creation)
  • Pull Request #62 - Ensure that highlighted tile numbers are drawn above tile highlighting
  • Other bug fixes (see commit log for details).

RapidWright 2019.2.1-beta Release

Release Notes:

• Minor feature:
  Module and ModuleInst information for physical hierarchy in
  designs is now stored with DCP files.

• API Additions:
  • com.xilinx.rapidwright.design.Design "public Cell createAndPlaceCell(String name, Unisim cellType, String location, String...params)"
  • com.xilinx.rapidwright.design.Design "public Cell createAndPlaceCell(EDIFCell parent, String name, Unisim cellType, String location, String...params)"
  • com.xilinx.rapidwright.design.Design "public boolean renameSiteInst(SiteInst inst, String newName)"
  • com.xilinx.rapidwright.device.BELPin "public BELPin getSourcePin()"
  • com.xilinx.rapidwright.design.SiteInst "public SitePIP getSitePIP(BELPin inputPin)"
  • com.xilinx.rapidwright.design.Cell "public Map<String,String> getPinMappingsL2P()"
  • com.xilinx.rapidwright.device.ClockRegion "public boolean hasTileColumn(int colIndex)"
  • com.xilinx.rapidwright.design.Design "public void addModuleImpls(ModuleImpls modImpls)"
• Bug Fixes / Pull Requests:
  • Issue #56 - EDIF Parser fails on submodules with certain characters in their names
  • Pull Request #57 - TimingGroup: Make 'add' functions public
  • Pull Request #59 - Delay model changes (DelayModel interface is public, uses SiteTypeEnum instead of String)
  • Other bug fixes (see commit log for details).

RapidWright 2019.2.0-beta Release

Release Notes:

• Major feature:
  Timing model and graph (published work at FPT 2019). Provides a
  data path delay model for UltraScale+ interconnect and logic.
  Provides approximate timing delays with ~2% error or less
  on average. See com.xilinx.rapidwright.timing package and
  documentation for details.

• API Additions:
  • com.xilinx.rapidwright.design.Cell "public Tile getTile()"
  • com.xilinx.rapidwright.design.ClockRegion "public static void calculateFrameECC(int[] frame, int[] mask)"
  • com.xilinx.rapidwright.design.ClockRegion "public SLR getSLR()"
  • com.xilinx.rapidwright.design.ClockRegion "public boolean containsTile(Tile tile)"
  • com.xilinx.rapidwright.device.Device "public SLR getMasterSLR()"
  • com.xilinx.rapidwright.device.Device "public SLR getSLRByConfigOrderIndex(int cfgOrderIdx)"
  • com.xilinx.rapidwright.device.SLR "public Device getDevice()"
  • com.xilinx.rapidwright.device.SLR "public Series getSeries()"
  • com.xilinx.rapidwright.device.SLR "public Collection getClockRegions()"
  • com.xilinx.rapidwright.device.SLR "public ClockRegion getClockRegion(String name)"
  • com.xilinx.rapidwright.device.SLR "public boolean hasClockRegion(String name)"
  • com.xilinx.rapidwright.device.SLR "public boolean containsTile(Tile tile)"
  • com.xilinx.rapidwright.device.SLR "public int getNumOfClockRegionRows()"
  • com.xilinx.rapidwright.device.SLR "public int getNumOfClockRegionColumns()"
  • com.xilinx.rapidwright.device.Tile "public SLR getSLR()"
• Deprecated APIs:
  • com.xilinx.rapidwright.device.Device "public String getDeviceName()"
• Bug Fixes:
  • Issue #51 - Missing macro proimitive definitions (DSP48E2)
  • Issue #52 - Re-enabled compact module format
  • Issue #54 - Fixed SLR name/index mismatch
  • Several other bug fixes (see commit log for details).

RapidWright 2019.1.2-beta Release

Notes:

• API Additions:
  • com.xilinx.rapidwright.design.Cell "public Map<SiteTypeEnum,Set> getCompatiblePlacements()"
  • com.xilinx.rapidwright.device.PIP "public PIP(PIP prototype, Tile newTile)"
  • com.xilinx.rapidwright.design.Design "public static EDIFLibrary getMacroPrimitives(Series s)"
  • com.xilinx.rapidwright.design.Design "public Cell createCell(String instName, Unisim unisim)"
  • com.xilinx.rapidwright.device.Device "public String getName()"
  • com.xilinx.rapidwright.device.Device "public SLR[] getSLRs()"
  • com.xilinx.rapidwright.device.SLR "public String toString()"
  • com.xilinx.rapidwright.device.SLR "public String getName()"
• Deprecated APIs:
  • com.xilinx.rapidwright.device.Device "public String getDeviceName()"
• Adds macro primitive expansion/translation and turns it on by
  default when loading EDIF/DCPs -- eliminates problems in netlist
  traversal and matches Vivado behavior on EDIF load
• Fixes an issue when creating designs from scratch for certain
  devices not being loaded correctly in Vivado
• Updates device data to include SLR CONFIG_ORDER_INDEX property
• Adjusts whitespace output in EDIF writer to more closely match Vivado generated
  EDIF files
• Several bug fixes (see commit log for details).

RapidWright 2019.1.1-beta Release

Notes:

• API Additions:
  • com.xilinx.rapidwright.design.Design "public boolean removeSiteInst(SiteInst instance, boolean keepSitePinRouting)"
  • com.xilinx.rapidwright.design.Net "public Set getSiteInsts()"
• Removed APIs:
  • com.xilinx.rapidwright.design.SitePinInst "public ArrayList getConnectedCells()"
  • com.xilinx.rapidwright.design.Design "public HashMap<String,EDIFPort> getNetlistPortMap()"
• Improved GraalVM compatibility for C++ shared library creation.
  Some data files were being loaded using certain Kryo APIs that are
  incompatible with the native compilation flow in GraalVM. This
  release replaced those APIs and improved startup time for use of
  those files by >10X (1.2 secs -> 0.1 secs).
• Fixes a subtle internal site routing issue when creating module instances. Most
  commonly seen on BRAMs with REGCLK* pins. This ensures internal site routing
  matches to original template SiteInst.
• Several bug fixes (see commit log for details).