Error while generating stitched IP

[pkdeep]

Hello,
I am trying to generate FPGA design for my custom DNN. I am getting the some error while running the**"build.build_dataflow_cfg(model_file, cfg_stitched_ip)"** step.
ERROR>>>>>>>>>>>>>>>>>>>

I am using Ubuntu Virtual Box (Ubuntu 20.04, Xilinx tools version: 2022.2) on a windows machine. I am attaching the screenshot of the error.

[fpjentzsch]

Hi, which branch of FINN are you using? Could you check if this also occurs on the dev branch?

[pkdeep]

Hello Felix,
Thanks for your reply and sorry for the delayed response from my side. I am able to move forward. It seems the problem was due to the model size, I am able to generate the same for example model.
Now I am trying with our custom model and progressing. I'll let you know the final outcome or if I have any more issues. Thanks