From 0421d6a456117f9b20a80edbfbc7c3ebe81bf30f Mon Sep 17 00:00:00 2001 From: jamestcl-amd Date: Thu, 8 Aug 2024 13:01:18 -0700 Subject: [PATCH 1/7] Add UPDOp to AIEVEC AIE1 dialect --- .../Dialect/AIEVec/AIE1/IR/AIEVecAIE1Ops.td | 29 ++++++ lib/Dialect/AIEVec/IR/AIE1/AIEVecAIE1Ops.cpp | 98 +++++++++++++++++++ 2 files changed, 127 insertions(+) diff --git a/include/aie/Dialect/AIEVec/AIE1/IR/AIEVecAIE1Ops.td b/include/aie/Dialect/AIEVec/AIE1/IR/AIEVecAIE1Ops.td index 70c7f1f775..cecaf2593c 100644 --- a/include/aie/Dialect/AIEVec/AIE1/IR/AIEVecAIE1Ops.td +++ b/include/aie/Dialect/AIEVec/AIE1/IR/AIEVecAIE1Ops.td @@ -329,4 +329,33 @@ def AIEVecAIE1_ExtOp: }]; } +def AIEVecAIE1_UPDOp: + AIEVecAIE1_Op<"upd", [ + Pure, + AttrSizedOperandSegments + ]>, + Arguments<(ins AnyShaped:$source, + Variadic:$indices, + DefaultValuedAttr:$offset, + DefaultValuedAttr, IntMaxValue<1>]>, "0">:$index, + Optional:$vector)>, + Results<(outs AnyVector:$result)> { + let summary = "AIE upd"; + let description = [{ + AMD-specific update intrinsic. General upd intrinsic updates contiguous + lanes of the result vector from a smaller source vector. This form of + upd intrinsic combines the load of data from memory into a vector + register, and then updating the lanes of the result vector using it. + `$result = upd($source[$indices], $offset, $index)` + }]; + let builders = [ + OpBuilder<(ins "mlir::Type":$resultType, "mlir::Value":$source, + "mlir::ValueRange":$indices, + "int32_t":$offset, "int8_t":$index), + [{build($_builder, $_state, resultType, source, indices, + offset, index, nullptr);}]> + ]; +} + #endif // AIEVEC_AIE1_OPS diff --git a/lib/Dialect/AIEVec/IR/AIE1/AIEVecAIE1Ops.cpp b/lib/Dialect/AIEVec/IR/AIE1/AIEVecAIE1Ops.cpp index 6dd09fdebc..7052a57339 100644 --- a/lib/Dialect/AIEVec/IR/AIE1/AIEVecAIE1Ops.cpp +++ b/lib/Dialect/AIEVec/IR/AIE1/AIEVecAIE1Ops.cpp @@ -537,6 +537,104 @@ ParseResult ExtOp::parse(OpAsmParser &parser, OperationState &result) { return parser.addTypeToList(resultType, result.types); } +//===----------------------------------------------------------------------===// +// UPDOp +//===----------------------------------------------------------------------===// + +// Print out UPD op. +void UPDOp::print(OpAsmPrinter &p) { + // Print the source memref + p << " " << getSource() << "[" << getIndices() << "]"; + // Now print the optional vector that links upd idx=1 with idx=0 + if (getVector()) + p << ", " << getVector(); + + // Print the attributes, but don't print the operand segment sizes + SmallVector elidedAttrs; + elidedAttrs.push_back(UPDOp::getOperandSegmentSizeAttr()); + p.printOptionalAttrDict((*this)->getAttrs(), elidedAttrs); + + // And now print the types + p << " : " << getSource().getType() << ", " << getResult().getType(); +} + +// Verify UPD op. +LogicalResult UPDOp::verify() { + // Verify the types: source is memref, and result is vector + MemRefType sourceType = llvm::dyn_cast(getSource().getType()); + VectorType resultType = llvm::dyn_cast(getResult().getType()); + if (!sourceType) + return emitError("requires memref type"); + if (!resultType) + return emitError("requires vector type"); + if (getIndices().empty()) + return emitError("upd source cannot come from scalar value"); + + // If this UPD op is linked to another UPD op, then verify that the linked + // vector and the result vector match. + if (getVector()) { + Type vecType = llvm::dyn_cast(getVector().getType()); + if (vecType != resultType) + return emitError("result types of linked UPD ops do not match"); + } + return success(); +} + +// Parse UPD op. +ParseResult UPDOp::parse(OpAsmParser &parser, OperationState &result) { + auto &builder = parser.getBuilder(); + llvm::SMLoc typesLoc; + SmallVector types; + OpAsmParser::UnresolvedOperand source, vector; + SmallVector indices; + + // Parse the source, indices, and optional vector + if (parser.parseOperand(source) || + parser.parseOperandList(indices, OpAsmParser::Delimiter::Square)) + return failure(); + ParseResult hasVector = parser.parseOptionalComma(); + if (hasVector.succeeded() && parser.parseOperand(vector)) + return failure(); + + // Parse all the attributes and types + if (parser.parseOptionalAttrDict(result.attributes) || + parser.getCurrentLocation(&typesLoc) || parser.parseColonTypeList(types)) + return failure(); + + if (result.attributes.getAttrs().size() != 2) + return parser.emitError(typesLoc, "requires two attributes"); + + // Assert that there are two types (memref source and vector result) + if (types.size() != 2) + return parser.emitError(typesLoc, "requires two types"); + + // Some verification + auto memrefType = llvm::dyn_cast(types[0]); + if (!memrefType) + return parser.emitError(typesLoc, "requires memref type"); + VectorType vectorType = llvm::dyn_cast(types[1]); + if (!vectorType) + return parser.emitError(typesLoc, "requires vector type"); + auto indicesType = builder.getIndexType(); + + // Populate the source and indices in result + if (parser.resolveOperand(source, memrefType, result.operands) || + parser.resolveOperands(indices, indicesType, result.operands)) + return failure(); + // Populate optional vector in result + if (hasVector.succeeded()) + if (parser.resolveOperand(vector, vectorType, result.operands)) + return failure(); + + // Populate operand size attribute in result + result.addAttribute(UPDOp::getOperandSegmentSizeAttr(), + builder.getDenseI32ArrayAttr( + {1, static_cast(indices.size()), + static_cast(hasVector.succeeded())})); + + return parser.addTypeToList(vectorType, result.types); +} + } // namespace xilinx::aievec::aie1 // #define GET_ATTRDEF_CLASSES From 68a4364f9df20993cad9911a1b4f7792bacced03 Mon Sep 17 00:00:00 2001 From: jamestcl-amd Date: Thu, 8 Aug 2024 13:01:52 -0700 Subject: [PATCH 2/7] Remove AIE1 UPD support in AIEVEC to LLVM --- lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp | 128 ------------------- 1 file changed, 128 deletions(-) diff --git a/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp b/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp index a76eec74cb..6a383dd88f 100644 --- a/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp +++ b/lib/Conversion/AIEVecToLLVM/AIEVecToLLVM.cpp @@ -1137,133 +1137,6 @@ class SRSOpConversion : public mlir::ConvertOpToLLVMPattern { } }; -class UPDOpConversion : public mlir::ConvertOpToLLVMPattern { -public: - using ConvertOpToLLVMPattern::ConvertOpToLLVMPattern; - - static std::string getIntrinsicName(aievec::UPDOp op, int loadSize) { - auto resultType = cast(op.getResult().getType()); - std::stringstream ss; - ss << "llvm.aie.upd."; - ss << (loadSize == 128 ? 'v' : loadSize == 256 ? 'w' : 'x') << "."; - ss << getVectorTypeString(resultType) << "."; - // The index affects which intrinsic to call - ss << (op.getIndex() == 0 ? "lo" : "hi"); - return ss.str(); - } - - LogicalResult - matchAndRewrite(aievec::UPDOp op, OpAdaptor adaptor, - ConversionPatternRewriter &rewriter) const override { - auto module = op->getParentOfType(); - MLIRContext *context = rewriter.getContext(); - - // A bit more complicated: load the vector, then update result vector - // AIE1 is capable of 128-bit on one bank and 256-bit loads on even-odd - // banks Identify size of update - int vecSizeInBits = - getVectorSizeInBits(cast(op.getResult().getType())); - - auto ptr = this->getStridedElementPtr( - op->getLoc(), cast(op.getSource().getType()), - adaptor.getSource(), adaptor.getIndices(), rewriter); - - // TODO: handle the offset field - - if (vecSizeInBits <= 256) { - // Total <=256-bit updates are much simpler: - // we can do a direct load into the vector register - // look at the indices to calculate the address - auto vectorPtrType = LLVM::LLVMPointerType::get( - getContext(), - cast(op.getSource().getType()).getMemorySpaceAsInt()); - auto castedPtr = - rewriter.create(op->getLoc(), vectorPtrType, ptr); - auto vecType = cast(op.getResult().getType()); - rewriter.replaceOpWithNewOp(op, vecType, castedPtr, 1); - } else { - // Total >256-bit updates will require upd ops to fill the whole vector - // each UDP op represents one of these 256-bit loads and updates - - // Determine the load size - // TODO: no examples of 1024-bit output vectors: doesn't feel right - // to attempt a 512-bit load to do an update like this - int loadSize = vecSizeInBits == 256 ? 128 - : vecSizeInBits == 512 ? 256 - : 512; - - // Create a vectorType for the load proper - // Load half of the final result vector - auto resultType = cast(op.getResult().getType()); - int lanes = getVectorLaneSize(resultType); - auto loadType = - VectorType::get({(int64_t)lanes / 2}, resultType.getElementType()); - - // Load the vector - auto vectorPtrType = LLVM::LLVMPointerType::get( - getContext(), - cast(op.getSource().getType()).getMemorySpaceAsInt()); - auto castedPtr = - rewriter.create(op->getLoc(), vectorPtrType, ptr); - auto loadValue = - rewriter.create(op->getLoc(), loadType, castedPtr, 1); - - // Get set up for the intrinsic - std::string intrinsicName = getIntrinsicName(op, loadSize); - - // If the intrinsic declaration doesn't exist, create it - auto func = module.lookupSymbol( - StringAttr::get(context, intrinsicName)); - - if (!func) { - OpBuilder::InsertionGuard guard(rewriter); - rewriter.setInsertionPointToStart(module.getBody()); - func = rewriter.create( - rewriter.getUnknownLoc(), intrinsicName, - LLVM::LLVMFunctionType::get(resultType, {resultType, loadType})); - } - - // Determine what the destination is - Value destValue; - if (adaptor.getVector()) { - // This UPD is using an existing destination vector - destValue = adaptor.getVector(); - } else { - // If this UPD is not working off of an existing destination vector, - // create an undefined vector as the destination - - // TODO: determine if the undef intrinsic is needed or if an LLVM - // undef suffices destValue = - // rewriter.create(op->getLoc(), resultType); - - std::stringstream ss; - ss << "llvm.aie." << getVectorTypeString(resultType) << ".undef"; - std::string intrinsicName = ss.str(); - - auto func = module.lookupSymbol( - StringAttr::get(rewriter.getContext(), intrinsicName)); - - if (!func) { - OpBuilder::InsertionGuard guard(rewriter); - rewriter.setInsertionPointToStart(module.getBody()); - func = rewriter.create( - rewriter.getUnknownLoc(), intrinsicName, - LLVM::LLVMFunctionType::get(resultType, {})); - } - destValue = - rewriter.create(op->getLoc(), func, ValueRange{}) - ->getOpResult(0); - } - - // Create our call - rewriter.replaceOpWithNewOp( - op, func, ValueRange{destValue, loadValue}); - } - - return success(); - } -}; - class ConcatOpConversion : public mlir::ConvertOpToLLVMPattern { public: @@ -2339,7 +2212,6 @@ void populateAIEVecToLLVMConversionPatterns( MulOpConversion, UPSOpConversion, SRSOpConversion, - UPDOpConversion, ConcatOpConversion, ExtOpConversion, SelectOpConversion, From e634a79566acda38dd94b1579065d1b21d4c967e Mon Sep 17 00:00:00 2001 From: jamestcl-amd Date: Thu, 8 Aug 2024 13:02:35 -0700 Subject: [PATCH 3/7] Update AIEVEC->CPP --- .../AIEVecToCpp/TranslateAIEVecToCpp.cpp | 22 ++++++++++++++++--- 1 file changed, 19 insertions(+), 3 deletions(-) diff --git a/lib/Targets/AIEVecToCpp/TranslateAIEVecToCpp.cpp b/lib/Targets/AIEVecToCpp/TranslateAIEVecToCpp.cpp index 948b3bec4f..90be3f18cd 100644 --- a/lib/Targets/AIEVecToCpp/TranslateAIEVecToCpp.cpp +++ b/lib/Targets/AIEVecToCpp/TranslateAIEVecToCpp.cpp @@ -572,8 +572,9 @@ static LogicalResult printOperation(CppEmitter &emitter, // Print AIE dialect ops //===----------------------------------------------------------------------===// -// Print the AIE dialect UPD op -static LogicalResult printOperation(CppEmitter &emitter, aievec::UPDOp updOp) { +// Print the UPD intrinsic +template +static LogicalResult printUpdOperation(CppEmitter &emitter, T updOp) { Value source = updOp.getSource(); // If the source is not already emitted, error out if (!emitter.hasValueInScope(source)) @@ -682,6 +683,21 @@ static LogicalResult printOperation(CppEmitter &emitter, aievec::UPDOp updOp) { return success(); } +// Generate the aie2 ext intrinsic +static LogicalResult printOperation(CppEmitter &emitter, aievec::UPDOp updOp) { + if (!emitter.aie2()) + return failure(); + return printUpdOperation(emitter, updOp); +} + +// Generate the aie1 ext intrinsic +static LogicalResult printOperation(CppEmitter &emitter, + aievec::aie1::UPDOp updOp) { + if (emitter.aie2()) + return failure(); + return printUpdOperation(emitter, updOp); +} + // Print the UPS intrinsic static LogicalResult printOperation(CppEmitter &emitter, aievec::UPSOp upsOp) { Value source = upsOp.getSource(); @@ -3288,7 +3304,7 @@ LogicalResult CppEmitter::emitOperation(Operation &op, bool trailingSemicolon) { // AievecAie1 ops .Case( + aievec::aie1::ExtOp, aievec::aie1::UPDOp>( [&](auto op) { return printOperation(*this, op); }) // Aievec ops .Case Date: Thu, 8 Aug 2024 13:02:53 -0700 Subject: [PATCH 4/7] Update AIEVectorize --- .../AIEVec/Transforms/AIEVectorize.cpp | 33 ++++++++++--------- 1 file changed, 18 insertions(+), 15 deletions(-) diff --git a/lib/Dialect/AIEVec/Transforms/AIEVectorize.cpp b/lib/Dialect/AIEVec/Transforms/AIEVectorize.cpp index 54844d57c2..8ccc50297d 100644 --- a/lib/Dialect/AIEVec/Transforms/AIEVectorize.cpp +++ b/lib/Dialect/AIEVec/Transforms/AIEVectorize.cpp @@ -966,11 +966,11 @@ static Operation *generateMulOp(T mulOp, AIEOpAttributes &opAttr, // subsumed by the same interval. The updOps will have to be inserted at the // head of region if the region has multiple blocks, or closer to the readOp // otherwise. -static aievec::UPDOp -generateUPDOp(TransferReadOp readOp, - mlir::DenseMap, - std::pair> &memToUpdMap, - Region ®ion, VectState *state) { +static aievec::aie1::UPDOp generateUPDOp( + TransferReadOp readOp, + mlir::DenseMap, + std::pair> &memToUpdMap, + Region ®ion, VectState *state) { // Get the read access extent and interval of this read operation IntervalReuse *iv = state->getIntervalForOperation(readOp); auto extent = iv->getAccessExtent(readOp); @@ -1007,7 +1007,7 @@ generateUPDOp(TransferReadOp readOp, : mid; // Find if we have already created upd op idx=0/idx=1 for this interval - aievec::UPDOp updOp = nullptr; + aievec::aie1::UPDOp updOp = nullptr; // initial value 0 of updIndices means neither upd op idx=0 nor idx=1 were // created. int8_t updIndices = 0; @@ -1064,7 +1064,7 @@ generateUPDOp(TransferReadOp readOp, if (lb <= start && ub >= end && (updIndices & idx) == 0) { // Generate the upd instruction, and link it with a previous upd op // corresponding to the same read. - updOp = state->builder.create( + updOp = state->builder.create( readOp.getLoc(), updVecType, readOp.getSource(), indices, start - offset, idx - 1, updOp ? updOp.getResult() : TypedValue(nullptr)); @@ -2146,8 +2146,8 @@ static bool canFuseMulFMAOpsForInt16(Operation *Op) { } // Check 6. The def of two operands are upd operations - auto lUpdOp = dyn_cast(lhs.getDefiningOp()); - auto rUpdOp = dyn_cast(rhs.getDefiningOp()); + auto lUpdOp = dyn_cast(lhs.getDefiningOp()); + auto rUpdOp = dyn_cast(rhs.getDefiningOp()); if (!lUpdOp || !rUpdOp) { return false; @@ -2179,9 +2179,10 @@ static void fuseMulFMAOpsForInt16(Operation *Op, VectState *state) { // lhs of current FMAOp should be an upd operation with 512-bit vector width. // For AIE-ML, we can directly load 512 bits vectors. Thus, we can delete the // upd operation with index 1. - auto lUpdOp = dyn_cast(lhs.getDefiningOp()); + auto lUpdOp = dyn_cast(lhs.getDefiningOp()); if (lUpdOp.getIndex() == 1) { - auto lUpdOp0 = dyn_cast(lUpdOp.getVector().getDefiningOp()); + auto lUpdOp0 = + dyn_cast(lUpdOp.getVector().getDefiningOp()); lUpdOp->replaceAllUsesWith(lUpdOp0); lUpdOp->erase(); } @@ -2189,7 +2190,8 @@ static void fuseMulFMAOpsForInt16(Operation *Op, VectState *state) { // 2. Deal with the rhs: // Since vector size of current FMAOp rhs is 256 bits, we need to generate a // concat op to make the vector size to 512 bits. - auto rUpdOp = dyn_cast(curOp->getOperand(1).getDefiningOp()); + auto rUpdOp = + dyn_cast(curOp->getOperand(1).getDefiningOp()); state->builder.setInsertionPointAfter(rUpdOp); AIEVecAttributes rstat = getOperandVecStats(curOp, state, 1); assert(rstat.vecSizeInBits % 256 == 0); @@ -2434,16 +2436,17 @@ static void insertUPDOpsInLoop(affine::AffineForOp forOp, VectState *state) { // achieving that. The value also has an 8-bit field, whose first/second bit // is set if upd op idx=0/idx=1 is already created for this interval. mlir::DenseMap, - std::pair> + std::pair> memToUpdMap; // A map from a read operation to its corresponding UPD operation. The idea // is that multiple read ops will derive from the same bigger vector // register. - mlir::DenseMap readOpToUpdMap; + mlir::DenseMap readOpToUpdMap; // Iterate over all the transfer_read ops within this loop Region ®ion = forOp.getRegion(); for (TransferReadOp readOp : region.getOps()) { - aievec::UPDOp updOp = generateUPDOp(readOp, memToUpdMap, region, state); + aievec::aie1::UPDOp updOp = + generateUPDOp(readOp, memToUpdMap, region, state); readOpToUpdMap[readOp] = updOp; } From c49bf4e23d2f39e1f2a230ce24497b2f74d6ab0d Mon Sep 17 00:00:00 2001 From: jamestcl-amd Date: Thu, 8 Aug 2024 13:03:57 -0700 Subject: [PATCH 5/7] Update vector->AIEVEC --- .../Transforms/VectorToAIEVecConversions.cpp | 87 +++++++++++++------ 1 file changed, 62 insertions(+), 25 deletions(-) diff --git a/lib/Dialect/AIEVec/Transforms/VectorToAIEVecConversions.cpp b/lib/Dialect/AIEVec/Transforms/VectorToAIEVecConversions.cpp index 8ab1da0617..ff3afda896 100644 --- a/lib/Dialect/AIEVec/Transforms/VectorToAIEVecConversions.cpp +++ b/lib/Dialect/AIEVec/Transforms/VectorToAIEVecConversions.cpp @@ -993,6 +993,7 @@ struct ConvertMulAddToAIEVecFMAOpPattern // This pattern replaces `vector.transfer_read` with `aievec.upd`. Right now, // it performs a naïve direct translation. This needs to be expanded to // support more complex scenarios. +template struct LowerVectorTransferReadToAIEUPD : OpConversionPattern { using OpConversionPattern::OpConversionPattern; @@ -1043,11 +1044,11 @@ struct LowerVectorTransferReadToAIEUPD if ((vSize > minVectorSize) && std::bitset<8>(multiplicity).count() != 1) return failure(); - auto updOp = rewriter.create( + auto updOp = rewriter.create( readOp.getLoc(), vType, adaptor.getSource(), adaptor.getIndices(), 0, 0, TypedValue(nullptr)); if (vSize > maxLoadSize) { - updOp = rewriter.create( + updOp = rewriter.create( readOp.getLoc(), vType, adaptor.getSource(), adaptor.getIndices(), maxLoadSize, 1, updOp.getResult()); } @@ -1059,6 +1060,11 @@ struct LowerVectorTransferReadToAIEUPD int64_t minVectorSize, maxVectorSize, vectorAlignment, maxLoadSize; }; +using LowerVectorTransferReadToAIE1UPD = + LowerVectorTransferReadToAIEUPD; +using LowerVectorTransferReadToAIE2UPD = + LowerVectorTransferReadToAIEUPD; + // XXX: Notice that this template doesn't verify that the vector element type // XXX: is supported by the target architecture. template @@ -1824,14 +1830,13 @@ struct LowerVectorExtractStridedSliceOpAIE2Pattern // Replaces a short UPD op with a wide one followed by an ext op of the bottom // half. -struct ExpandUPDToUPDAndExtPattern : OpConversionPattern { - using OpConversionPattern::OpConversionPattern; - - ExpandUPDToUPDAndExtPattern(MLIRContext *context) - : OpConversionPattern(context) {} +template +struct ExpandUPDToUPDAndExtPattern : OpConversionPattern { + using OpConversionPattern::OpConversionPattern; + using OpAdaptor = typename UpdOpTy::Adaptor; LogicalResult - matchAndRewrite(aievec::UPDOp updOp, OpAdaptor adaptor, + matchAndRewrite(UpdOpTy updOp, OpAdaptor adaptor, ConversionPatternRewriter &rewriter) const override { // Verify that we haven't already expanded this one if (updOp->hasOneUse() && isa(*updOp->getUsers().begin())) @@ -1842,31 +1847,36 @@ struct ExpandUPDToUPDAndExtPattern : OpConversionPattern { vecType.getShape().end()); vecShape[vecType.getRank() - 1] *= 2; auto longVecType = VectorType::get(vecShape, vecType.getElementType()); - auto newUpdOp = rewriter.create( + auto newUpdOp = rewriter.create( updOp.getLoc(), longVecType, adaptor.getSource(), adaptor.getIndices(), adaptor.getOffset(), adaptor.getIndex(), adaptor.getVector()); - rewriter.replaceOpWithNewOp( - updOp, vecType, newUpdOp.getResult(), rewriter.getI8IntegerAttr(0)); + rewriter.replaceOpWithNewOp(updOp, vecType, newUpdOp.getResult(), + rewriter.getI8IntegerAttr(0)); return success(); } }; +using ExpandAIE1UPDToUPDAndExtPattern = + ExpandUPDToUPDAndExtPattern; +using ExpandAIE2UPDToUPDAndExtPattern = + ExpandUPDToUPDAndExtPattern; + // Replaces a wide UPD op followed by an ext op of the bottom half with a short // UPD op. -struct FuseExtIntoUPDPattern : OpConversionPattern { - using OpConversionPattern::OpConversionPattern; - - FuseExtIntoUPDPattern(MLIRContext *context) : OpConversionPattern(context) {} +template +struct FuseExtIntoUPDPattern : OpConversionPattern { + using OpConversionPattern::OpConversionPattern; + using OpAdaptor = typename ExtOpTy::Adaptor; LogicalResult - matchAndRewrite(aievec::ExtOp extOp, OpAdaptor adaptor, + matchAndRewrite(ExtOpTy extOp, OpAdaptor adaptor, ConversionPatternRewriter &rewriter) const override { // Verify we are extracting the lower half... if (extOp.getIndex() != 0) return failure(); // ...of a UPDOp - auto updOp = dyn_cast(extOp.getSource().getDefiningOp()); + auto updOp = dyn_cast(extOp.getSource().getDefiningOp()); if (!updOp) return failure(); @@ -1874,7 +1884,7 @@ struct FuseExtIntoUPDPattern : OpConversionPattern { if (!updOp->hasOneUse()) return failure(); - rewriter.replaceOpWithNewOp( + rewriter.replaceOpWithNewOp( extOp, extOp.getType(), updOp.getSource(), updOp.getIndices(), updOp.getOffset(), updOp.getIndex(), updOp.getVector()); @@ -1882,6 +1892,11 @@ struct FuseExtIntoUPDPattern : OpConversionPattern { } }; +using FuseAIE1ExtIntoUPDPattern = + FuseExtIntoUPDPattern; +using FuseAIE2ExtIntoUPDPattern = + FuseExtIntoUPDPattern; + // Lower ExpOp to function call struct ComputeExpOpByLUTPattern : OpConversionPattern { using OpConversionPattern::OpConversionPattern; @@ -2994,8 +3009,8 @@ static void populateAIEVecCommonConversionPatterns(RewritePatternSet &patterns, static void populateAIEVecV1ConversionPatterns(RewritePatternSet &patterns, TargetBackend backend) { - patterns.add(patterns.getContext(), 128, 512, - 128, 256); + patterns.add(patterns.getContext(), 128, + 512, 128, 256); // clang-format off patterns.add(patterns.getContext(), 128, 1024, 256, 1024); patterns.add< LowerVectorAddFOpToAIEVecAddElemOp, @@ -3860,8 +3875,12 @@ struct ExtendUPDOpsPass : PassWrapper> { MLIRContext *context = &getContext(); RewritePatternSet patterns(context); ConversionTarget target(*context); - patterns.add(patterns.getContext()); - target.addLegalDialect(); + patterns + .add( + patterns.getContext()); + target.addLegalDialect(); + target.addDynamicallyLegalOp([](aievec::UPDOp op) { return op.getVector() || (op->hasOneUse() && isa(*op->getUsers().begin())) || @@ -3869,6 +3888,16 @@ struct ExtendUPDOpsPass : PassWrapper> { [](Operation *op) { return isa(op); }); }); + target.addDynamicallyLegalOp( + [](aievec::aie1::UPDOp op) { + return op.getVector() || + (op->hasOneUse() && + isa(*op->getUsers().begin())) || + llvm::all_of(op->getUsers(), [](Operation *op) { + return isa(op); + }); + }); + if (auto op = getOperation(); failed(applyPartialConversion(op, target, std::move(patterns)))) { return signalPassFailure(); @@ -3887,13 +3916,21 @@ struct SimplifyUPDOpsPass : PassWrapper> { MLIRContext *context = &getContext(); RewritePatternSet patterns(context); ConversionTarget target(*context); - patterns.add(patterns.getContext()); - target.addLegalDialect(); + patterns.add( + patterns.getContext()); + target.addLegalDialect(); target.addDynamicallyLegalOp([](aievec::ExtOp op) { auto defOp = op.getSource().getDefiningOp(); return !defOp || !isa(defOp) || !defOp->hasOneUse() || op.getIndex() != 0; }); + target.addDynamicallyLegalOp( + [](aievec::aie1::ExtOp op) { + auto defOp = op.getSource().getDefiningOp(); + return !defOp || !isa(defOp) || + !defOp->hasOneUse() || op.getIndex() != 0; + }); if (auto op = getOperation(); failed(applyPartialConversion(op, target, std::move(patterns)))) { From 54f44d54af3de68dba0a6b36a0bdf0e7b2f9f355 Mon Sep 17 00:00:00 2001 From: jamestcl-amd Date: Fri, 9 Aug 2024 10:07:57 -0700 Subject: [PATCH 6/7] Fix AIEVectorize AIE1 tests --- .../gemm64_int16_unroll16_vectorized.mlir | 36 +++++----- test/Conversion/VectorToAIEVec/test-upd.mlir | 8 +-- .../VectorToAIEVec/unaligned-load.mlir | 8 +-- .../AIEVecToCpp/translate_conv2d_uij_f32.mlir | 36 +++++----- .../AIEVecToCpp/translate_conv2d_uij_i16.mlir | 64 ++++++++--------- .../AIEVecToCpp/translate_conv2d_uij_i32.mlir | 72 +++++++++---------- .../AIEVecToCpp/translate_conv2d_uij_i8.mlir | 22 +++--- test/aievec/conv2d_msc_uij_f32_noinit.mlir | 16 ++--- test/aievec/conv2d_msc_uij_i32_noinit.mlir | 16 ++--- test/aievec/conv2d_uij_f32.mlir | 18 ++--- test/aievec/conv2d_uij_f32_noinit.mlir | 16 ++--- test/aievec/conv2d_uij_f32_unbounded.mlir | 36 +++++----- test/aievec/conv2d_uij_i16.mlir | 16 ++--- test/aievec/conv2d_uij_i16_noinit.mlir | 14 ++-- test/aievec/conv2d_uij_i16_unbounded.mlir | 32 ++++----- test/aievec/conv2d_uij_i32.mlir | 18 ++--- test/aievec/conv2d_uij_i32_noinit.mlir | 16 ++--- test/aievec/conv2d_uij_i32_unbounded.mlir | 36 +++++----- test/aievec/conv2d_uij_i8.mlir | 12 ++-- test/aievec/conv2d_uij_i8_noinit.mlir | 10 +-- test/aievec/conv2d_uj_i16.mlir | 8 +-- test/aievec/conv2d_uj_i32.mlir | 8 +-- test/aievec/test_reassoc.mlir | 18 ++--- test/aievec/test_srs.mlir | 6 +- 24 files changed, 271 insertions(+), 271 deletions(-) diff --git a/test/Conversion/VectorToAIEVec/gemm64_int16_unroll16_vectorized.mlir b/test/Conversion/VectorToAIEVec/gemm64_int16_unroll16_vectorized.mlir index 514c408628..ce62eddadc 100644 --- a/test/Conversion/VectorToAIEVec/gemm64_int16_unroll16_vectorized.mlir +++ b/test/Conversion/VectorToAIEVec/gemm64_int16_unroll16_vectorized.mlir @@ -44,17 +44,17 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre affine.for %arg3 = 0 to 64 { // CHECK: scf.for %[[J:.*]] = %[[C0]] to %[[C64]] step %[[C16]] { affine.for %arg4 = 0 to 64 step 16 { - // CHECK: %[[ACC0:.*]] = aievec.upd %[[MC]][%[[I]], %[[J]]] + // CHECK: %[[ACC0:.*]] = aievec_aie1.upd %[[MC]][%[[I]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %0 = vector.transfer_read %arg2[%arg3, %arg4], %c0_i16 : memref, vector<16xi16> // CHECK: %[[ACCn:.*]] = scf.for %[[K:.*]] = %[[C0]] to %[[C64]] step %[[C16]] // CHECK-SAME: iter_args(%[[ACCk:.*]] = %[[ACC0]]) -> (vector<16xi16>) { %1 = affine.for %arg5 = 0 to 64 step 16 iter_args(%arg6 = %0) -> (vector<16xi16>) { - // CHECK: %[[VA:.*]] = aievec.upd %[[MA]][%[[I]], %[[K]]] + // CHECK: %[[VA:.*]] = aievec_aie1.upd %[[MA]][%[[I]], %[[K]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> - // CHECK: %[[VB0:.*]] = aievec.upd %[[MB]][%[[K]], %[[J]]] + // CHECK: %[[VB0:.*]] = aievec_aie1.upd %[[MB]][%[[K]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VC:.*]] = aievec.ups %[[ACCk]] {shift = 0 : i8} : vector<16xi16>, vector<16xi48> @@ -63,7 +63,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %4 = arith.muli %2, %3 : vector<16xi16> %5 = arith.addi %arg6, %4 : vector<16xi16> // CHECK: %[[K1:.*]] = arith.addi %[[K]], %[[C1]] : index - // CHECK: %[[VB1:.*]] = aievec.upd %[[MB]][%[[K1]], %[[J]]] + // CHECK: %[[VB1:.*]] = aievec_aie1.upd %[[MB]][%[[K1]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VB01:.*]] = aievec.concat %[[VB0]], %[[VB1]] : vector<16xi16>, vector<32xi16> @@ -77,7 +77,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %9 = arith.muli %7, %8 : vector<16xi16> %10 = arith.addi %5, %9 : vector<16xi16> // CHECK: %[[K2:.*]] = arith.addi %[[K]], %[[C2]] : index - // CHECK: %[[VB2:.*]] = aievec.upd %[[MB]][%[[K2]], %[[J]]] + // CHECK: %[[VB2:.*]] = aievec_aie1.upd %[[MB]][%[[K2]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %11 = affine.apply #map2(%arg5) @@ -86,7 +86,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %14 = arith.muli %12, %13 : vector<16xi16> %15 = arith.addi %10, %14 : vector<16xi16> // CHECK: %[[K3:.*]] = arith.addi %[[K]], %[[C3]] : index - // CHECK: %[[VB3:.*]] = aievec.upd %[[MB]][%[[K3]], %[[J]]] + // CHECK: %[[VB3:.*]] = aievec_aie1.upd %[[MB]][%[[K3]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VB23:.*]] = aievec.concat %[[VB2]], %[[VB3]] : vector<16xi16>, vector<32xi16> @@ -99,7 +99,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %19 = arith.muli %17, %18 : vector<16xi16> %20 = arith.addi %15, %19 : vector<16xi16> // CHECK: %[[K4:.*]] = arith.addi %[[K]], %[[C4]] : index - // CHECK: %[[VB4:.*]] = aievec.upd %[[MB]][%[[K4]], %[[J]]] + // CHECK: %[[VB4:.*]] = aievec_aie1.upd %[[MB]][%[[K4]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %21 = affine.apply #map4(%arg5) @@ -108,7 +108,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %24 = arith.muli %22, %23 : vector<16xi16> %25 = arith.addi %20, %24 : vector<16xi16> // CHECK: %[[K5:.*]] = arith.addi %[[K]], %[[C5]] : index - // CHECK: %[[VB5:.*]] = aievec.upd %[[MB]][%[[K5]], %[[J]]] + // CHECK: %[[VB5:.*]] = aievec_aie1.upd %[[MB]][%[[K5]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VB45:.*]] = aievec.concat %[[VB4]], %[[VB5]] : vector<16xi16>, vector<32xi16> @@ -121,7 +121,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %29 = arith.muli %27, %28 : vector<16xi16> %30 = arith.addi %25, %29 : vector<16xi16> // CHECK: %[[K6:.*]] = arith.addi %[[K]], %[[C6]] : index - // CHECK: %[[VB6:.*]] = aievec.upd %[[MB]][%[[K6]], %[[J]]] + // CHECK: %[[VB6:.*]] = aievec_aie1.upd %[[MB]][%[[K6]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %31 = affine.apply #map6(%arg5) @@ -130,7 +130,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %34 = arith.muli %32, %33 : vector<16xi16> %35 = arith.addi %30, %34 : vector<16xi16> // CHECK: %[[K7:.*]] = arith.addi %[[K]], %[[C7]] : index - // CHECK: %[[VB7:.*]] = aievec.upd %[[MB]][%[[K7]], %[[J]]] + // CHECK: %[[VB7:.*]] = aievec_aie1.upd %[[MB]][%[[K7]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VB67:.*]] = aievec.concat %[[VB6]], %[[VB7]] : vector<16xi16>, vector<32xi16> @@ -143,7 +143,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %39 = arith.muli %37, %38 : vector<16xi16> %40 = arith.addi %35, %39 : vector<16xi16> // CHECK: %[[K8:.*]] = arith.addi %[[K]], %[[C8]] : index - // CHECK: %[[VB8:.*]] = aievec.upd %[[MB]][%[[K8]], %[[J]]] + // CHECK: %[[VB8:.*]] = aievec_aie1.upd %[[MB]][%[[K8]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %41 = affine.apply #map8(%arg5) @@ -152,7 +152,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %44 = arith.muli %42, %43 : vector<16xi16> %45 = arith.addi %40, %44 : vector<16xi16> // CHECK: %[[K9:.*]] = arith.addi %[[K]], %[[C9]] : index - // CHECK: %[[VB9:.*]] = aievec.upd %[[MB]][%[[K9]], %[[J]]] + // CHECK: %[[VB9:.*]] = aievec_aie1.upd %[[MB]][%[[K9]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VB89:.*]] = aievec.concat %[[VB8]], %[[VB9]] : vector<16xi16>, vector<32xi16> @@ -165,7 +165,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %49 = arith.muli %47, %48 : vector<16xi16> %50 = arith.addi %45, %49 : vector<16xi16> // CHECK: %[[K10:.*]] = arith.addi %[[K]], %[[C10]] : index - // CHECK: %[[VB10:.*]] = aievec.upd %[[MB]][%[[K10]], %[[J]]] + // CHECK: %[[VB10:.*]] = aievec_aie1.upd %[[MB]][%[[K10]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %51 = affine.apply #map10(%arg5) @@ -174,7 +174,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %54 = arith.muli %52, %53 : vector<16xi16> %55 = arith.addi %50, %54 : vector<16xi16> // CHECK: %[[K11:.*]] = arith.addi %[[K]], %[[C11]] : index - // CHECK: %[[VB11:.*]] = aievec.upd %[[MB]][%[[K11]], %[[J]]] + // CHECK: %[[VB11:.*]] = aievec_aie1.upd %[[MB]][%[[K11]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VBab:.*]] = aievec.concat %[[VB10]], %[[VB11]] : vector<16xi16>, vector<32xi16> @@ -187,7 +187,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %59 = arith.muli %57, %58 : vector<16xi16> %60 = arith.addi %55, %59 : vector<16xi16> // CHECK: %[[K12:.*]] = arith.addi %[[K]], %[[C12]] : index - // CHECK: %[[VB12:.*]] = aievec.upd %[[MB]][%[[K12]], %[[J]]] + // CHECK: %[[VB12:.*]] = aievec_aie1.upd %[[MB]][%[[K12]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %61 = affine.apply #map12(%arg5) @@ -196,7 +196,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %64 = arith.muli %62, %63 : vector<16xi16> %65 = arith.addi %60, %64 : vector<16xi16> // CHECK: %[[K13:.*]] = arith.addi %[[K]], %[[C13]] : index - // CHECK: %[[VB13:.*]] = aievec.upd %[[MB]][%[[K13]], %[[J]]] + // CHECK: %[[VB13:.*]] = aievec_aie1.upd %[[MB]][%[[K13]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VBcd:.*]] = aievec.concat %[[VB12]], %[[VB13]] : vector<16xi16>, vector<32xi16> @@ -209,7 +209,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %69 = arith.muli %67, %68 : vector<16xi16> %70 = arith.addi %65, %69 : vector<16xi16> // CHECK: %[[K14:.*]] = arith.addi %[[K]], %[[C14]] : index - // CHECK: %[[VB14:.*]] = aievec.upd %[[MB]][%[[K14]], %[[J]]] + // CHECK: %[[VB14:.*]] = aievec_aie1.upd %[[MB]][%[[K14]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> %71 = affine.apply #map14(%arg5) @@ -218,7 +218,7 @@ func.func @matmul(%arg0: memref, %arg1: memref, %arg2: memre %74 = arith.muli %72, %73 : vector<16xi16> %75 = arith.addi %70, %74 : vector<16xi16> // CHECK: %[[K15:.*]] = arith.addi %[[K]], %[[C15]] : index - // CHECK: %[[VB15:.*]] = aievec.upd %[[MB]][%[[K15]], %[[J]]] + // CHECK: %[[VB15:.*]] = aievec_aie1.upd %[[MB]][%[[K15]], %[[J]]] // CHECK-SAME: {index = 0 : i8, offset = 0 : i32} // CHECK-SAME: : memref, vector<16xi16> // CHECK: %[[VBef:.*]] = aievec.concat %[[VB14]], %[[VB15]] : vector<16xi16>, vector<32xi16> diff --git a/test/Conversion/VectorToAIEVec/test-upd.mlir b/test/Conversion/VectorToAIEVec/test-upd.mlir index 2edec34d08..184fe747d2 100644 --- a/test/Conversion/VectorToAIEVec/test-upd.mlir +++ b/test/Conversion/VectorToAIEVec/test-upd.mlir @@ -25,7 +25,7 @@ func.func @veccopy_i8(%arg0: memref<256xi8>, %arg1: memref<256xi8>) { func.func @veccopy_i16(%arg0: memref<256xi16>, %arg1: memref<256xi16>) { %c0_i16 = arith.constant 0 : i16 affine.for %arg2 = 0 to 256 step 16 { - // CHECK: %[[LD:.*]] = aievec.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi16>, vector<16xi16> + // CHECK: %[[LD:.*]] = aievec_aie1.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi16>, vector<16xi16> // CHECK-V2: %[[LD:.*]] = aievec.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi16>, vector<16xi16> // CHECK-V2-LLVM: %[[LD:.*]] = vector.transfer_read {{.*}}, {{.*}} : memref<256xi16>, vector<16xi16> %0 = vector.transfer_read %arg0[%arg2], %c0_i16 : memref<256xi16>, vector<16xi16> @@ -45,7 +45,7 @@ func.func @veccopy_i16(%arg0: memref<256xi16>, %arg1: memref<256xi16>) { func.func @veccopy_i32(%arg0: memref<256xi32>, %arg1: memref<256xi32>) { %c0_i32 = arith.constant 0 : i32 affine.for %arg2 = 0 to 256 step 8 { - // CHECK: %[[LD:.*]] = aievec.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi32>, vector<8xi32> + // CHECK: %[[LD:.*]] = aievec_aie1.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi32>, vector<8xi32> // CHECK-V2: %[[LD:.*]] = aievec.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi32>, vector<8xi32> // CHECK-V2-LLVM: %[[LD:.*]] = vector.transfer_read {{.*}}, {{.*}} : memref<256xi32>, vector<8xi32> %0 = vector.transfer_read %arg0[%arg2], %c0_i32 : memref<256xi32>, vector<8xi32> @@ -65,8 +65,8 @@ func.func @veccopy_i32(%arg0: memref<256xi32>, %arg1: memref<256xi32>) { func.func @veccopy_long_i32(%arg0: memref<256xi32>, %arg1: memref<256xi32>) { %c0_i32 = arith.constant 0 : i32 affine.for %arg2 = 0 to 256 step 16 { - // CHECK: %[[LD0:.*]] = aievec.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi32>, vector<16xi32> - // CHECK-NEXT: %[[LD1:.*]] = aievec.upd {{.*}}, %[[LD0]] {index = 1 : i8, offset = 256 : i32} : memref<256xi32>, vector<16xi32> + // CHECK: %[[LD0:.*]] = aievec_aie1.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi32>, vector<16xi32> + // CHECK-NEXT: %[[LD1:.*]] = aievec_aie1.upd {{.*}}, %[[LD0]] {index = 1 : i8, offset = 256 : i32} : memref<256xi32>, vector<16xi32> // CHECK-V2: %[[LD:.*]] = aievec.upd {{.*}} {index = 0 : i8, offset = 0 : i32} : memref<256xi32>, vector<16xi32> // CHECK-V2-LLVM: %[[LD:.*]] = vector.transfer_read {{.*}}, {{.*}} : memref<256xi32>, vector<16xi32> %0 = vector.transfer_read %arg0[%arg2], %c0_i32 : memref<256xi32>, vector<16xi32> diff --git a/test/Conversion/VectorToAIEVec/unaligned-load.mlir b/test/Conversion/VectorToAIEVec/unaligned-load.mlir index 99b56ec9a0..1d0e3bb021 100644 --- a/test/Conversion/VectorToAIEVec/unaligned-load.mlir +++ b/test/Conversion/VectorToAIEVec/unaligned-load.mlir @@ -3,8 +3,8 @@ // CHECK-LABEL: func @unaligned_read // CHECK: %[[C0:.*]] = arith.constant 0 : index -// CHECK: %[[V0B:.*]] = aievec.upd %{{.*}}[%[[C0]]] {index = 0 : i8, offset = 0 : i32} : memref<64xi32>, vector<16xi32> -// CHECK: %[[V0T:.*]] = aievec.upd %{{.*}}[%[[C0]]], %[[V0B]] {index = 1 : i8, offset = 256 : i32} : memref<64xi32>, vector<16xi32> +// CHECK: %[[V0B:.*]] = aievec_aie1.upd %{{.*}}[%[[C0]]] {index = 0 : i8, offset = 0 : i32} : memref<64xi32>, vector<16xi32> +// CHECK: %[[V0T:.*]] = aievec_aie1.upd %{{.*}}[%[[C0]]], %[[V0B]] {index = 1 : i8, offset = 256 : i32} : memref<64xi32>, vector<16xi32> // CHECK: %[[V0ROT:.*]] = aievec_aie1.select %[[V0T]] {select = "0", xoffsets = "0x76543210", xsquare = "0x3210", xstart = "3", // CHECK-SAME: yoffsets = "0", ysquare = "0", ystart = "0"} // CHECK-SAME: : vector<16xi32>, vector<16xi32> @@ -38,8 +38,8 @@ func.func @unaligned_read(%m: memref<64xi32>) -> (vector<8xi32>, vector<8xi32>) // CHECK-LABEL: func @unaligned_read // CHECK: %[[C0:.*]] = arith.constant 0 : index -// CHECK: %[[V0B:.*]] = aievec.upd %{{.*}}[%[[C0]]] {index = 0 : i8, offset = 0 : i32} : memref<64xi16>, vector<32xi16> -// CHECK: %[[V0T:.*]] = aievec.upd %{{.*}}[%[[C0]]], %[[V0B]] {index = 1 : i8, offset = 256 : i32} : memref<64xi16>, vector<32xi16> +// CHECK: %[[V0B:.*]] = aievec_aie1.upd %{{.*}}[%[[C0]]] {index = 0 : i8, offset = 0 : i32} : memref<64xi16>, vector<32xi16> +// CHECK: %[[V0T:.*]] = aievec_aie1.upd %{{.*}}[%[[C0]]], %[[V0B]] {index = 1 : i8, offset = 256 : i32} : memref<64xi16>, vector<32xi16> // CHECK: %[[V0ROT:.*]] = aievec_aie1.select %[[V0T]] {select = "0x11111111", xoffsets = "0x06040200", xoffsets_hi = "0x0e0c0a08", xsquare = "0x2103", xstart = "4", // CHECK-SAME: yoffsets = "0x0503010f", yoffsets_hi = "0x0d0b0907", ysquare = "0x2103", ystart = "2"} // CHECK-SAME: : vector<32xi16>, vector<32xi16> diff --git a/test/Targets/AIEVecToCpp/translate_conv2d_uij_f32.mlir b/test/Targets/AIEVecToCpp/translate_conv2d_uij_f32.mlir index 992339f6db..6c5add3134 100644 --- a/test/Targets/AIEVecToCpp/translate_conv2d_uij_f32.mlir +++ b/test/Targets/AIEVecToCpp/translate_conv2d_uij_f32.mlir @@ -16,8 +16,8 @@ func.func @conv2d_0(%arg0: memref, %arg1: memref, %arg2: memref< %c0 = arith.constant 0 : index %0 = memref.dim %arg0, %c0 : memref %1 = memref.dim %arg0, %c1 : memref - %2 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> - %3 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> + %2 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> + %3 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> %c0_0 = arith.constant 0 : index %c1_1 = arith.constant 1 : index scf.for %arg3 = %c0_0 to %0 step %c1_1 { @@ -28,22 +28,22 @@ func.func @conv2d_0(%arg0: memref, %arg1: memref, %arg2: memref< %c0_3 = arith.constant 0 : index %c8_4 = arith.constant 8 : index scf.for %arg4 = %c0_3 to %1 step %c8_4 { - %6 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> - %7 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> + %6 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> + %7 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> %8 = aievec_aie1.mac %7, %2, %6 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %c1_5 = arith.constant 1 : index %9 = arith.addi %arg4, %c1_5 : index - %10 = aievec.upd %arg0[%arg3, %9], %7 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> + %10 = aievec_aie1.upd %arg0[%arg3, %9], %7 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> %11 = aievec_aie1.mac %10, %2, %8 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %12 = aievec_aie1.mac %10, %2, %11 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %13 = aievec.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> + %13 = aievec_aie1.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> %14 = aievec_aie1.mac %13, %2, %12 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %15 = aievec.upd %arg0[%4, %9], %13 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> + %15 = aievec_aie1.upd %arg0[%4, %9], %13 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> %16 = aievec_aie1.mac %15, %2, %14 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %17 = aievec_aie1.mac %15, %2, %16 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %18 = aievec.upd %arg0[%5, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> + %18 = aievec_aie1.upd %arg0[%5, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> %19 = aievec_aie1.mac %18, %2, %17 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %20 = aievec.upd %arg0[%5, %9], %18 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> + %20 = aievec_aie1.upd %arg0[%5, %9], %18 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> %21 = aievec_aie1.mac %20, %2, %19 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %22 = aievec_aie1.mac %20, %3, %21 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> vector.transfer_write %22, %arg2[%arg3, %arg4] : vector<8xf32>, memref @@ -104,8 +104,8 @@ func.func @conv2d_1(%arg0: memref, %arg1: memref, %arg2: memre %c8 = arith.constant 8 : index %c0 = arith.constant 0 : index %0 = memref.dim %arg0, %c0 : memref - %1 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> - %2 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> + %1 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> + %2 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> %c0_0 = arith.constant 0 : index %c1 = arith.constant 1 : index scf.for %arg3 = %c0_0 to %0 step %c1 { @@ -117,22 +117,22 @@ func.func @conv2d_1(%arg0: memref, %arg1: memref, %arg2: memre %c256 = arith.constant 256 : index %c8_3 = arith.constant 8 : index scf.for %arg4 = %c0_2 to %c256 step %c8_3 { - %5 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> - %6 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> + %5 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> + %6 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> %7 = aievec_aie1.mac %6, %1, %5 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %c1_4 = arith.constant 1 : index %8 = arith.addi %arg4, %c1_4 : index - %9 = aievec.upd %arg0[%arg3, %8], %6 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> + %9 = aievec_aie1.upd %arg0[%arg3, %8], %6 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> %10 = aievec_aie1.mac %9, %1, %7 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %11 = aievec_aie1.mac %9, %1, %10 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %12 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> + %12 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> %13 = aievec_aie1.mac %12, %1, %11 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %14 = aievec.upd %arg0[%3, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> + %14 = aievec_aie1.upd %arg0[%3, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> %15 = aievec_aie1.mac %14, %1, %13 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %16 = aievec_aie1.mac %14, %1, %15 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %17 = aievec.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> + %17 = aievec_aie1.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> %18 = aievec_aie1.mac %17, %1, %16 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xf32>, vector<8xf32>, vector<8xf32> - %19 = aievec.upd %arg0[%4, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> + %19 = aievec_aie1.upd %arg0[%4, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> %20 = aievec_aie1.mac %19, %1, %18 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xf32>, vector<8xf32>, vector<8xf32> %21 = aievec_aie1.mac %19, %2, %20 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> vector.transfer_write %21, %arg2[%arg3, %arg4] : vector<8xf32>, memref diff --git a/test/Targets/AIEVecToCpp/translate_conv2d_uij_i16.mlir b/test/Targets/AIEVecToCpp/translate_conv2d_uij_i16.mlir index e968e1cdec..aca876336f 100644 --- a/test/Targets/AIEVecToCpp/translate_conv2d_uij_i16.mlir +++ b/test/Targets/AIEVecToCpp/translate_conv2d_uij_i16.mlir @@ -14,7 +14,7 @@ module { func.func @conv2d(%arg0: memref<2048x2048xi16>, %arg1: memref<12xi16>, %arg2: memref<2046x2046xi16>) { %c0 = arith.constant 0 : index %c0_i32 = arith.constant 0 : i32 - %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<12xi16>, vector<16xi16> + %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<12xi16>, vector<16xi16> %c0_0 = arith.constant 0 : index %c2046 = arith.constant 2046 : index %c1 = arith.constant 1 : index @@ -27,21 +27,21 @@ module { %c2046_3 = arith.constant 2046 : index %c16 = arith.constant 16 : index scf.for %arg4 = %c0_2 to %c2046_3 step %c16 { - %3 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi16>, vector<16xi16> - %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> + %3 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi16>, vector<16xi16> + %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> %5 = aievec.ups %3 {shift = 0 : i8} : vector<16xi16>, vector<16xi48> %6 = aievec_aie1.mac %4, %0, %5 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %c1_4 = arith.constant 1 : index %7 = arith.addi %arg4, %c1_4 : index - %8 = aievec.upd %arg0[%arg3, %7], %4 {index = 1 : i8, offset = 240 : i32} : memref<2048x2048xi16>, vector<32xi16> + %8 = aievec_aie1.upd %arg0[%arg3, %7], %4 {index = 1 : i8, offset = 240 : i32} : memref<2048x2048xi16>, vector<32xi16> %9 = aievec_aie1.mac %8, %0, %6 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %10 = aievec.upd %arg0[%1, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> + %10 = aievec_aie1.upd %arg0[%1, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> %11 = aievec_aie1.mac %10, %0, %9 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %12 = aievec.upd %arg0[%1, %7], %10 {index = 1 : i8, offset = 240 : i32} : memref<2048x2048xi16>, vector<32xi16> + %12 = aievec_aie1.upd %arg0[%1, %7], %10 {index = 1 : i8, offset = 240 : i32} : memref<2048x2048xi16>, vector<32xi16> %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %14 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> + %14 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> %15 = aievec_aie1.mac %14, %0, %13 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %16 = aievec.upd %arg0[%2, %7], %14 {index = 1 : i8, offset = 240 : i32} : memref<2048x2048xi16>, vector<32xi16> + %16 = aievec_aie1.upd %arg0[%2, %7], %14 {index = 1 : i8, offset = 240 : i32} : memref<2048x2048xi16>, vector<32xi16> %17 = aievec_aie1.mac %16, %0, %15 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %18 = aievec.srs %17, %c0_i32 : vector<16xi48>, i32, vector<16xi16> vector.transfer_write %18, %arg2[%arg3, %arg4] : vector<16xi16>, memref<2046x2046xi16> @@ -102,7 +102,7 @@ module { func.func @conv2d(%arg0: memref, %arg1: memref, %arg2: memref, %arg3: index, %arg4: index) { %c0 = arith.constant 0 : index %c0_i32 = arith.constant 0 : i32 - %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> + %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> %c0_0 = arith.constant 0 : index %c1 = arith.constant 1 : index scf.for %arg5 = %c0_0 to %arg3 step %c1 { @@ -113,21 +113,21 @@ module { %c0_2 = arith.constant 0 : index %c16 = arith.constant 16 : index scf.for %arg6 = %c0_2 to %arg4 step %c16 { - %3 = aievec.upd %arg2[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> - %4 = aievec.upd %arg0[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %3 = aievec_aie1.upd %arg2[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> + %4 = aievec_aie1.upd %arg0[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> %5 = aievec.ups %3 {shift = 0 : i8} : vector<16xi16>, vector<16xi48> %6 = aievec_aie1.mac %4, %0, %5 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %c1_3 = arith.constant 1 : index %7 = arith.addi %arg6, %c1_3 : index - %8 = aievec.upd %arg0[%arg5, %7], %4 {index = 1 : i8, offset = 240 : i32} : memref, vector<32xi16> + %8 = aievec_aie1.upd %arg0[%arg5, %7], %4 {index = 1 : i8, offset = 240 : i32} : memref, vector<32xi16> %9 = aievec_aie1.mac %8, %0, %6 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %10 = aievec.upd %arg0[%1, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %10 = aievec_aie1.upd %arg0[%1, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> %11 = aievec_aie1.mac %10, %0, %9 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %12 = aievec.upd %arg0[%1, %7], %10 {index = 1 : i8, offset = 240 : i32} : memref, vector<32xi16> + %12 = aievec_aie1.upd %arg0[%1, %7], %10 {index = 1 : i8, offset = 240 : i32} : memref, vector<32xi16> %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %14 = aievec.upd %arg0[%2, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %14 = aievec_aie1.upd %arg0[%2, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> %15 = aievec_aie1.mac %14, %0, %13 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %16 = aievec.upd %arg0[%2, %7], %14 {index = 1 : i8, offset = 240 : i32} : memref, vector<32xi16> + %16 = aievec_aie1.upd %arg0[%2, %7], %14 {index = 1 : i8, offset = 240 : i32} : memref, vector<32xi16> %17 = aievec_aie1.mac %16, %0, %15 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %18 = aievec.srs %17, %c0_i32 : vector<16xi48>, i32, vector<16xi16> vector.transfer_write %18, %arg2[%arg5, %arg6] : vector<16xi16>, memref @@ -187,7 +187,7 @@ module { %c0_i32 = arith.constant 0 : i32 %0 = memref.dim %arg0, %c0 : memref %1 = memref.dim %arg0, %c1 : memref - %2 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> + %2 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> %c0_0 = arith.constant 0 : index %c1_1 = arith.constant 1 : index scf.for %arg3 = %c0_0 to %0 step %c1_1 { @@ -198,18 +198,18 @@ module { %c0_3 = arith.constant 0 : index %c16 = arith.constant 16 : index scf.for %arg4 = %c0_3 to %1 step %c16 { - %5 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> - %6 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> - %7 = aievec.upd %arg0[%arg3, %arg4], %6 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> + %5 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> + %6 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %7 = aievec_aie1.upd %arg0[%arg3, %arg4], %6 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> %8 = aievec.ups %5 {shift = 0 : i8} : vector<16xi16>, vector<16xi48> %9 = aievec_aie1.mac %7, %2, %8 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %10 = aievec_aie1.mac %7, %2, %9 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %11 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> - %12 = aievec.upd %arg0[%3, %arg4], %11 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> + %11 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %12 = aievec_aie1.upd %arg0[%3, %arg4], %11 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> %13 = aievec_aie1.mac %12, %2, %10 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %14 = aievec_aie1.mac %12, %2, %13 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %15 = aievec.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> - %16 = aievec.upd %arg0[%4, %arg4], %15 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> + %15 = aievec_aie1.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %16 = aievec_aie1.upd %arg0[%4, %arg4], %15 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> %17 = aievec_aie1.mac %16, %2, %14 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %18 = aievec_aie1.mac %16, %2, %17 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %19 = aievec.srs %18, %c0_i32 : vector<16xi48>, i32, vector<16xi16> @@ -266,7 +266,7 @@ module { %c0 = arith.constant 0 : index %c0_i32 = arith.constant 0 : i32 %0 = memref.dim %arg0, %c0 : memref - %1 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> + %1 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> %c0_0 = arith.constant 0 : index %c1 = arith.constant 1 : index scf.for %arg3 = %c0_0 to %0 step %c1 { @@ -278,18 +278,18 @@ module { %c256 = arith.constant 256 : index %c16 = arith.constant 16 : index scf.for %arg4 = %c0_2 to %c256 step %c16 { - %4 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> - %5 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> - %6 = aievec.upd %arg0[%arg3, %arg4], %5 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> + %4 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> + %5 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %6 = aievec_aie1.upd %arg0[%arg3, %arg4], %5 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> %7 = aievec.ups %4 {shift = 0 : i8} : vector<16xi16>, vector<16xi48> %8 = aievec_aie1.mac %6, %1, %7 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %9 = aievec_aie1.mac %6, %1, %8 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %10 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> - %11 = aievec.upd %arg0[%2, %arg4], %10 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> + %10 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %11 = aievec_aie1.upd %arg0[%2, %arg4], %10 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> %12 = aievec_aie1.mac %11, %1, %9 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %13 = aievec_aie1.mac %11, %1, %12 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> - %14 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> - %15 = aievec.upd %arg0[%3, %arg4], %14 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> + %14 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> + %15 = aievec_aie1.upd %arg0[%3, %arg4], %14 {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> %16 = aievec_aie1.mac %15, %1, %13 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %17 = aievec_aie1.mac %15, %1, %16 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> %18 = aievec.srs %17, %c0_i32 : vector<16xi48>, i32, vector<16xi16> diff --git a/test/Targets/AIEVecToCpp/translate_conv2d_uij_i32.mlir b/test/Targets/AIEVecToCpp/translate_conv2d_uij_i32.mlir index 74dfb4e7db..6f402d9ac5 100644 --- a/test/Targets/AIEVecToCpp/translate_conv2d_uij_i32.mlir +++ b/test/Targets/AIEVecToCpp/translate_conv2d_uij_i32.mlir @@ -14,8 +14,8 @@ func.func @conv2d_0(%arg0: memref<2048x2048xi32>, %arg1: memref<9xi32>, %arg2: m %c8 = arith.constant 8 : index %c0 = arith.constant 0 : index %c0_i32 = arith.constant 0 : i32 - %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> - %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> + %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> + %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> %c0_0 = arith.constant 0 : index %c2046 = arith.constant 2046 : index %c1 = arith.constant 1 : index @@ -28,23 +28,23 @@ func.func @conv2d_0(%arg0: memref<2048x2048xi32>, %arg1: memref<9xi32>, %arg2: m %c2046_3 = arith.constant 2046 : index %c8_4 = arith.constant 8 : index scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { - %4 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> - %5 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> + %4 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> + %5 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> %6 = aievec.ups %4 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> %7 = aievec_aie1.mac %5, %0, %6 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %c1_5 = arith.constant 1 : index %8 = arith.addi %arg4, %c1_5 : index - %9 = aievec.upd %arg0[%arg3, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> + %9 = aievec_aie1.upd %arg0[%arg3, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> %10 = aievec_aie1.mac %9, %0, %7 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %11 = aievec_aie1.mac %9, %0, %10 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %12 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> + %12 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %14 = aievec.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> + %14 = aievec_aie1.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> %15 = aievec_aie1.mac %14, %0, %13 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %16 = aievec_aie1.mac %14, %0, %15 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %17 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> + %17 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> %18 = aievec_aie1.mac %17, %0, %16 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %19 = aievec.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> + %19 = aievec_aie1.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> %20 = aievec_aie1.mac %19, %0, %18 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %21 = aievec_aie1.mac %19, %1, %20 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %22 = aievec.srs %21, %c0_i32: vector<8xi80>, i32, vector<8xi32> @@ -110,8 +110,8 @@ func.func @conv2d_1(%arg0: memref, %arg1: memref, %arg2: memref< %c8 = arith.constant 8 : index %c0 = arith.constant 0 : index %c0_i32 = arith.constant 0 : i32 - %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> - %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> %c0_0 = arith.constant 0 : index %c1 = arith.constant 1 : index scf.for %arg5 = %c0_0 to %arg3 step %c1 { @@ -122,23 +122,23 @@ func.func @conv2d_1(%arg0: memref, %arg1: memref, %arg2: memref< %c0_2 = arith.constant 0 : index %c8_3 = arith.constant 8 : index scf.for %arg6 = %c0_2 to %arg4 step %c8_3 { - %4 = aievec.upd %arg2[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> - %5 = aievec.upd %arg0[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %4 = aievec_aie1.upd %arg2[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %5 = aievec_aie1.upd %arg0[%arg5, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %6 = aievec.ups %4 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> %7 = aievec_aie1.mac %5, %0, %6 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %c1_4 = arith.constant 1 : index %8 = arith.addi %arg6, %c1_4 : index - %9 = aievec.upd %arg0[%arg5, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %9 = aievec_aie1.upd %arg0[%arg5, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %10 = aievec_aie1.mac %9, %0, %7 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %11 = aievec_aie1.mac %9, %0, %10 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %12 = aievec.upd %arg0[%2, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %12 = aievec_aie1.upd %arg0[%2, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %14 = aievec.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %14 = aievec_aie1.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %15 = aievec_aie1.mac %14, %0, %13 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %16 = aievec_aie1.mac %14, %0, %15 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %17 = aievec.upd %arg0[%3, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %17 = aievec_aie1.upd %arg0[%3, %arg6] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %18 = aievec_aie1.mac %17, %0, %16 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %19 = aievec.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %19 = aievec_aie1.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %20 = aievec_aie1.mac %19, %0, %18 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %21 = aievec_aie1.mac %19, %1, %20 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %22 = aievec.srs %21, %c0_i32 : vector<8xi80>, i32, vector<8xi32> @@ -203,8 +203,8 @@ func.func @conv2d_2(%arg0: memref, %arg1: memref, %arg2: memref< %c0_i32 = arith.constant 0 : i32 %0 = memref.dim %arg0, %c0 : memref %1 = memref.dim %arg0, %c1 : memref - %2 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> - %3 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %2 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %3 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> %c0_0 = arith.constant 0 : index %c1_1 = arith.constant 1 : index scf.for %arg3 = %c0_0 to %0 step %c1_1 { @@ -215,23 +215,23 @@ func.func @conv2d_2(%arg0: memref, %arg1: memref, %arg2: memref< %c0_3 = arith.constant 0 : index %c8_4 = arith.constant 8 : index scf.for %arg4 = %c0_3 to %1 step %c8_4 { - %6 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> - %7 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %6 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %7 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %8 = aievec.ups %6 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> %9 = aievec_aie1.mac %7, %2, %8 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %c1_5 = arith.constant 1 : index %10 = arith.addi %arg4, %c1_5 : index - %11 = aievec.upd %arg0[%arg3, %10], %7 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %11 = aievec_aie1.upd %arg0[%arg3, %10], %7 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %12 = aievec_aie1.mac %11, %2, %9 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %13 = aievec_aie1.mac %11, %2, %12 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %14 = aievec.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %14 = aievec_aie1.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %15 = aievec_aie1.mac %14, %2, %13 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %16 = aievec.upd %arg0[%4, %10], %14 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %16 = aievec_aie1.upd %arg0[%4, %10], %14 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %17 = aievec_aie1.mac %16, %2, %15 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %18 = aievec_aie1.mac %16, %2, %17 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %19 = aievec.upd %arg0[%5, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %19 = aievec_aie1.upd %arg0[%5, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %20 = aievec_aie1.mac %19, %2, %18 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %21 = aievec.upd %arg0[%5, %10], %19 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %21 = aievec_aie1.upd %arg0[%5, %10], %19 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %22 = aievec_aie1.mac %21, %2, %20 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %23 = aievec_aie1.mac %21, %3, %22 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %24 = aievec.srs %23, %c0_i32 : vector<8xi80>, i32, vector<8xi32> @@ -294,8 +294,8 @@ func.func @conv2d_3(%arg0: memref, %arg1: memref, %arg2: memre %c0 = arith.constant 0 : index %c0_i32 = arith.constant 0 : i32 %0 = memref.dim %arg0, %c0 : memref - %1 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> - %2 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %1 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %2 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> %c0_0 = arith.constant 0 : index %c1 = arith.constant 1 : index scf.for %arg3 = %c0_0 to %0 step %c1 { @@ -307,23 +307,23 @@ func.func @conv2d_3(%arg0: memref, %arg1: memref, %arg2: memre %c256 = arith.constant 256 : index %c8_3 = arith.constant 8 : index scf.for %arg4 = %c0_2 to %c256 step %c8_3 { - %5 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> - %6 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %5 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> + %6 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %7 = aievec.ups %5 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> %8 = aievec_aie1.mac %6, %1, %7 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %c1_4 = arith.constant 1 : index %9 = arith.addi %arg4, %c1_4 : index - %10 = aievec.upd %arg0[%arg3, %9], %6 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %10 = aievec_aie1.upd %arg0[%arg3, %9], %6 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %11 = aievec_aie1.mac %10, %1, %8 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %12 = aievec_aie1.mac %10, %1, %11 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %13 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %13 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %14 = aievec_aie1.mac %13, %1, %12 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %15 = aievec.upd %arg0[%3, %9], %13 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %15 = aievec_aie1.upd %arg0[%3, %9], %13 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %16 = aievec_aie1.mac %15, %1, %14 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %17 = aievec_aie1.mac %15, %1, %16 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %18 = aievec.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> + %18 = aievec_aie1.upd %arg0[%4, %arg4] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> %19 = aievec_aie1.mac %18, %1, %17 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> - %20 = aievec.upd %arg0[%4, %9], %18 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> + %20 = aievec_aie1.upd %arg0[%4, %9], %18 {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> %21 = aievec_aie1.mac %20, %1, %19 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %22 = aievec_aie1.mac %20, %2, %21 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> %23 = aievec.srs %22, %c0_i32 : vector<8xi80>, i32, vector<8xi32> diff --git a/test/Targets/AIEVecToCpp/translate_conv2d_uij_i8.mlir b/test/Targets/AIEVecToCpp/translate_conv2d_uij_i8.mlir index 1f4bc06e22..1d6335d6b4 100644 --- a/test/Targets/AIEVecToCpp/translate_conv2d_uij_i8.mlir +++ b/test/Targets/AIEVecToCpp/translate_conv2d_uij_i8.mlir @@ -14,8 +14,8 @@ func.func @conv2d_0(%arg0: memref<18x288xi8>, %arg1: memref<48xi8>, %arg2: memre %c32 = arith.constant 32 : index %c0 = arith.constant 0 : index %c10 = arith.constant 10 : i32 - %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> - %1 = aievec.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> + %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> + %1 = aievec_aie1.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> %c0_0 = arith.constant 0 : index %c16 = arith.constant 16 : index %c1 = arith.constant 1 : index @@ -28,15 +28,15 @@ func.func @conv2d_0(%arg0: memref<18x288xi8>, %arg1: memref<48xi8>, %arg2: memre %c256 = arith.constant 256 : index %c16_3 = arith.constant 16 : index scf.for %arg4 = %c0_2 to %c256 step %c16_3 { - %4 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<16x256xi8>, vector<16xi8> - %5 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> + %4 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<16x256xi8>, vector<16xi8> + %5 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> %6 = aievec.ups %4 {shift = 10 : i8} : vector<16xi8>, vector<16xi48> %7 = aievec_aie1.mac %0, %5, %6 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %8 = aievec_aie1.mac %0, %5, %6 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "4", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> - %9 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> + %9 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> %10 = aievec_aie1.mac %0, %9, %7 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %11 = aievec_aie1.mac %0, %9, %8 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "4", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> - %12 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> + %12 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> %13 = aievec_aie1.mac %1, %12, %10 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %14 = aievec_aie1.mac %1, %12, %11 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "4", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %15 = aievec.srs %13, %c10 : vector<16xi48>, i32, vector<16xi16> @@ -100,8 +100,8 @@ func.func @conv2d_1(%arg0: memref<18x288xi8>, %arg1: memref<48xi8>, %arg2: memre %c32 = arith.constant 32 : index %c0 = arith.constant 0 : index %c10 = arith.constant 10 : i32 - %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> - %1 = aievec.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> + %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> + %1 = aievec_aie1.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> %c0_0 = arith.constant 0 : index %c16 = arith.constant 16 : index %c1 = arith.constant 1 : index @@ -114,13 +114,13 @@ func.func @conv2d_1(%arg0: memref<18x288xi8>, %arg1: memref<48xi8>, %arg2: memre %c256 = arith.constant 256 : index %c16_3 = arith.constant 16 : index scf.for %arg4 = %c0_2 to %c256 step %c16_3 { - %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> + %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> %5 = aievec_aie1.mul %0, %4 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %6 = aievec_aie1.mul %0, %4 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "4", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> - %7 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> + %7 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> %8 = aievec_aie1.mac %0, %7, %5 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %9 = aievec_aie1.mac %0, %7, %6 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "4", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> - %10 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> + %10 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> %11 = aievec_aie1.mac %1, %10, %8 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %12 = aievec_aie1.mac %1, %10, %9 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "4", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> %13 = aievec.srs %11, %c10 : vector<16xi48>, i32, vector<16xi16> diff --git a/test/aievec/conv2d_msc_uij_f32_noinit.mlir b/test/aievec/conv2d_msc_uij_f32_noinit.mlir index 9c68918530..10303aee34 100644 --- a/test/aievec/conv2d_msc_uij_f32_noinit.mlir +++ b/test/aievec/conv2d_msc_uij_f32_noinit.mlir @@ -69,8 +69,8 @@ func.func @conv2d (%A: memref<2048x2048xf32>, %B: memref<9xf32>, %C: memref<2046 //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: %c0 = arith.constant 0 : index -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -83,21 +83,21 @@ func.func @conv2d (%A: memref<2048x2048xf32>, %B: memref<9xf32>, %C: memref<2046 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c8_4 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { -//CHECK-NEXT: %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %5 = aievec_aie1.mul %4, %0 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: %6 = arith.addi %arg4, %c1_5 : index -//CHECK-NEXT: %7 = aievec.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %7 = aievec_aie1.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %8 = aievec_aie1.mac %7, %0, %5 {fmsub = true, xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %9 = aievec_aie1.mac %7, %0, %8 {fmsub = true, xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %10 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %10 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %11 = aievec_aie1.mac %10, %0, %9 {fmsub = true, xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %12 = aievec.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %13 = aievec_aie1.mac %12, %0, %11 {fmsub = true, xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %14 = aievec_aie1.mac %12, %0, %13 {fmsub = true, xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %15 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %15 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %16 = aievec_aie1.mac %15, %0, %14 {fmsub = true, xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %17 = aievec.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %17 = aievec_aie1.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %18 = aievec_aie1.mac %17, %0, %16 {fmsub = true, xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %19 = aievec_aie1.mac %17, %1, %18 {fmsub = true, xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: vector.transfer_write %19, %arg2[%arg3, %arg4] : vector<8xf32>, memref<2046x2046xf32> diff --git a/test/aievec/conv2d_msc_uij_i32_noinit.mlir b/test/aievec/conv2d_msc_uij_i32_noinit.mlir index e74612fa89..8b56da60a6 100644 --- a/test/aievec/conv2d_msc_uij_i32_noinit.mlir +++ b/test/aievec/conv2d_msc_uij_i32_noinit.mlir @@ -70,8 +70,8 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: %c0 = arith.constant 0 : index //CHECK-NEXT: %c0_i32 = arith.constant 0 : i32 -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -84,21 +84,21 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c8_4 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { -//CHECK-NEXT: %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %5 = aievec_aie1.mul %4, %0 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: %6 = arith.addi %arg4, %c1_5 : index -//CHECK-NEXT: %7 = aievec.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %7 = aievec_aie1.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %8 = aievec_aie1.mac %7, %0, %5 {fmsub = true, xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %9 = aievec_aie1.mac %7, %0, %8 {fmsub = true, xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %10 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %10 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %11 = aievec_aie1.mac %10, %0, %9 {fmsub = true, xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %12 = aievec.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %13 = aievec_aie1.mac %12, %0, %11 {fmsub = true, xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %14 = aievec_aie1.mac %12, %0, %13 {fmsub = true, xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %15 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %15 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %16 = aievec_aie1.mac %15, %0, %14 {fmsub = true, xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %17 = aievec.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %17 = aievec_aie1.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %18 = aievec_aie1.mac %17, %0, %16 {fmsub = true, xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %19 = aievec_aie1.mac %17, %1, %18 {fmsub = true, xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %20 = aievec.srs %19, %c0_i32 : vector<8xi80>, i32, vector<8xi32> diff --git a/test/aievec/conv2d_uij_f32.mlir b/test/aievec/conv2d_uij_f32.mlir index 13ac8a16ac..67bc81584d 100644 --- a/test/aievec/conv2d_uij_f32.mlir +++ b/test/aievec/conv2d_uij_f32.mlir @@ -73,8 +73,8 @@ func.func @conv2d (%A: memref<2048x2048xf32>, %B: memref<9xf32>, %C: memref<2046 //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: %c0 = arith.constant 0 : index -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -87,22 +87,22 @@ func.func @conv2d (%A: memref<2048x2048xf32>, %B: memref<9xf32>, %C: memref<2046 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c8_4 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { -//CHECK-NEXT: %4 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xf32>, vector<8xf32> -//CHECK-NEXT: %5 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xf32>, vector<8xf32> +//CHECK-NEXT: %5 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %6 = aievec_aie1.mac %5, %0, %4 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: %7 = arith.addi %arg4, %c1_5 : index -//CHECK-NEXT: %8 = aievec.upd %arg0[%arg3, %7], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %8 = aievec_aie1.upd %arg0[%arg3, %7], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %9 = aievec_aie1.mac %8, %0, %6 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %10 = aievec_aie1.mac %8, %0, %9 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %11 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %11 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %12 = aievec_aie1.mac %11, %0, %10 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %13 = aievec.upd %arg0[%2, %7], %11 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %13 = aievec_aie1.upd %arg0[%2, %7], %11 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %14 = aievec_aie1.mac %13, %0, %12 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %15 = aievec_aie1.mac %13, %0, %14 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %16 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %16 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %17 = aievec_aie1.mac %16, %0, %15 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %18 = aievec.upd %arg0[%3, %7], %16 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %18 = aievec_aie1.upd %arg0[%3, %7], %16 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %19 = aievec_aie1.mac %18, %0, %17 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %20 = aievec_aie1.mac %18, %1, %19 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: vector.transfer_write %20, %arg2[%arg3, %arg4] : vector<8xf32>, memref<2046x2046xf32> diff --git a/test/aievec/conv2d_uij_f32_noinit.mlir b/test/aievec/conv2d_uij_f32_noinit.mlir index 92b99e2745..31b64f8faf 100644 --- a/test/aievec/conv2d_uij_f32_noinit.mlir +++ b/test/aievec/conv2d_uij_f32_noinit.mlir @@ -69,8 +69,8 @@ func.func @conv2d (%A: memref<2048x2048xf32>, %B: memref<9xf32>, %C: memref<2046 //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: %c0 = arith.constant 0 : index -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xf32>, vector<8xf32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -83,21 +83,21 @@ func.func @conv2d (%A: memref<2048x2048xf32>, %B: memref<9xf32>, %C: memref<2046 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c8_4 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { -//CHECK-NEXT: %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %5 = aievec_aie1.mul %4, %0 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: %6 = arith.addi %arg4, %c1_5 : index -//CHECK-NEXT: %7 = aievec.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %7 = aievec_aie1.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %8 = aievec_aie1.mac %7, %0, %5 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %9 = aievec_aie1.mac %7, %0, %8 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %10 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %10 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %11 = aievec_aie1.mac %10, %0, %9 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %12 = aievec.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %14 = aievec_aie1.mac %12, %0, %13 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %15 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %15 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %16 = aievec_aie1.mac %15, %0, %14 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -//CHECK-NEXT: %17 = aievec.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> +//CHECK-NEXT: %17 = aievec_aie1.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xf32>, vector<16xf32> //CHECK-NEXT: %18 = aievec_aie1.mac %17, %0, %16 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: %19 = aievec_aie1.mac %17, %1, %18 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> //CHECK-NEXT: vector.transfer_write %19, %arg2[%arg3, %arg4] : vector<8xf32>, memref<2046x2046xf32> diff --git a/test/aievec/conv2d_uij_f32_unbounded.mlir b/test/aievec/conv2d_uij_f32_unbounded.mlir index 3275862743..9a460628f4 100644 --- a/test/aievec/conv2d_uij_f32_unbounded.mlir +++ b/test/aievec/conv2d_uij_f32_unbounded.mlir @@ -84,8 +84,8 @@ func.func @conv2d_0 (%A: memref, %B: memref, %C: memref // CHECK: %[[VAL_5:.*]] = arith.constant 0 : index // CHECK: %[[VAL_6:.*]] = memref.dim %[[VAL_0]], %[[VAL_5]] : memref // CHECK: %[[VAL_7:.*]] = memref.dim %[[VAL_0]], %[[VAL_4]] : memref -// CHECK: %[[VAL_8:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_5]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> -// CHECK: %[[VAL_9:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> +// CHECK: %[[VAL_8:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_5]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> +// CHECK: %[[VAL_9:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> // CHECK: %[[VAL_10:.*]] = arith.constant 0 : index // CHECK: %[[VAL_11:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_12:.*]] = %[[VAL_10]] to %[[VAL_6]] step %[[VAL_11]] { @@ -96,22 +96,22 @@ func.func @conv2d_0 (%A: memref, %B: memref, %C: memref // CHECK: %[[VAL_17:.*]] = arith.constant 0 : index // CHECK: %[[VAL_18:.*]] = arith.constant 8 : index // CHECK: scf.for %[[VAL_19:.*]] = %[[VAL_17]] to %[[VAL_7]] step %[[VAL_18]] { -// CHECK: %[[VAL_20:.*]] = aievec.upd %[[VAL_2]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> -// CHECK: %[[VAL_21:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_20:.*]] = aievec_aie1.upd %[[VAL_2]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> +// CHECK: %[[VAL_21:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_22:.*]] = aievec_aie1.mac %[[VAL_21]], %[[VAL_8]], %[[VAL_20]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_23:.*]] = arith.constant 1 : index // CHECK: %[[VAL_24:.*]] = arith.addi %[[VAL_19]], %[[VAL_23]] : index -// CHECK: %[[VAL_25:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_24]]], %[[VAL_21]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_25:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_24]]], %[[VAL_21]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_26:.*]] = aievec_aie1.mac %[[VAL_25]], %[[VAL_8]], %[[VAL_22]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_27:.*]] = aievec_aie1.mac %[[VAL_25]], %[[VAL_8]], %[[VAL_26]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_28:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_28:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_29:.*]] = aievec_aie1.mac %[[VAL_28]], %[[VAL_8]], %[[VAL_27]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_30:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_24]]], %[[VAL_28]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_30:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_24]]], %[[VAL_28]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_31:.*]] = aievec_aie1.mac %[[VAL_30]], %[[VAL_8]], %[[VAL_29]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_32:.*]] = aievec_aie1.mac %[[VAL_30]], %[[VAL_8]], %[[VAL_31]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_33:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_33:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_34:.*]] = aievec_aie1.mac %[[VAL_33]], %[[VAL_8]], %[[VAL_32]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_35:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_24]]], %[[VAL_33]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_35:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_24]]], %[[VAL_33]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_36:.*]] = aievec_aie1.mac %[[VAL_35]], %[[VAL_8]], %[[VAL_34]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_37:.*]] = aievec_aie1.mac %[[VAL_35]], %[[VAL_9]], %[[VAL_36]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: vector.transfer_write %[[VAL_37]], %[[VAL_2]]{{\[}}%[[VAL_12]], %[[VAL_19]]] : vector<8xf32>, memref @@ -198,8 +198,8 @@ func.func @conv2d_1 (%A: memref, %B: memref, %C: memref -// CHECK: %[[VAL_6:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_4]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> -// CHECK: %[[VAL_7:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> +// CHECK: %[[VAL_6:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_4]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> +// CHECK: %[[VAL_7:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> // CHECK: %[[VAL_8:.*]] = arith.constant 0 : index // CHECK: %[[VAL_9:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_10:.*]] = %[[VAL_8]] to %[[VAL_5]] step %[[VAL_9]] { @@ -211,22 +211,22 @@ func.func @conv2d_1 (%A: memref, %B: memref, %C: memref, vector<8xf32> -// CHECK: %[[VAL_20:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_19:.*]] = aievec_aie1.upd %[[VAL_2]]{{\[}}%[[VAL_10]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xf32> +// CHECK: %[[VAL_20:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_21:.*]] = aievec_aie1.mac %[[VAL_20]], %[[VAL_6]], %[[VAL_19]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_22:.*]] = arith.constant 1 : index // CHECK: %[[VAL_23:.*]] = arith.addi %[[VAL_18]], %[[VAL_22]] : index -// CHECK: %[[VAL_24:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_23]]], %[[VAL_20]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_24:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_23]]], %[[VAL_20]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_25:.*]] = aievec_aie1.mac %[[VAL_24]], %[[VAL_6]], %[[VAL_21]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_26:.*]] = aievec_aie1.mac %[[VAL_24]], %[[VAL_6]], %[[VAL_25]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_27:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_27:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_28:.*]] = aievec_aie1.mac %[[VAL_27]], %[[VAL_6]], %[[VAL_26]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_29:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_23]]], %[[VAL_27]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_29:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_23]]], %[[VAL_27]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_30:.*]] = aievec_aie1.mac %[[VAL_29]], %[[VAL_6]], %[[VAL_28]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_31:.*]] = aievec_aie1.mac %[[VAL_29]], %[[VAL_6]], %[[VAL_30]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_32:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_32:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_33:.*]] = aievec_aie1.mac %[[VAL_32]], %[[VAL_6]], %[[VAL_31]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xf32>, vector<8xf32>, vector<8xf32> -// CHECK: %[[VAL_34:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_23]]], %[[VAL_32]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> +// CHECK: %[[VAL_34:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_23]]], %[[VAL_32]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xf32> // CHECK: %[[VAL_35:.*]] = aievec_aie1.mac %[[VAL_34]], %[[VAL_6]], %[[VAL_33]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: %[[VAL_36:.*]] = aievec_aie1.mac %[[VAL_34]], %[[VAL_7]], %[[VAL_35]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xf32>, vector<8xf32>, vector<8xf32> // CHECK: vector.transfer_write %[[VAL_36]], %[[VAL_2]]{{\[}}%[[VAL_10]], %[[VAL_18]]] : vector<8xf32>, memref diff --git a/test/aievec/conv2d_uij_i16.mlir b/test/aievec/conv2d_uij_i16.mlir index 9cec6ad1f8..d825c147a3 100644 --- a/test/aievec/conv2d_uij_i16.mlir +++ b/test/aievec/conv2d_uij_i16.mlir @@ -73,7 +73,7 @@ func.func @conv2d (%A: memref<2048x2048xi16>, %B: memref<12xi16>, %C: memref<204 //CHECK-NEXT: %c0_i32 = arith.constant 0 : i32 //CHECK-NEXT: %c0 = arith.constant 0 : index -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<12xi16>, vector<16xi16> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<12xi16>, vector<16xi16> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -86,18 +86,18 @@ func.func @conv2d (%A: memref<2048x2048xi16>, %B: memref<12xi16>, %C: memref<204 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c16 = arith.constant 16 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c16 { -//CHECK-NEXT: %3 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi16>, vector<16xi16> -//CHECK-NEXT: %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> -//CHECK-NEXT: %5 = aievec.upd %arg0[%arg3, %arg4], %4 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %3 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi16>, vector<16xi16> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %5 = aievec_aie1.upd %arg0[%arg3, %arg4], %4 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> //CHECK-NEXT: %6 = aievec.ups %3 {shift = 0 : i8} : vector<16xi16>, vector<16xi48> //CHECK-NEXT: %7 = aievec_aie1.mac %5, %0, %6 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %8 = aievec_aie1.mac %5, %0, %7 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -//CHECK-NEXT: %9 = aievec.upd %arg0[%1, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> -//CHECK-NEXT: %10 = aievec.upd %arg0[%1, %arg4], %9 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %9 = aievec_aie1.upd %arg0[%1, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %10 = aievec_aie1.upd %arg0[%1, %arg4], %9 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> //CHECK-NEXT: %11 = aievec_aie1.mac %10, %0, %8 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %12 = aievec_aie1.mac %10, %0, %11 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -//CHECK-NEXT: %13 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> -//CHECK-NEXT: %14 = aievec.upd %arg0[%2, %arg4], %13 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %13 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %14 = aievec_aie1.upd %arg0[%2, %arg4], %13 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> //CHECK-NEXT: %15 = aievec_aie1.mac %14, %0, %12 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %16 = aievec_aie1.mac %14, %0, %15 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %17 = aievec.srs %16, %c0_i32 : vector<16xi48>, i32, vector<16xi16> diff --git a/test/aievec/conv2d_uij_i16_noinit.mlir b/test/aievec/conv2d_uij_i16_noinit.mlir index e68b30cb5b..76575c8076 100644 --- a/test/aievec/conv2d_uij_i16_noinit.mlir +++ b/test/aievec/conv2d_uij_i16_noinit.mlir @@ -69,7 +69,7 @@ func.func @conv2d (%A: memref<18x288xi16>, %B: memref<12xi16>, %C: memref<16x256 //CHECK-NEXT: %c10_i32 = arith.constant 10 : i32 //CHECK-NEXT: %c0 = arith.constant 0 : index -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<12xi16>, vector<16xi16> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<12xi16>, vector<16xi16> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c16 = arith.constant 16 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -82,16 +82,16 @@ func.func @conv2d (%A: memref<18x288xi16>, %B: memref<12xi16>, %C: memref<16x256 //CHECK-NEXT: %c256 = arith.constant 256 : index //CHECK-NEXT: %c16_3 = arith.constant 16 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c256 step %c16_3 { -//CHECK-NEXT: %3 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi16>, vector<32xi16> -//CHECK-NEXT: %4 = aievec.upd %arg0[%arg3, %arg4], %3 {index = 1 : i8, offset = 256 : i32} : memref<18x288xi16>, vector<32xi16> +//CHECK-NEXT: %3 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi16>, vector<32xi16> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%arg3, %arg4], %3 {index = 1 : i8, offset = 256 : i32} : memref<18x288xi16>, vector<32xi16> //CHECK-NEXT: %5 = aievec_aie1.mul %4, %0 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %6 = aievec_aie1.mac %4, %0, %5 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -//CHECK-NEXT: %7 = aievec.upd %arg0[%1, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi16>, vector<32xi16> -//CHECK-NEXT: %8 = aievec.upd %arg0[%1, %arg4], %7 {index = 1 : i8, offset = 256 : i32} : memref<18x288xi16>, vector<32xi16> +//CHECK-NEXT: %7 = aievec_aie1.upd %arg0[%1, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi16>, vector<32xi16> +//CHECK-NEXT: %8 = aievec_aie1.upd %arg0[%1, %arg4], %7 {index = 1 : i8, offset = 256 : i32} : memref<18x288xi16>, vector<32xi16> //CHECK-NEXT: %9 = aievec_aie1.mac %8, %0, %6 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %10 = aievec_aie1.mac %8, %0, %9 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -//CHECK-NEXT: %11 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi16>, vector<32xi16> -//CHECK-NEXT: %12 = aievec.upd %arg0[%2, %arg4], %11 {index = 1 : i8, offset = 256 : i32} : memref<18x288xi16>, vector<32xi16> +//CHECK-NEXT: %11 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi16>, vector<32xi16> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%2, %arg4], %11 {index = 1 : i8, offset = 256 : i32} : memref<18x288xi16>, vector<32xi16> //CHECK-NEXT: %13 = aievec_aie1.mac %12, %0, %10 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %14 = aievec_aie1.mac %12, %0, %13 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %15 = aievec.srs %14, %c10_i32 : vector<16xi48>, i32, vector<16xi16> diff --git a/test/aievec/conv2d_uij_i16_unbounded.mlir b/test/aievec/conv2d_uij_i16_unbounded.mlir index 474ddf0bd9..0ba812e924 100644 --- a/test/aievec/conv2d_uij_i16_unbounded.mlir +++ b/test/aievec/conv2d_uij_i16_unbounded.mlir @@ -84,7 +84,7 @@ func.func @conv2d_0 (%A: memref, %B: memref, %C: memref // CHECK: %[[VAL_4:.*]] = arith.constant 0 : index // CHECK: %[[VAL_5:.*]] = memref.dim %[[VAL_0]], %[[VAL_4]] : memref // CHECK: %[[VAL_6:.*]] = memref.dim %[[VAL_0]], %[[VAL_3]] : memref -// CHECK: %[[VAL_7:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_4]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> +// CHECK: %[[VAL_7:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_4]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> // CHECK: %[[VAL_8:.*]] = arith.constant 0 : index // CHECK: %[[VAL_9:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_10:.*]] = %[[VAL_8]] to %[[VAL_5]] step %[[VAL_9]] { @@ -95,18 +95,18 @@ func.func @conv2d_0 (%A: memref, %B: memref, %C: memref // CHECK: %[[VAL_15:.*]] = arith.constant 0 : index // CHECK: %[[VAL_16:.*]] = arith.constant 16 : index // CHECK: scf.for %[[VAL_17:.*]] = %[[VAL_15]] to %[[VAL_6]] step %[[VAL_16]] { -// CHECK: %[[VAL_18:.*]] = aievec.upd %[[VAL_2]]{{\[}}%[[VAL_10]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> -// CHECK: %[[VAL_19:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> -// CHECK: %[[VAL_20:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_17]]], %[[VAL_19]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_18:.*]] = aievec_aie1.upd %[[VAL_2]]{{\[}}%[[VAL_10]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> +// CHECK: %[[VAL_19:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_20:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_17]]], %[[VAL_19]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> // CHECK: %[[VAL_21:.*]] = aievec.ups %[[VAL_18]] {shift = 0 : i8} : vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_22:.*]] = aievec_aie1.mac %[[VAL_20]], %[[VAL_7]], %[[VAL_21]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_23:.*]] = aievec_aie1.mac %[[VAL_20]], %[[VAL_7]], %[[VAL_22]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -// CHECK: %[[VAL_24:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> -// CHECK: %[[VAL_25:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_17]]], %[[VAL_24]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_24:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_25:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_17]]], %[[VAL_24]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> // CHECK: %[[VAL_26:.*]] = aievec_aie1.mac %[[VAL_25]], %[[VAL_7]], %[[VAL_23]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_27:.*]] = aievec_aie1.mac %[[VAL_25]], %[[VAL_7]], %[[VAL_26]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -// CHECK: %[[VAL_28:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> -// CHECK: %[[VAL_29:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_17]]], %[[VAL_28]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_28:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_17]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_29:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_17]]], %[[VAL_28]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> // CHECK: %[[VAL_30:.*]] = aievec_aie1.mac %[[VAL_29]], %[[VAL_7]], %[[VAL_27]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_31:.*]] = aievec_aie1.mac %[[VAL_29]], %[[VAL_7]], %[[VAL_30]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_32:.*]] = aievec.srs %[[VAL_31]], %[[C0]] : vector<16xi48>, i32, vector<16xi16> @@ -192,7 +192,7 @@ func.func @conv2d_1 (%A: memref, %B: memref, %C: memref -// CHECK: %[[VAL_5:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> +// CHECK: %[[VAL_5:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> // CHECK: %[[VAL_6:.*]] = arith.constant 0 : index // CHECK: %[[VAL_7:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_8:.*]] = %[[VAL_6]] to %[[VAL_4]] step %[[VAL_7]] { @@ -204,18 +204,18 @@ func.func @conv2d_1 (%A: memref, %B: memref, %C: memref, vector<16xi16> -// CHECK: %[[VAL_18:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_8]], %[[VAL_16]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> -// CHECK: %[[VAL_19:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_8]], %[[VAL_16]]], %[[VAL_18]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_17:.*]] = aievec_aie1.upd %[[VAL_2]]{{\[}}%[[VAL_8]], %[[VAL_16]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi16> +// CHECK: %[[VAL_18:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_8]], %[[VAL_16]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_19:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_8]], %[[VAL_16]]], %[[VAL_18]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> // CHECK: %[[VAL_20:.*]] = aievec.ups %[[VAL_17]] {shift = 0 : i8} : vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_21:.*]] = aievec_aie1.mac %[[VAL_19]], %[[VAL_5]], %[[VAL_20]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_22:.*]] = aievec_aie1.mac %[[VAL_19]], %[[VAL_5]], %[[VAL_21]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -// CHECK: %[[VAL_23:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_16]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> -// CHECK: %[[VAL_24:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_16]]], %[[VAL_23]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_23:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_16]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_24:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_16]]], %[[VAL_23]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> // CHECK: %[[VAL_25:.*]] = aievec_aie1.mac %[[VAL_24]], %[[VAL_5]], %[[VAL_22]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "4", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_26:.*]] = aievec_aie1.mac %[[VAL_24]], %[[VAL_5]], %[[VAL_25]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "6", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> -// CHECK: %[[VAL_27:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_16]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> -// CHECK: %[[VAL_28:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_16]]], %[[VAL_27]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_27:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_16]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<32xi16> +// CHECK: %[[VAL_28:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_16]]], %[[VAL_27]] {index = 1 : i8, offset = 256 : i32} : memref, vector<32xi16> // CHECK: %[[VAL_29:.*]] = aievec_aie1.mac %[[VAL_28]], %[[VAL_5]], %[[VAL_26]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "8", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_30:.*]] = aievec_aie1.mac %[[VAL_28]], %[[VAL_5]], %[[VAL_29]] {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "10", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> // CHECK: %[[VAL_31:.*]] = aievec.srs %[[VAL_30]], %[[C0]] : vector<16xi48>, i32, vector<16xi16> diff --git a/test/aievec/conv2d_uij_i32.mlir b/test/aievec/conv2d_uij_i32.mlir index 48d80cbf11..98270bbb48 100644 --- a/test/aievec/conv2d_uij_i32.mlir +++ b/test/aievec/conv2d_uij_i32.mlir @@ -74,8 +74,8 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: %c0 = arith.constant 0 : index //CHECK-NEXT: %c0_i32 = arith.constant 0 : i32 -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -88,23 +88,23 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c8_4 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { -//CHECK-NEXT: %4 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> -//CHECK-NEXT: %5 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> +//CHECK-NEXT: %5 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %6 = aievec.ups %4 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> //CHECK-NEXT: %7 = aievec_aie1.mac %5, %0, %6 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: %8 = arith.addi %arg4, %c1_5 : index -//CHECK-NEXT: %9 = aievec.upd %arg0[%arg3, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %9 = aievec_aie1.upd %arg0[%arg3, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %10 = aievec_aie1.mac %9, %0, %7 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %11 = aievec_aie1.mac %9, %0, %10 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %12 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %14 = aievec.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %14 = aievec_aie1.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %15 = aievec_aie1.mac %14, %0, %13 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %16 = aievec_aie1.mac %14, %0, %15 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %17 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %17 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %18 = aievec_aie1.mac %17, %0, %16 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %19 = aievec.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %19 = aievec_aie1.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %20 = aievec_aie1.mac %19, %0, %18 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %21 = aievec_aie1.mac %19, %1, %20 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %22 = aievec.srs %21, %c0_i32 : vector<8xi80>, i32, vector<8xi32> diff --git a/test/aievec/conv2d_uij_i32_noinit.mlir b/test/aievec/conv2d_uij_i32_noinit.mlir index f6ae5ae876..8d9086f4ef 100644 --- a/test/aievec/conv2d_uij_i32_noinit.mlir +++ b/test/aievec/conv2d_uij_i32_noinit.mlir @@ -70,8 +70,8 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: %c0 = arith.constant 0 : index //CHECK-NEXT: %c0_i32 = arith.constant 0 : i32 -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -84,21 +84,21 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c8_4 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { -//CHECK-NEXT: %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %5 = aievec_aie1.mul %4, %0 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: %6 = arith.addi %arg4, %c1_5 : index -//CHECK-NEXT: %7 = aievec.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %7 = aievec_aie1.upd %arg0[%arg3, %6], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %8 = aievec_aie1.mac %7, %0, %5 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %9 = aievec_aie1.mac %7, %0, %8 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %10 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %10 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %11 = aievec_aie1.mac %10, %0, %9 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %12 = aievec.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%2, %6], %10 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %14 = aievec_aie1.mac %12, %0, %13 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %15 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %15 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %16 = aievec_aie1.mac %15, %0, %14 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %17 = aievec.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %17 = aievec_aie1.upd %arg0[%3, %6], %15 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %18 = aievec_aie1.mac %17, %0, %16 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %19 = aievec_aie1.mac %17, %1, %18 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %20 = aievec.srs %19, %c0_i32 : vector<8xi80>, i32, vector<8xi32> diff --git a/test/aievec/conv2d_uij_i32_unbounded.mlir b/test/aievec/conv2d_uij_i32_unbounded.mlir index efe893d169..1cb84dae09 100644 --- a/test/aievec/conv2d_uij_i32_unbounded.mlir +++ b/test/aievec/conv2d_uij_i32_unbounded.mlir @@ -85,8 +85,8 @@ func.func @conv2d_0 (%A: memref, %B: memref, %C: memref // CHECK: %[[VAL_5:.*]] = arith.constant 0 : index // CHECK: %[[VAL_6:.*]] = memref.dim %[[VAL_0]], %[[VAL_5]] : memref // CHECK: %[[VAL_7:.*]] = memref.dim %[[VAL_0]], %[[VAL_4]] : memref -// CHECK: %[[VAL_8:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_5]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> -// CHECK: %[[VAL_9:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> +// CHECK: %[[VAL_8:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_5]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> +// CHECK: %[[VAL_9:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> // CHECK: %[[VAL_10:.*]] = arith.constant 0 : index // CHECK: %[[VAL_11:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_12:.*]] = %[[VAL_10]] to %[[VAL_6]] step %[[VAL_11]] { @@ -97,23 +97,23 @@ func.func @conv2d_0 (%A: memref, %B: memref, %C: memref // CHECK: %[[VAL_17:.*]] = arith.constant 0 : index // CHECK: %[[VAL_18:.*]] = arith.constant 8 : index // CHECK: scf.for %[[VAL_19:.*]] = %[[VAL_17]] to %[[VAL_7]] step %[[VAL_18]] { -// CHECK: %[[VAL_20:.*]] = aievec.upd %[[VAL_2]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> -// CHECK: %[[VAL_21:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_20:.*]] = aievec_aie1.upd %[[VAL_2]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> +// CHECK: %[[VAL_21:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_22:.*]] = aievec.ups %[[VAL_20]] {shift = 0 : i8} : vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_23:.*]] = aievec_aie1.mac %[[VAL_21]], %[[VAL_8]], %[[VAL_22]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_24:.*]] = arith.constant 1 : index // CHECK: %[[VAL_25:.*]] = arith.addi %[[VAL_19]], %[[VAL_24]] : index -// CHECK: %[[VAL_26:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_25]]], %[[VAL_21]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_26:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_25]]], %[[VAL_21]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_27:.*]] = aievec_aie1.mac %[[VAL_26]], %[[VAL_8]], %[[VAL_23]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_28:.*]] = aievec_aie1.mac %[[VAL_26]], %[[VAL_8]], %[[VAL_27]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_29:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_29:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_30:.*]] = aievec_aie1.mac %[[VAL_29]], %[[VAL_8]], %[[VAL_28]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_31:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_25]]], %[[VAL_29]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_31:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_25]]], %[[VAL_29]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_32:.*]] = aievec_aie1.mac %[[VAL_31]], %[[VAL_8]], %[[VAL_30]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_33:.*]] = aievec_aie1.mac %[[VAL_31]], %[[VAL_8]], %[[VAL_32]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_34:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_34:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_19]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_35:.*]] = aievec_aie1.mac %[[VAL_34]], %[[VAL_8]], %[[VAL_33]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_36:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_25]]], %[[VAL_34]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_36:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_16]], %[[VAL_25]]], %[[VAL_34]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_37:.*]] = aievec_aie1.mac %[[VAL_36]], %[[VAL_8]], %[[VAL_35]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_38:.*]] = aievec_aie1.mac %[[VAL_36]], %[[VAL_9]], %[[VAL_37]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_39:.*]] = aievec.srs %[[VAL_38]], %[[C0]] : vector<8xi80>, i32, vector<8xi32> @@ -202,8 +202,8 @@ func.func @conv2d_1 (%A: memref, %B: memref, %C: memref -// CHECK: %[[VAL_6:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_4]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> -// CHECK: %[[VAL_7:.*]] = aievec.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> +// CHECK: %[[VAL_6:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_4]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> +// CHECK: %[[VAL_7:.*]] = aievec_aie1.upd %[[VAL_1]]{{\[}}%[[VAL_3]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> // CHECK: %[[VAL_8:.*]] = arith.constant 0 : index // CHECK: %[[VAL_9:.*]] = arith.constant 1 : index // CHECK: scf.for %[[VAL_10:.*]] = %[[VAL_8]] to %[[VAL_5]] step %[[VAL_9]] { @@ -215,23 +215,23 @@ func.func @conv2d_1 (%A: memref, %B: memref, %C: memref, vector<8xi32> -// CHECK: %[[VAL_20:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_19:.*]] = aievec_aie1.upd %[[VAL_2]]{{\[}}%[[VAL_10]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<8xi32> +// CHECK: %[[VAL_20:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_21:.*]] = aievec.ups %[[VAL_19]] {shift = 0 : i8} : vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_22:.*]] = aievec_aie1.mac %[[VAL_20]], %[[VAL_6]], %[[VAL_21]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_23:.*]] = arith.constant 1 : index // CHECK: %[[VAL_24:.*]] = arith.addi %[[VAL_18]], %[[VAL_23]] : index -// CHECK: %[[VAL_25:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_24]]], %[[VAL_20]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_25:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_10]], %[[VAL_24]]], %[[VAL_20]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_26:.*]] = aievec_aie1.mac %[[VAL_25]], %[[VAL_6]], %[[VAL_22]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_27:.*]] = aievec_aie1.mac %[[VAL_25]], %[[VAL_6]], %[[VAL_26]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_28:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_28:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_29:.*]] = aievec_aie1.mac %[[VAL_28]], %[[VAL_6]], %[[VAL_27]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_30:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_24]]], %[[VAL_28]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_30:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_12]], %[[VAL_24]]], %[[VAL_28]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_31:.*]] = aievec_aie1.mac %[[VAL_30]], %[[VAL_6]], %[[VAL_29]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_32:.*]] = aievec_aie1.mac %[[VAL_30]], %[[VAL_6]], %[[VAL_31]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_33:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_33:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_18]]] {index = 0 : i8, offset = 0 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_34:.*]] = aievec_aie1.mac %[[VAL_33]], %[[VAL_6]], %[[VAL_32]] {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -// CHECK: %[[VAL_35:.*]] = aievec.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_24]]], %[[VAL_33]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> +// CHECK: %[[VAL_35:.*]] = aievec_aie1.upd %[[VAL_0]]{{\[}}%[[VAL_14]], %[[VAL_24]]], %[[VAL_33]] {index = 1 : i8, offset = 224 : i32} : memref, vector<16xi32> // CHECK: %[[VAL_36:.*]] = aievec_aie1.mac %[[VAL_35]], %[[VAL_6]], %[[VAL_34]] {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_37:.*]] = aievec_aie1.mac %[[VAL_35]], %[[VAL_7]], %[[VAL_36]] {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> // CHECK: %[[VAL_38:.*]] = aievec.srs %[[VAL_37]], %[[C0]] : vector<8xi80>, i32, vector<8xi32> diff --git a/test/aievec/conv2d_uij_i8.mlir b/test/aievec/conv2d_uij_i8.mlir index c35ad64289..f89de874e4 100644 --- a/test/aievec/conv2d_uij_i8.mlir +++ b/test/aievec/conv2d_uij_i8.mlir @@ -74,8 +74,8 @@ func.func @conv2d (%A: memref<18x288xi8>, %B: memref<48xi8>, %C: memref<16x256xi //CHECK-NEXT: %c10_i32 = arith.constant 10 : i32 //CHECK-NEXT: %c32 = arith.constant 32 : index //CHECK-NEXT: %c0 = arith.constant 0 : index -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c16 = arith.constant 16 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -88,15 +88,15 @@ func.func @conv2d (%A: memref<18x288xi8>, %B: memref<48xi8>, %C: memref<16x256xi //CHECK-NEXT: %c256 = arith.constant 256 : index //CHECK-NEXT: %c16_3 = arith.constant 16 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c256 step %c16_3 { -//CHECK-NEXT: %4 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<16x256xi8>, vector<16xi8> -//CHECK-NEXT: %5 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<16x256xi8>, vector<16xi8> +//CHECK-NEXT: %5 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> //CHECK-NEXT: %6 = aievec.ups %4 {shift = 10 : i8} : vector<16xi8>, vector<16xi48> //CHECK-NEXT: %7 = aievec_aie1.mac %0, %5, %6 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %8 = aievec_aie1.mac %0, %5, %6 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "8", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> -//CHECK-NEXT: %9 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> +//CHECK-NEXT: %9 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> //CHECK-NEXT: %10 = aievec_aie1.mac %0, %9, %7 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %11 = aievec_aie1.mac %0, %9, %8 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "8", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> -//CHECK-NEXT: %12 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> //CHECK-NEXT: %13 = aievec_aie1.mac %1, %12, %10 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %14 = aievec_aie1.mac %1, %12, %11 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "8", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %15 = aievec.srs %13, %c10_i32 : vector<16xi48>, i32, vector<16xi16> diff --git a/test/aievec/conv2d_uij_i8_noinit.mlir b/test/aievec/conv2d_uij_i8_noinit.mlir index 736d28c512..5fdcdda9b5 100644 --- a/test/aievec/conv2d_uij_i8_noinit.mlir +++ b/test/aievec/conv2d_uij_i8_noinit.mlir @@ -70,8 +70,8 @@ func.func @conv2d (%A: memref<18x288xi8>, %B: memref<48xi8>, %C: memref<16x256xi //CHECK-NEXT: %c10_i32 = arith.constant 10 : i32 //CHECK-NEXT: %c32 = arith.constant 32 : index //CHECK-NEXT: %c0 = arith.constant 0 : index -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c32], %0 {index = 1 : i8, offset = 0 : i32} : memref<48xi8>, vector<64xi8> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c16 = arith.constant 16 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -84,13 +84,13 @@ func.func @conv2d (%A: memref<18x288xi8>, %B: memref<48xi8>, %C: memref<16x256xi //CHECK-NEXT: %c256 = arith.constant 256 : index //CHECK-NEXT: %c16_3 = arith.constant 16 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c256 step %c16_3 { -//CHECK-NEXT: %4 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> //CHECK-NEXT: %5 = aievec_aie1.mul %0, %4 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %6 = aievec_aie1.mul %0, %4 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "0", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "8", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> -//CHECK-NEXT: %7 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> +//CHECK-NEXT: %7 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> //CHECK-NEXT: %8 = aievec_aie1.mac %0, %7, %5 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %9 = aievec_aie1.mac %0, %7, %6 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "16", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "8", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> -//CHECK-NEXT: %10 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> +//CHECK-NEXT: %10 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<18x288xi8>, vector<32xi8> //CHECK-NEXT: %11 = aievec_aie1.mac %1, %10, %8 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "0", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %12 = aievec_aie1.mac %1, %10, %9 {xoffsets = "0x00000000", xsquare = "0x1010", xstart = "32", xstep = "4", zoffsets = "0x43322110", zsquare = "0x2110", zstart = "8", zstep = "2"} : vector<64xi8>, vector<32xi8>, vector<16xi48> //CHECK-NEXT: %13 = aievec.srs %11, %c10_i32 : vector<16xi48>, i32, vector<16xi16> diff --git a/test/aievec/conv2d_uj_i16.mlir b/test/aievec/conv2d_uj_i16.mlir index 0d5d479aeb..fdaa68f783 100644 --- a/test/aievec/conv2d_uj_i16.mlir +++ b/test/aievec/conv2d_uj_i16.mlir @@ -44,16 +44,16 @@ func.func @conv2d (%A: memref<2048x2048xi16>, %B: memref<3x3xi16>, %C: memref<20 //CHECK-NEXT: %c2046_2 = arith.constant 2046 : index //CHECK-NEXT: %c16 = arith.constant 16 : index //CHECK-NEXT: scf.for %arg4 = %c0_1 to %c2046_2 step %c16 { -//CHECK-NEXT: %0 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi16>, vector<16xi16> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi16>, vector<16xi16> //CHECK-NEXT: %1 = aievec.ups %0 {shift = 0 : i8} : vector<16xi16>, vector<16xi48> //CHECK-NEXT: %c0_3 = arith.constant 0 : index //CHECK-NEXT: %c3 = arith.constant 3 : index //CHECK-NEXT: %c1_4 = arith.constant 1 : index //CHECK-NEXT: scf.for %arg5 = %c0_3 to %c3 step %c1_4 { //CHECK-NEXT: %2 = arith.addi %arg3, %arg5 : index -//CHECK-NEXT: %3 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> -//CHECK-NEXT: %4 = aievec.upd %arg0[%2, %arg4], %3 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> -//CHECK-NEXT: %5 = aievec.upd %arg1[%arg5, %c0] {index = 0 : i8, offset = 0 : i32} : memref<3x3xi16>, vector<16xi16> +//CHECK-NEXT: %3 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%2, %arg4], %3 {index = 1 : i8, offset = 256 : i32} : memref<2048x2048xi16>, vector<32xi16> +//CHECK-NEXT: %5 = aievec_aie1.upd %arg1[%arg5, %c0] {index = 0 : i8, offset = 0 : i32} : memref<3x3xi16>, vector<16xi16> //CHECK-NEXT: %6 = aievec_aie1.mac %4, %5, %1 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "0", zoffsets = "0", zoffsets_hi = "0", zstart = "0", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %7 = aievec_aie1.mac %4, %5, %6 {xoffsets = "0x03020100", xoffsets_hi = "0x07060504", xsquare = "0x2110", xstart = "2", zoffsets = "0", zoffsets_hi = "0", zstart = "2", zstep = "1"} : vector<32xi16>, vector<16xi16>, vector<16xi48> //CHECK-NEXT: %8 = aievec.srs %7, %c0_i32 : vector<16xi48>, i32, vector<16xi16> diff --git a/test/aievec/conv2d_uj_i32.mlir b/test/aievec/conv2d_uj_i32.mlir index b1bcc34438..b54a5a45b9 100644 --- a/test/aievec/conv2d_uj_i32.mlir +++ b/test/aievec/conv2d_uj_i32.mlir @@ -44,7 +44,7 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<3x3xi32>, %C: memref<20 //CHECK-NEXT: %c2046_2 = arith.constant 2046 : index //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_1 to %c2046_2 step %c8 { -//CHECK-NEXT: %0 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> //CHECK-NEXT: %1 = aievec.ups %0 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> //CHECK-NEXT: %c1_3 = arith.constant 1 : index //CHECK-NEXT: %2 = arith.addi %arg4, %c1_3 : index @@ -53,10 +53,10 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<3x3xi32>, %C: memref<20 //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: scf.for %arg5 = %c0_4 to %c3 step %c1_5 { //CHECK-NEXT: %3 = arith.addi %arg3, %arg5 : index -//CHECK-NEXT: %4 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> -//CHECK-NEXT: %5 = aievec.upd %arg1[%arg5, %c0] {index = 0 : i8, offset = 0 : i32} : memref<3x3xi32>, vector<8xi32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %5 = aievec_aie1.upd %arg1[%arg5, %c0] {index = 0 : i8, offset = 0 : i32} : memref<3x3xi32>, vector<8xi32> //CHECK-NEXT: %6 = aievec_aie1.mac %4, %5, %1 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %7 = aievec.upd %arg0[%3, %2], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %7 = aievec_aie1.upd %arg0[%3, %2], %4 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %8 = aievec_aie1.mac %7, %5, %6 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %9 = aievec_aie1.mac %7, %5, %8 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %10 = aievec.srs %9, %c0_i32 : vector<8xi80>, i32, vector<8xi32> diff --git a/test/aievec/test_reassoc.mlir b/test/aievec/test_reassoc.mlir index a2a2c64ea7..03454341d5 100644 --- a/test/aievec/test_reassoc.mlir +++ b/test/aievec/test_reassoc.mlir @@ -74,8 +74,8 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: %c0 = arith.constant 0 : index //CHECK-NEXT: %c0_i32 = arith.constant 0 : i32 -//CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> -//CHECK-NEXT: %1 = aievec.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> +//CHECK-NEXT: %1 = aievec_aie1.upd %arg1[%c8] {index = 0 : i8, offset = 0 : i32} : memref<9xi32>, vector<8xi32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c2046 = arith.constant 2046 : index //CHECK-NEXT: %c1 = arith.constant 1 : index @@ -88,23 +88,23 @@ func.func @conv2d (%A: memref<2048x2048xi32>, %B: memref<9xi32>, %C: memref<2046 //CHECK-NEXT: %c2046_3 = arith.constant 2046 : index //CHECK-NEXT: %c8_4 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg4 = %c0_2 to %c2046_3 step %c8_4 { -//CHECK-NEXT: %4 = aievec.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> -//CHECK-NEXT: %5 = aievec.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %4 = aievec_aie1.upd %arg2[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2046x2046xi32>, vector<8xi32> +//CHECK-NEXT: %5 = aievec_aie1.upd %arg0[%arg3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %6 = aievec.ups %4 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> //CHECK-NEXT: %7 = aievec_aie1.mac %5, %0, %6 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %c1_5 = arith.constant 1 : index //CHECK-NEXT: %8 = arith.addi %arg4, %c1_5 : index -//CHECK-NEXT: %9 = aievec.upd %arg0[%arg3, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %9 = aievec_aie1.upd %arg0[%arg3, %8], %5 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %10 = aievec_aie1.mac %9, %0, %7 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "1"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %11 = aievec_aie1.mac %9, %0, %10 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "2"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %12 = aievec.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %12 = aievec_aie1.upd %arg0[%2, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %13 = aievec_aie1.mac %12, %0, %11 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "3"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %14 = aievec.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %14 = aievec_aie1.upd %arg0[%2, %8], %12 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %15 = aievec_aie1.mac %14, %0, %13 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "4"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %16 = aievec_aie1.mac %14, %0, %15 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "5"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %17 = aievec.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %17 = aievec_aie1.upd %arg0[%3, %arg4] {index = 0 : i8, offset = 0 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %18 = aievec_aie1.mac %17, %0, %16 {xoffsets = "0x76543210", xstart = "0", zoffsets = "0x00000000", zstart = "6"} : vector<16xi32>, vector<8xi32>, vector<8xi80> -//CHECK-NEXT: %19 = aievec.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> +//CHECK-NEXT: %19 = aievec_aie1.upd %arg0[%3, %8], %17 {index = 1 : i8, offset = 224 : i32} : memref<2048x2048xi32>, vector<16xi32> //CHECK-NEXT: %20 = aievec_aie1.mac %19, %0, %18 {xoffsets = "0x76543210", xstart = "1", zoffsets = "0x00000000", zstart = "7"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %21 = aievec_aie1.mac %19, %1, %20 {xoffsets = "0x76543210", xstart = "2", zoffsets = "0x00000000", zstart = "0"} : vector<16xi32>, vector<8xi32>, vector<8xi80> //CHECK-NEXT: %22 = aievec.srs %21, %c0_i32 : vector<8xi80>, i32, vector<8xi32> diff --git a/test/aievec/test_srs.mlir b/test/aievec/test_srs.mlir index 2124270eba..f44393fed9 100644 --- a/test/aievec/test_srs.mlir +++ b/test/aievec/test_srs.mlir @@ -4,14 +4,14 @@ func.func @conv2d (%A: memref<128xi32>, %B: memref<8xi32>, %C: memref<126xi32>) { //CHECK-NEXT: %c0 = arith.constant 0 : index //CHECK-NEXT: %c0_i32 = arith.constant 0 : i32 - //CHECK-NEXT: %0 = aievec.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<8xi32>, vector<8xi32> + //CHECK-NEXT: %0 = aievec_aie1.upd %arg1[%c0] {index = 0 : i8, offset = 0 : i32} : memref<8xi32>, vector<8xi32> //CHECK-NEXT: %c0_0 = arith.constant 0 : index //CHECK-NEXT: %c126 = arith.constant 126 : index //CHECK-NEXT: %c8 = arith.constant 8 : index //CHECK-NEXT: scf.for %arg3 = %c0_0 to %c126 step %c8 { affine.for %arg3 = 0 to 126 { - //CHECK-NEXT: %1 = aievec.upd %arg2[%arg3] {index = 0 : i8, offset = 0 : i32} : memref<126xi32>, vector<8xi32> - //CHECK-NEXT: %2 = aievec.upd %arg0[%arg3] {index = 0 : i8, offset = 0 : i32} : memref<128xi32>, vector<8xi32> + //CHECK-NEXT: %1 = aievec_aie1.upd %arg2[%arg3] {index = 0 : i8, offset = 0 : i32} : memref<126xi32>, vector<8xi32> + //CHECK-NEXT: %2 = aievec_aie1.upd %arg0[%arg3] {index = 0 : i8, offset = 0 : i32} : memref<128xi32>, vector<8xi32> //CHECK-NEXT: %3 = aievec.ups %1 {shift = 0 : i8} : vector<8xi32>, vector<8xi80> %ci = affine.load %C[%arg3] : memref<126xi32> %a = affine.load %A[%arg3] : memref<128xi32> From 67575d012c327b2b59e6684c08cadd0c2f061f0e Mon Sep 17 00:00:00 2001 From: jamestcl-amd Date: Fri, 9 Aug 2024 15:19:25 -0700 Subject: [PATCH 7/7] XFAIL all the AIEVectorize --aieml tests --- test/aievec/conv2d_i16_after_polygeist.mlir | 1 + test/aievec/conv2d_i16_after_polygeist_2.mlir | 1 + test/aievec/conv2d_i8_after_polygeist.mlir | 1 + test/aievec/conv2d_uij_i16_noinit_aie-ml.mlir | 1 + test/aievec/conv2d_uij_i8_noinit_aie-ml.mlir | 1 + .../conv2d_i16_after_polygeist.mlir | 1 + .../conv2d_i16_after_polygeist_2.mlir | 2 +- .../aievec_tests/i16xi16_gemm/gemm64_int16_unroll32.mlir | 2 +- .../conv2d_uij_i16_noinit.mlir | 5 ----- .../aievec_tests/i32xi32_gemm/gemm64_int_unroll16.mlir | 2 ++ .../conv2d_i8_after_polygeist.mlir | 1 + .../conv2d_uij_i8_noinit.mlir | 5 ----- 12 files changed, 11 insertions(+), 12 deletions(-) diff --git a/test/aievec/conv2d_i16_after_polygeist.mlir b/test/aievec/conv2d_i16_after_polygeist.mlir index 5240ac3119..80c7b0618a 100644 --- a/test/aievec/conv2d_i16_after_polygeist.mlir +++ b/test/aievec/conv2d_i16_after_polygeist.mlir @@ -1,4 +1,5 @@ // RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=16" --aie-vectorize="shift=10 zero-offset=4" -aieml=true -canonicalize -split-input-file | FileCheck %s +// XFAIL: * module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.endianness", "little">, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>>, llvm.data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", llvm.target_triple = "x86_64-unknown-linux-gnu", "polygeist.target-cpu" = "x86-64", "polygeist.target-features" = "+cx8,+fxsr,+mmx,+sse,+sse2,+x87", "polygeist.tune-cpu" = "generic"} { func.func @conv2d(%arg0: memref, %arg1: memref, %arg2: memref) attributes {llvm.linkage = #llvm.linkage} { diff --git a/test/aievec/conv2d_i16_after_polygeist_2.mlir b/test/aievec/conv2d_i16_after_polygeist_2.mlir index 144fd8472f..9afcc2fdb2 100644 --- a/test/aievec/conv2d_i16_after_polygeist_2.mlir +++ b/test/aievec/conv2d_i16_after_polygeist_2.mlir @@ -1,4 +1,5 @@ // RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=16" --aie-vectorize="shift=10 zero-offset=4" -aieml=true -canonicalize -split-input-file | FileCheck %s +// XFAIL: * module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.endianness", "little">, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>>, llvm.data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", llvm.target_triple = "x86_64-unknown-linux-gnu", "polygeist.target-cpu" = "x86-64", "polygeist.target-features" = "+cx8,+fxsr,+mmx,+sse,+sse2,+x87", "polygeist.tune-cpu" = "generic"} { func.func @conv2d(%arg0: memref, %arg1: memref, %arg2: memref) attributes {llvm.linkage = #llvm.linkage} { diff --git a/test/aievec/conv2d_i8_after_polygeist.mlir b/test/aievec/conv2d_i8_after_polygeist.mlir index 1cb5817446..07edfb4cb7 100644 --- a/test/aievec/conv2d_i8_after_polygeist.mlir +++ b/test/aievec/conv2d_i8_after_polygeist.mlir @@ -1,4 +1,5 @@ // RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=32" -aieml=true --aie-vectorize="shift=0 dup-factor=2" -canonicalize | FileCheck %s +// XFAIL: * module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.endianness", "little">, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>>, llvm.data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", llvm.target_triple = "x86_64-unknown-linux-gnu", "polygeist.target-cpu" = "x86-64", "polygeist.target-features" = "+cx8,+fxsr,+mmx,+sse,+sse2,+x87", "polygeist.tune-cpu" = "generic"} { func.func @conv2d(%arg0: memref, %arg1: memref, %arg2: memref) attributes {llvm.linkage = #llvm.linkage} { diff --git a/test/aievec/conv2d_uij_i16_noinit_aie-ml.mlir b/test/aievec/conv2d_uij_i16_noinit_aie-ml.mlir index 7eef56b809..ce4f1a652e 100644 --- a/test/aievec/conv2d_uij_i16_noinit_aie-ml.mlir +++ b/test/aievec/conv2d_uij_i16_noinit_aie-ml.mlir @@ -1,4 +1,5 @@ // RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=16" --aie-vectorize="shift=10 zero-offset=4" -aieml=true -canonicalize -split-input-file | FileCheck %s +// XFAIL: * func.func @conv2d (%A: memref<18x288xi16>, %B: memref<12xi16>, %C: memref<16x256xi16>) { affine.for %arg3 = 0 to 16 { diff --git a/test/aievec/conv2d_uij_i8_noinit_aie-ml.mlir b/test/aievec/conv2d_uij_i8_noinit_aie-ml.mlir index 9fd3dbf9e4..5da2ff6ae4 100644 --- a/test/aievec/conv2d_uij_i8_noinit_aie-ml.mlir +++ b/test/aievec/conv2d_uij_i8_noinit_aie-ml.mlir @@ -1,4 +1,5 @@ // RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=32" -aieml=true --aie-vectorize="shift=0 dup-factor=2" -canonicalize | FileCheck %s +// XFAIL: * func.func @conv2d (%A: memref<18x288xi8>, %B: memref<48xi8>, %C: memref<16x256xi8>) { affine.for %arg3 = 0 to 16 { diff --git a/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml/conv2d_i16_after_polygeist.mlir b/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml/conv2d_i16_after_polygeist.mlir index e7d4cdbe69..b56ee2e1aa 100644 --- a/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml/conv2d_i16_after_polygeist.mlir +++ b/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml/conv2d_i16_after_polygeist.mlir @@ -6,6 +6,7 @@ // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/kernel.cc -o kernel.o // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/testbench.cc work/kernel.o // RUN: cp -r %S/data . && xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" +// XFAIL: * module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.endianness", "little">, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>>, llvm.data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", llvm.target_triple = "x86_64-unknown-linux-gnu", "polygeist.target-cpu" = "x86-64", "polygeist.target-features" = "+cx8,+fxsr,+mmx,+sse,+sse2,+x87", "polygeist.tune-cpu" = "generic"} { func.func @conv2d(%arg0: memref, %arg1: memref, %arg2: memref) attributes {llvm.linkage = #llvm.linkage} { diff --git a/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml_2/conv2d_i16_after_polygeist_2.mlir b/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml_2/conv2d_i16_after_polygeist_2.mlir index 14d5c30351..2292975f8e 100644 --- a/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml_2/conv2d_i16_after_polygeist_2.mlir +++ b/test/unit_tests/aievec_tests/i16xi16_conv2d_1x3_after_polygeist_aie-ml_2/conv2d_i16_after_polygeist_2.mlir @@ -6,7 +6,7 @@ // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/kernel.cc -o kernel.o // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/testbench.cc work/kernel.o // RUN: cp -r %S/data . && xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" - +// XFAIL: * module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.endianness", "little">, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>>, llvm.data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", llvm.target_triple = "x86_64-unknown-linux-gnu", "polygeist.target-cpu" = "x86-64", "polygeist.target-features" = "+cx8,+fxsr,+mmx,+sse,+sse2,+x87", "polygeist.tune-cpu" = "generic"} { func.func @conv2d(%arg0: memref, %arg1: memref, %arg2: memref) attributes {llvm.linkage = #llvm.linkage} { affine.for %arg3 = 0 to 16 { diff --git a/test/unit_tests/aievec_tests/i16xi16_gemm/gemm64_int16_unroll32.mlir b/test/unit_tests/aievec_tests/i16xi16_gemm/gemm64_int16_unroll32.mlir index ad36f578b6..71c22392cf 100644 --- a/test/unit_tests/aievec_tests/i16xi16_gemm/gemm64_int16_unroll32.mlir +++ b/test/unit_tests/aievec_tests/i16xi16_gemm/gemm64_int16_unroll32.mlir @@ -4,7 +4,7 @@ // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/kernel.cc -o kernel.o // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/testbench.cc work/kernel.o // RUN: cp -r %S/data . && xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" - +// XFAIL: * module { func.func @matmul(%arg0: memref<64x64xi16>, %arg1: memref<64x64xi16>, %arg2: memref<64x64xi16>) { affine.for %arg3 = 0 to 64 { diff --git a/test/unit_tests/aievec_tests/i16xi16_static_sized_memref_aie-ml/conv2d_uij_i16_noinit.mlir b/test/unit_tests/aievec_tests/i16xi16_static_sized_memref_aie-ml/conv2d_uij_i16_noinit.mlir index e142468049..389d9906a0 100644 --- a/test/unit_tests/aievec_tests/i16xi16_static_sized_memref_aie-ml/conv2d_uij_i16_noinit.mlir +++ b/test/unit_tests/aievec_tests/i16xi16_static_sized_memref_aie-ml/conv2d_uij_i16_noinit.mlir @@ -1,9 +1,4 @@ // REQUIRES: valid_xchess_license -// RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=16" -aieml=true --aie-vectorize="shift=10 zero-offset=4" | aie-translate -aie2=true --aievec-to-cpp -o gen_aie-ml.cc -// RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/kernel.cc -o kernel.o -// RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/testbench.cc work/kernel.o -// RUN: cp -r %S/data . && xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" - // RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=16" --convert-vector-to-aievec="aie-target=aie2 shift=10" -lower-affine | aie-translate -aie2=true --aievec-to-cpp -o convert_aie-ml.cc // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/convert_kernel.cc -o convert_kernel.o // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/testbench.cc work/convert_kernel.o diff --git a/test/unit_tests/aievec_tests/i32xi32_gemm/gemm64_int_unroll16.mlir b/test/unit_tests/aievec_tests/i32xi32_gemm/gemm64_int_unroll16.mlir index f255abdde9..a12061e0ad 100644 --- a/test/unit_tests/aievec_tests/i32xi32_gemm/gemm64_int_unroll16.mlir +++ b/test/unit_tests/aievec_tests/i32xi32_gemm/gemm64_int_unroll16.mlir @@ -4,6 +4,8 @@ // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/kernel.cc -o kernel.o // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/testbench.cc work/kernel.o // RUN: cp -r %S/data . && xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" +// XFAIL: * + module { func.func @matmul(%arg0: memref<64x64xi32>, %arg1: memref<64x64xi32>, %arg2: memref<64x64xi32>) { affine.for %arg3 = 0 to 64 { diff --git a/test/unit_tests/aievec_tests/i8xi8_conv2d_1x3_after_polygeist_aie-ml/conv2d_i8_after_polygeist.mlir b/test/unit_tests/aievec_tests/i8xi8_conv2d_1x3_after_polygeist_aie-ml/conv2d_i8_after_polygeist.mlir index a6e4ef8348..ac54150f5b 100644 --- a/test/unit_tests/aievec_tests/i8xi8_conv2d_1x3_after_polygeist_aie-ml/conv2d_i8_after_polygeist.mlir +++ b/test/unit_tests/aievec_tests/i8xi8_conv2d_1x3_after_polygeist_aie-ml/conv2d_i8_after_polygeist.mlir @@ -6,6 +6,7 @@ // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/kernel.cc -o kernel.o // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/i8xi8.cc work/kernel.o // RUN: cp -r %S/data . && xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" +// XFAIL: * module attributes {dlti.dl_spec = #dlti.dl_spec<#dlti.dl_entry<"dlti.endianness", "little">, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>, #dlti.dl_entry : vector<2xi64>>>, llvm.data_layout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128", llvm.target_triple = "x86_64-unknown-linux-gnu", "polygeist.target-cpu" = "x86-64", "polygeist.target-features" = "+cx8,+fxsr,+mmx,+sse,+sse2,+x87", "polygeist.tune-cpu" = "generic"} { func.func @conv2d(%arg0: memref, %arg1: memref, %arg2: memref) attributes {llvm.linkage = #llvm.linkage} { diff --git a/test/unit_tests/aievec_tests/i8xi8_static_sized_memref_aie-ml/conv2d_uij_i8_noinit.mlir b/test/unit_tests/aievec_tests/i8xi8_static_sized_memref_aie-ml/conv2d_uij_i8_noinit.mlir index 348efa6d64..c366d03fdc 100644 --- a/test/unit_tests/aievec_tests/i8xi8_static_sized_memref_aie-ml/conv2d_uij_i8_noinit.mlir +++ b/test/unit_tests/aievec_tests/i8xi8_static_sized_memref_aie-ml/conv2d_uij_i8_noinit.mlir @@ -1,9 +1,4 @@ // REQUIRES: valid_xchess_license -// RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=32" -aieml=true --aie-vectorize="shift=0 dup-factor=2" | aie-translate -aie2=true --aievec-to-cpp -o gen_aie-ml.cc -// RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/kernel.cc -o kernel.o -// RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/i8xi8.cc work/kernel.o -// RUN: cp -r %S/data . && xca_udm_dbg --aiearch aie-ml -qf -T -P %aietools/data/aie_ml/lib/ -t "%S/../profiling.tcl ./work/a.out" - // RUN: aie-opt %s -affine-super-vectorize="virtual-vector-size=32" --convert-vector-to-aievec="aie-target=aie2" -lower-affine | aie-translate -aie2=true --aievec-to-cpp -o convert_aie-ml.cc // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. -c %S/convert_kernel.cc -o convert_kernel.o // RUN: xchesscc -f -g +s -p me -P %aietools/data/aie_ml/lib/ +w work +o work -I%S -I. %S/i8xi8.cc work/convert_kernel.o