Size/technology of the transistor (in nanometers) used in Yosys #2989
danielacatelan
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The actual implementation of the design on an FPGA or an ASIC is not performed by Yosys itself. Correct me if I am wrong but Yosys only produces a synthesised Register-Transfer-Level output which you can import into a place-and-route tool. Look at this image for an overview: |
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Hi. I would like to know the size/technology of the transistor (in nanometers) used in Yosys. Thanks.
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