Why Uniqueness Constraints are not used in Yosys' K-Induction script to solve the problem of UNKNOWN due to Unreachable loop of good states? #3465
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Claire Wolf changed her name in 2019, you'll have a slightly higher chance of getting an answer from her if you edit your message accordingly. |
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In most real-world designs there is always some other state somewhere in the design that can change and render simple path constraints useless. There is no option for the |
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Hello
I have a query related to Yosys implementation of K-Induction Algorithm. I will be grateful if someone (especially Claire Wolf) could help me.
I have been using Yosys for a while to do the Formal Verification of some VHDL designs using PSL assertions. I observed that K-Induction is showing “UNKNOWN” most of the times for my designs. It is probably due to the unreachable loop(s) of good states followed by a reachable bad state in the state space that Claire Wolf have explained in one of her seminars on Yosys. As you must already know, adding addition assertions to break those loops is a strenous process. I wonder why have she has not put any Uniqueness Constraints in Yosys K-Induction script to encounter this problem.
Thanks
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