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cputest.c
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cputest.c
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////////////////////////////////////////////////////////////////////////////////
//
// Filename: sw/board/cputest.c
// {{{
// Project: KIMOS, a Mercury KX2 demonstration project
//
// Purpose: To test the CPU, it's instructions, cache, and pipeline, to make
// certain that it works. This includes testing that each of the
// instructions works, as well as any strange instruction combinations.
//
// This test does not check the LOCK instruction. This capability is
// tested via the lockcheck program also found in the same directory.
//
// Creator: Dan Gisselquist, Ph.D.
// Gisselquist Technology, LLC
//
////////////////////////////////////////////////////////////////////////////////
// }}}
// Copyright (C) 2023-2024, Gisselquist Technology, LLC
// {{{
// This file is part of the KIMOS project.
//
// The KIMOS project is free software and gateware: you can redistribute it
// and/or modify it under the terms of the GNU General Public License as
// published by the Free Software Foundation, either version 3 of the License,
// or (at your option) any later version.
//
// This program is distributed in the hope that it will be useful, but WITHOUT
// ANY WARRANTY; without even the implied warranty of MERCHANTIBILITY or
// FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
// for more details.
//
// You should have received a copy of the GNU General Public License along
// with this program. (It's in the $(ROOT)/doc directory. Run make with no
// target there if the PDF file isn't present.) If not, see
// <http://www.gnu.org/licenses/> for a copy.
// }}}
// License: GPL, v3, as defined and found on www.gnu.org,
// {{{
// http://www.gnu.org/licenses/gpl.html
//
////////////////////////////////////////////////////////////////////////////////
// }}}
#include <stdint.h>
#include "board.h"
#include "zipcpu.h"
#include "zipsys.h"
#ifndef NULL
#define NULL (void *)0
#endif
#define _ZIP_HAS_WBUART
#define PIC _zip->z_pic
#define UARTTX _uart->u_tx
#define UART_CTRL _uart->u_setup
#define TXBUSY (UARTTX & 0x0100)
#define HAVE_COUNTER
#define COUNTER _zip->z_m.ac_ck
// #define HAVE_SCOPE
// #define SCOPEc _sys->io_scope[0].s_ctrl
// #define SCOPE_DELAY 4
// #define TRIGGER_SCOPE_NOW (WBSCOPE_TRIGGER|SCOPE_DELAY)
// #define PREPARE_SCOPE SCOPE_DELAY
unsigned zip_ucc(void);
unsigned zip_cc(void);
void zip_save_context(void *);
void zip_halt(void);
void txchr(char v);
void txstr(const char *str);
void txhex(int num);
void tx4hex(int num);
#ifdef COUNTER
#define MARKSTART start_time = COUNTER
#define MARKSTOP stop_time = COUNTER
#else
#ifdef TIMER
#define MARKSTART start_time = TIMER
#define MARKSTOP stop_time = TIMER
#else
#define MARKSTART
#define MARKSTOP
#endif
#endif
extern int run_test(void *pc, void *stack);
// {{{
asm("\t.text\n\t.global\trun_test\n"
"\t.type\trun_test,@function\n"
"run_test:\n"
"\tCLR\tR3\n"
"\tMOV\ttest_return(PC),uR0\n"
"\tMOV\tR3,uR1\n"
"\tMOV\tR3,uR2\n"
"\tMOV\tR3,uR3\n"
"\tMOV\tR3,uR4\n"
"\tMOV\tR3,uR5\n"
"\tMOV\tR3,uR6\n"
"\tMOV\tR3,uR7\n"
"\tMOV\tR3,uR8\n"
"\tMOV\tR3,uR9\n"
"\tMOV\tR3,uR10\n"
"\tMOV\tR3,uR11\n"
"\tMOV\tR3,uR12\n"
"\tMOV\tR2,uSP\n" // uSP = stack
"\tMOV\t0x20+R3,uCC\n" // Clear uCC of all but the GIE bit
"\tMOV\tR1,uPC\n" // uPC = pc
"\tRTU\n"
"test_return:\n"
"\tMOV\tuR1,R1\n"
"\tAND\t0xffffffdf,CC\n"
// Works with 5 NOOPS, works with 3 NOOPS, works with 1 NOOP
"\tJMP\tR0\n");
// }}}
extern int idle_test(void);
// {{{
asm("\t.text\n\t.global\tidle_test\n"
"\t.type\tidle_test,@function\n"
"idle_test:\n"
"\tCLR\tR1\n"
"\tMOV\tidle_loop(PC),uR0\n"
"\tMOV\tR1,uR1\n"
"\tMOV\tR1,uR2\n"
"\tMOV\tR1,uR3\n"
"\tMOV\tR1,uR4\n"
"\tMOV\tR1,uR5\n"
"\tMOV\tR1,uR6\n"
"\tMOV\tR1,uR7\n"
"\tMOV\tR1,uR8\n"
"\tMOV\tR1,uR9\n"
"\tMOV\tR1,uR10\n"
"\tMOV\tR1,uR11\n"
"\tMOV\tR1,uR12\n"
"\tMOV\tR1,uSP\n"
"\tMOV\t0x20+R1,uCC\n"
"\tMOV\tidle_loop(PC),uPC\n"
"\tWAIT\n"
"\tMOV uPC,R1\n"
"\tCMP idle_loop(PC),R1\n"
"\tLDI 0,R1\n"
"\tLDI.NZ 1,R1\n"
"\nRETN\n"
"idle_loop:\n"
"\tWAIT\n"
"\tBRA idle_loop\n");
// }}}
void break_one(void);
// {{{
asm("\t.text\n\t.global\tbreak_one\n"
"\t.type\tbreak_one,@function\n"
"break_one:\n"
"\tLDI\t0,R1\n"
"\tBREAK\n"
"\tLDI\t1,R1\n" // Test fails
"\tJMP\tR0");
// }}}
void break_two(void);
// {{{
// Can we stop a break before we hit it?
asm("\t.text\n\t.global\tbreak_two\n"
"\t.type\tbreak_two,@function\n"
"break_two:\n"
"\tLDI\t0,R1\n"
"\tJMP\tR0\n"
"\tBREAK\n");
// }}}
void break_three(void);
// {{{
// Can we jump to a break, and still have the uPC match
asm("\t.text\n\t.global\tbreak_three\n"
"\t.type\tbreak_three,@function\n"
// R1 = 0 by default from calling. This will return as though
// we had succeeded.
"break_three:\n"
"\tBREAK\n");
// }}}
void early_branch_test(void);
// {{{
asm("\t.text\n\t.global\tearly_branch_test\n"
"\t.type\tearly_branch_test,@function\n"
"early_branch_test:\n"
"\tLDI\t1,R1\n"
"\tBRA\t_eb_a\n"
"\tBREAK\n"
"_eb_a:\n"
"\tLDI\t2,R1\n"
"\tBRA\t_eb_b\n"
"\tNOP\n"
"\tBREAK\n"
"_eb_b:\n"
"\tLDI\t3,R1\n"
"\tBRA\t_eb_c\n"
"\tNOP\n"
"\tNOP\n"
"\tBREAK\n"
"_eb_c:\n"
"\tLDI\t4,R1\n"
"\tBRA\t_eb_d\n"
"\tNOP\n"
"\tNOP\n"
"\tNOP\n"
"\tBREAK\n"
"_eb_d:\n"
"\tLDI\t5,R1\n"
"\tBRA\t_eb_e\n"
"\tNOP\n"
"\tNOP\n"
"\tNOP\n"
"\tNOP\n"
"\tBREAK\n"
"_eb_e:\n"
"\tLDI\t6,R1\n"
"\tBRA\t_eb_f\n"
"\tNOP\n"
"\tNOP\n"
"\tNOP\n"
"\tNOP\n"
"\tNOP\n"
"\tBREAK\n"
"_eb_f:\n"
"\tLDI\t0,R1\n"
"\tJMP\tR0");
// }}}
void trap_test_and(void);
// {{{
asm("\t.text\n\t.global\ttrap_test_and\n"
"\t.type\ttrap_test_and,@function\n"
"trap_test_and:\n"
"\tLDI\t0,R1\n"
"\tAND\t0xffffffdf,CC\n"
"\tLDI\t1,R1\n" // Test fails
"\tJMP\tR0");
// }}}
void trap_test_clr(void);
// {{{
asm("\t.text\n\t.global\ttrap_test_clr\n"
"\t.type\ttrap_test_clr,@function\n"
"trap_test_clr:\n"
"\tLDI\t0,R1\n"
"\tCLR\tCC\n"
"\tLDI\t1,R1\n" // Test fails
"\tJMP\tR0");
// }}}
void overflow_test(void);
// {{{
asm("\t.text\n\t.global\toverflow_test\n"
"\t.type\toverflow_test,@function\n"
"overflow_test:\n"
"\tLDI\t0,R1\n"
"\tLDI\t0,R3\n" // Clear our scorecard
// First test: does adding one to the maximum integer cause an overflow?
"\tLDI\t-1,R2\n"
"\tLSR\t1,R2\n"
"\tADD\t1,R2\n"
"\tOR.V\t1,R3\n"
// Second test: does subtracting one to the minimum integer cause an overflow?
"\tLDI\t0x80000000,R2\n"
"\tSUB\t1,R2\n"
"\tOR.V\t2,R3\n"
// Third test, overflow from LSR
"\tLDI\t0x80000000,R2\n"
"\tLSR\t1,R2\n" // Overflows 'cause the sign changes
"\tOR.V\t4,R3\n"
// Fourth test, overflow from LSL
"\tLDI\t0x40000000,R2\n"
"\tLSL\t1,R2\n"
"\tOR.V\t8,R3\n"
// Fifth test, overflow from LSL, negative to positive
"\tLDI\t0x80000000,R2\n"
"\tLSL\t1,R2\n"
"\tOR.V\t16,R3\n"
// Record our scores
"\tXOR\t31,R3\n"
"\tOR\tR3,R1\n"
// And return the results
"\tJMP\tR0");
// }}}
void carry_test(void);
// {{{
asm("\t.text\n\t.global\tcarry_test\n"
"\t.type\tcarry_test,@function\n"
"carry_test:\n"
"\tLDI\t0,R1\n"
"\tLDI\t0,R3\n"
// First, in adding
"\tLDI\t-1,R2\n"
"\tADD\t1,R2\n"
"\tOR.C\t1,R3\n"
// Then, in subtraction
"\tSUB\t1,R2\n"
"\tOR.C\t2,R3\n"
// From a right shift
"\tLDI\t1,R2\n"
"\tLSR\t1,R2\n"
"\tOR.C\t4,R3\n"
"\tLDI\t1,R2\n"
"\tASR\t1,R2\n"
"\tOR.C\t8,R3\n"
// Or from a compare
"\tLDI\t0,R2\n"
"\tCMP\t1,R2\n"
"\tOR.C\t16,R3\n"
// Set our return and clean up
"\tXOR\t31,R3\n"
"\tOR\tR3,R1\n"
"\tJMP\tR0");
// }}}
void loop_test(void);
// {{{
asm("\t.text\n\t.global\tloop_test\n"
"\t.type\tloop_test,@function\n"
"loop_test:\n"
"\tLDI\t0,R1\n"
// Let's try a loop: for(i=0; i<5; i++)
"\tLDI\t0,R2\n"
"\tLDI\t0,R3\n"
"\tCMP\t5,R2\n"
"\tBGE\tend_for_loop_test\n"
"for_loop_test:"
"\tADD\t1,R2\n"
"\tADD\t1,R3\n"
"\tCMP\t5,R2\n"
"\tBLT\tfor_loop_test\n"
"end_for_loop_test:"
"\tCMP\t5,R3\n"
"\tOR.NZ\t1,R1\n"
// How about a reverse do{} while loop? These are usually cheaper than for()
// loops.
"\tLDI\t0,R2\n"
// What if we use >=?
"\tLDI\t5,R3\n"
"bge_loop_test:\n"
"\tADD\t1,R2\n"
"\tSUB\t1,R3\n"
"\tBGE\tbge_loop_test\n"
"\tCMP\t6,R2\n"
"\tOR.NZ\t4,R1\n"
// Once more with the reverse loop, this time storing the loop variable in
// memory
"\tSUB\t4,SP\n"
"\tLDI\t0,R2\n"
"\tLDI\t4,R3\n"
"\tSW\tR3,(SP)\n"
"mem_loop_test:\n"
"\tADD\t1,R2\n" // Keep track of the number of times loop is executed
"\tADD\t14,R3\n"
"\tLW\t(SP),R3\n"
"\tSUB\t1,R3\n"
"\tSW\tR3,(SP)\n"
"\tBGE\tmem_loop_test\n"
"\tCMP\t5,R2\n"
"\tOR.NZ\t8,R1\n"
"\tADD\t4,SP\n"
//
"\tJMP\tR0\n");
// }}}
void shift_test(void);
// {{{
// Test whether or not LSL, LSR, and ASR instructions work, together with their
// carry flags
asm("\t.text\n\t.global\tshift_test\n"
"\t.type\tshift_test,@function\n"
"shift_test:\n"
"\tLDI\t0,R1\n" // Bit-field of tests that have failed
"\tLDI\t0,R3\n" // Bit-field of tests that have worked
"\tLDI\t0,R4\n" // Upper 16-bits of the same bit field
"\tLDI\t0,R5\n" // Upper 16-bits of tests that have failed
// Does shifting right by 32 result in a zero?
"\tLDI\t-1,R2\n"
"\tLSR\t32,R2\n"
"\tOR.Z\t1,R3\n"
"\tOR.C\t2,R3\n"
"\tCMP\t0,R2\n"
"\tOR.Z\t4,R3\n"
// Does shifting a -1 right arithmetically by 32 result in a -1?
"\tLDI\t-1,R2\n"
"\tASR\t32,R2\n"
"\tOR.LT\t8,R3\n"
"\tOR.C\t16,R3\n"
"\tCMP\t-1,R2\n"
"\tOR.Z\t32,R3\n"
// Does shifting a -4 right arithmetically by 2 result in a -1?
"\tLDI\t-4,R2\n"
"\tASR\t2,R2\n"
"\tOR.LT\t64,R3\n"
"\tOR.C\t128,R1\n"
"\tOR\t128,R3\n" // Artificially declare passing, so as not to fail it
"\tCMP\t-1,R2\n"
"\tOR.Z\t256,R3\n"
// Does one more set the carry flag as desired?
"\tASR\t1,R2\n"
"\tOR.LT\t512,R3\n"
"\tOR.C\t1024,R3\n"
"\tCMP\t-1,R2\n"
"\tOR.Z\t2048,R3\n"
// Does shifting -1 left by 32 result in a zero?
"\tLDI\t-1,R2\n"
"\tLSL\t32,R2\n"
"\tOR.Z\t4096,R3\n"
"\tOR.C\t8192,R3\n"
"\tCMP\t0,R2\n"
"\tOR.Z\t16384,R3\n"
// How about shifting by zero?
"\tLDI\t-1,R2\n"
"\tASR\t0,R2\n"
"\tOR.C\t32768,R1\n"
"\tOR\t32768,R3\n"
"\tCMP\t-1,R2\n"
"\tOR.Z\t1,R4\n"
//
"\tLSR\t0,R2\n"
"\tLDI\t131072,R5\n"
"\tOR.C\tR5,R1\n"
"\tCMP\t-1,R2\n"
"\tOR.Z\t2,R4\n"
//
"\tLSL\t0,R2\n"
"\tLDI\t524288,R5\n"
"\tOR.C\tR5,R1\n"
"\tCMP\t-1,R2\n"
"\tOR.Z\t4,R4\n"
// Tally up our results and return
"\tXOR\t7,R4\n"
"\tXOR\t65535,R3\n"
"\tLSL\t16,R4\n"
"\tOR\tR4,R3\n"
"\tOR\tR3,R1\n"
"\tJMP\tR0");
// }}}
int sw_brev(int v);
// {{{
asm("\t.text\n\t.global\tsw_brev\n"
"\t.type\tsw_brev,@function\n"
"sw_brev:\n"
"\tSUB\t8,SP\n"
"\tSW\tR2,(SP)\n"
"\tSW\tR3,4(SP)\n"
"\tLDI\t-1,R2\n"
"\tCLR\tR3\n"
"sw_brev_loop:\n"
"\tLSL\t1,R3\n"
"\tLSR\t1,R1\n"
"\tOR.C\t1,R3\n"
"\tLSR\t1,R2\n"
"\tBZ\tsw_brev_endloop\n"
"\tBRA\tsw_brev_loop\n"
"sw_brev_endloop:\n"
"\tMOV\tR3,R1\n"
"\tLW\t(SP),R2\n"
"\tLW\t4(SP),R3\n"
"\tADD\t8,SP\n"
"\tJMP\tR0");
// }}}
void pipeline_stack_test(void);
// {{{
asm("\t.text\n\t.global\tpipeline_stack_test\n"
"\t.type\tpipeline_stack_test,@function\n"
"pipeline_stack_test:\n"
"\tSUB\t4,SP\n"
"\tSW\tR0,(SP)\n"
"\tLDI\t0,R0\n"
"\tMOV\t1(R0),R1\n"
"\tMOV\t1(R1),R2\n"
"\tMOV\t1(R2),R3\n"
"\tMOV\t1(R3),R4\n"
"\tMOV\t1(R4),R5\n"
"\tMOV\t1(R5),R6\n"
"\tMOV\t1(R6),R7\n"
"\tMOV\t1(R7),R8\n"
"\tMOV\t1(R8),R9\n"
"\tMOV\t1(R9),R10\n"
"\tMOV\t1(R10),R11\n"
"\tMOV\t1(R11),R12\n"
"\tMOV\tpipeline_stack_test_component_return(PC),R0\n"
// "\tLJMP\tpipeline_stack_test_component\n"
"\tBRA\tpipeline_stack_test_component\n"
"pipeline_stack_test_component_return:\n"
"\tCMP\t1,R1\n"
"\tLDI.Z\t0,R1\n"
"\tCMP\t2,R2\n"
"\tCMP.Z\t3,R3\n"
"\tCMP.Z\t4,R4\n"
"\tCMP.Z\t5,R5\n"
"\tCMP.Z\t6,R6\n"
"\tCMP.Z\t7,R7\n"
"\tCMP.Z\t8,R8\n"
"\tCMP.Z\t9,R9\n"
"\tCMP.Z\t10,R10\n"
"\tCMP.Z\t11,R11\n"
"\tCMP.Z\t12,R12\n"
"\tBREV.NZ\t-1,R1\n"
"\tLW\t(SP),R0\n"
"\tADD\t4,SP\n"
"\tJMP\tR0\n"
);
// }}}
void pipeline_stack_test_component(void);
// {{{
asm("\t.text\n\t.global\tpipeline_stack_test_component\n"
"\t.type\tpipeline_stack_test_component,@function\n"
"pipeline_stack_test_component:\n"
"\tSUB\t52,SP\n"
"\tSW\tR0,(SP)\n"
"\tSW\tR1,4(SP)\n"
"\tSW\tR2,8(SP)\n"
"\tSW\tR3,12(SP)\n"
"\tSW\tR4,16(SP)\n"
"\tSW\tR5,20(SP)\n"
"\tSW\tR6,24(SP)\n"
"\tSW\tR7,28(SP)\n"
"\tSW\tR8,32(SP)\n"
"\tSW\tR9,36(SP)\n"
"\tSW\tR10,40(SP)\n"
"\tSW\tR11,44(SP)\n"
"\tSW\tR12,48(SP)\n"
"\tXOR\t-1,R0\n"
"\tXOR\t-1,R1\n"
"\tXOR\t-1,R2\n"
"\tXOR\t-1,R3\n"
"\tXOR\t-1,R4\n"
"\tXOR\t-1,R5\n"
"\tXOR\t-1,R6\n"
"\tXOR\t-1,R7\n"
"\tXOR\t-1,R8\n"
"\tXOR\t-1,R9\n"
"\tXOR\t-1,R10\n"
"\tXOR\t-1,R11\n"
"\tXOR\t-1,R12\n"
"\tLW\t(SP),R0\n"
"\tLW\t4(SP),R1\n"
"\tLW\t8(SP),R2\n"
"\tLW\t12(SP),R3\n"
"\tLW\t16(SP),R4\n"
"\tLW\t20(SP),R5\n"
"\tLW\t24(SP),R6\n"
"\tLW\t28(SP),R7\n"
"\tLW\t32(SP),R8\n"
"\tLW\t36(SP),R9\n"
"\tLW\t40(SP),R10\n"
"\tLW\t44(SP),R11\n"
"\tLW\t48(SP),R12\n"
"\tADD\t52,SP\n"
"\tJMP\tR0\n");
// }}}
void mpy_test(void);
// {{{
asm("\t.text\n\t.global\tmpy_test\n"
"\t.type\tmpy_test,@function\n"
"mpy_test:\n"
"\tCLR\tR1\n"
// First test: let's count multiples of 137
"\tLDI\t137,R2\n" // What we're doing multiples of
"\tCLR\tR3\n" // Our accumulator via addition
"\tCLR\tR4\n" // Our index for multiplication
"mpy_137_test_loop:\n"
"\tMOV\tR2,R5\n"
"\tMPY\tR4,R5\n"
"\tCMP\tR3,R5\n"
"\tBNZ\tend_mpy_137_test_loop_failed\n"
// Let's try negative while we are at it
"\tMOV\tR2,R6\n"
"\tNEG\tR6\n"
"\tMPY\tR4,R6\n"
"\tNEG\tR6\n"
"\tCMP\tR3,R6\n"
"\tBNZ\tend_mpy_137_test_loop_failed\n"
"\tCLR\tR6\n"
"\tTEST\t0xffff0000,R3\n"
"\tBNZ\tend_mpy_137_test_loop\n"
"\tADD\tR2,R3\n"
"\tADD\t1,R4\n"
"\tBRA\tmpy_137_test_loop\n"
"end_mpy_137_test_loop_failed:\n"
"\tOR\t1,R1\n"
"end_mpy_137_test_loop:\n"
// Second test ... whatever that might be
"\tJMP\tR0\n");
// }}}
unsigned soft_mpyuhi(unsigned, unsigned);
int soft_mpyshi(int,int);
unsigned hard_mpyuhi(unsigned, unsigned);
// {{{
asm("\t.text\n\t.global\thard_mpyuhi\n"
"\t.type\thard_mpyuhi,@function\n"
"hard_mpyuhi:\n"
"\tMPYUHI\tR2,R1\n"
"\tRETN\n");
// }}}
int hard_mpyshi(int, int);
// {{{
asm("\t.text\n\t.global\thard_mpyshi\n"
"\t.type\thard_mpyshi,@function\n"
"hard_mpyshi:\n"
"\tMPYSHI\tR2,R1\n"
"\tRETN\n");
// }}}
void debugmpy(char *str, int a, int b, int s, int r) {
// {{{
#ifdef HAVE_SCOPE
// Trigger the scope, if it hasn't been triggered yet
// but ... dont reset it if it has been.
SCOPEc = TRIGGER_SCOPE_NOW;
#endif
txstr("\r\n"); txstr(str); txhex(a);
txstr(" x "); txhex(b);
txstr(" = "); txhex(s);
txstr("(Soft) = "); txhex(r);
txstr("(Hard)\r\n");
}
// }}}
int mpyhi_test(void) {
// {{{
int a = 0xf97e27ab, b = 0;
while(b<0x6fffffff) {
int r, sr;
sr = soft_mpyuhi(a, b);
r = hard_mpyuhi(a,b);
if (r != sr) {
debugmpy("MPYUHI: ", a,b,sr,r);
return 1;
}
sr = soft_mpyshi(a, b);
r = hard_mpyshi(a,b);
if (r != sr) {
debugmpy("MPYSHI: ", a,b,sr,r);
return 2;
}
sr = soft_mpyshi(-a, b);
r = hard_mpyshi(-a,b);
if (r != sr) {
debugmpy("MPYSHI-NEG: ", -a,b,sr,r);
return 3;
}
b += 0x197e2*7;
}
return 0;
}
// }}}
unsigned soft_mpyuhi(unsigned a, unsigned b) {
// {{{
unsigned alo, ahi;
unsigned rhi, rlhi, rllo;
alo = (a & 0x0ffff);
ahi = (a>>16)& 0x0ffff;
rhi = 0;
rlhi = 0;
rllo = 0;
for(int i=0; i<16; i++) {
if (b&(1<<i)) {
unsigned slo, shi, sup;
slo = (alo << i);
shi = (ahi << i);
shi |= (slo>>16) & 0x0ffff;
slo &= 0x0ffff;
sup = (shi>>16)&0x0ffff;
shi &= 0x0ffff;
rhi += sup;
rlhi += shi;
rllo += slo;
rlhi += (rllo >> 16)&0x0ffff;
rllo &= 0x0ffff;
rhi += (rlhi >> 16)&0x0ffff;
rlhi &= 0x0ffff;
}
}
for(int i=16; i<32; i++) {
if (b&(1<<i)) {
unsigned slo, shi, sup;
slo = (alo << (i-16));
shi = (ahi << (i-16));
shi |= (slo>>16) & 0x0ffff;
slo &= 0x0ffff;
sup = (shi>>16)&0x0ffff;
shi &= 0x0ffff;
rhi += sup << 16;
rhi += shi;
rlhi += slo;
rhi += (rlhi >> 16)&0x0ffff;
rlhi &= 0x0ffff;
}
}
return rhi;
}
// }}}
int soft_mpyshi(int a, int b) {
// {{{
unsigned sgn, r, p;
sgn = ((a^b)>>31)&0x01;
if (a<0) a = -a;
if (b<0) b = -b;
p = a * b;
// This will only fail if the lower 32-bits of of a*b are 0,
// at which point our following negation won't capture the carry it
// needs.
r = soft_mpyuhi(a, b);
r = (sgn)?(r^-1):r;
if ((sgn)&&(p==0))
r += 1;
return r;
}
// }}}
int divu_test(void);
// {{{
asm("\t.text\n\t.global\tdivu_test\n"
"\t.type\tdivu_test,@function\n"
"divu_test:\n"
"\tLDI\t0x4881a7,R4\n"
"\tLDI\t0x2d5108b,R2\n"
"\tLDI\t10,R3\n"
"\tDIVU\tR3,R2\n" // R3 = 0x2d5108b /= 10
"\tCMP\tR4,R2\n" // Compare DIVU result to 0x4881a7
"\tLDILO.NZ\t1,R1\n"
"\tRETN.NZ\n"
"\tLDI\t0x2d5108b,R2\n"
"\tDIVU\t10,R2\n" // R2 = 0x2d5108b /= 10
"\tCMP\tR4,R2\n" // Compare R2 to 0x4881a7
"\tLDILO.NZ\t1,R1\n"
"\tRETN\n");
// }}}
int divs_test(void);
// {{{
asm("\t.text\n\t.global\tdivs_test\n"
"\t.type\tdivs_test,@function\n"
"divs_test:\n"
"\tLDI\t-26,R4\n" // Expected result
"\tLDI\t131,R2\n"
"\tLDI\t-5,R3\n"
"\tDIVS\tR3,R2\n" // 131 / -5
"\tCMP\tR4,R2\n"
"\tLDILO.NZ\t1,R1\n"
"\tRETN.NZ\n"
// 0x2653 * 0x098953d = 0x16d79_f70c7
// -883 * -999671 = -882709493
//
"\tLDI\t883,R2\n" // R2 = A
"\tLDI\t999671,R3\n" // R3 = B
"\tMOV\tR3,R4\n"
"\tMPY\tR2,R4\n" // R4 = A*B
//
"\tMOV\tR4,R5\n" // R5 = R4 = A*B
"\tDIVS\tR2,R5\n" // R5 = A * B / A
"\tCMP\tR3,R5\n"
"\tLDILO.NZ\t3,R1\n"
"\tRETN.NZ\n"
//
// -(A*B) / B
"\tMOV\tR4,R5\n" // R5 = R4 = A*B
"\tNEG\tR5\n" // R5 = -R4 = -A*B
"\tMOV\tR3,R6\n" // R6 = B
"\tNEG\tR6\n" // R6 = -B
"\tDIVS\tR2,R5\n" // R5 = A * B / A
"\tCMP\tR6,R5\n"
"\tLDILO.NZ\t5,R1\n"
"\tRETN.NZ\n"
//
// -(A*B) / -B
"\tMOV\tR4,R5\n" // R5 = R4 = A*B
"\tNEG\tR5\n" // R5 = -R4 = -A*B
"\tMOV\tR2,R6\n" // R6 = B
"\tNEG\tR6\n" // R6 = -B
"\tDIVS\tR6,R5\n" // R5 = A * B / A
"\tCMP\tR3,R5\n"
"\tLDILO.NZ\t7,R1\n"
// "\tRETN.NZ\n"
//
"\tRETN\n");
// }}}
void pipeline_test(void);
// {{{
//pipeline_test -- used to be called pipeline memory race conditions
asm("\t.text\n\t.global\tpipeline_test\n"
"\t.type\tpipeline_test,@function\n"
"pipeline_test:\n"
"\tSUB\t12,SP\n"
// Test setup
"\tLDI\t275,R2\n"
"\tSW\tR2,4(SP)\n"
"\tMOV\t4(SP),R2\n"
"\tSW\tR2,(SP)\n"
"\tCLR\tR2\n"
//
"\tMOV\tSP,R2\n"
"\tLW\t(R2),R2\n"
"\tLW\t(R2),R2\n"
"\tCMP\t275,R2\n"
"\tOR.NZ\t1,R1\n"
//
"\tMOV\tSP,R2\n"
// Here's the test sequence
"\tLW\t(R2),R3\n"
"\tLW\t4(R2),R4\n"
"\tSW\tR4,4(R3)\n"
// Make sure we clear the load pipeline
"\tLW\t(R2),R3\n"
// Load our written value
"\tLW\t8(R2),R4\n"
"\tCMP\t275,R4\n"
"\tOR.NZ\t2,R1\n"
//
//
// Next (once upon a time) failing sequence:
// LOD -x(R12),R0
// LOD y(R0),R0
"\tMOV\tSP,R2\n"
"\tMOV\t4(R2),R3\n"
"\tSW\tR3,4(R2)\n"
"\tLDI\t3588,R4\n" // Just some random value
"\tSW\tR4,8(R2)\n"
"\tMOV\tR2,R3\n"
// Here's the test sequence
"\tLW\t(R2),R3\n"
"\tLW\t4(R3),R3\n"
"\tCMP\tR4,R3\n"
"\tOR.NZ\t4,R1\n"
//
"\tADD\t12,SP\n"
"\tJMP\tR0\n");
// }}}
void mempipe_test(void);
// {{{
//mempipe_test
asm("\t.text\n\t.global\tmempipe_test\n"
"\t.type\tmempipe_test,@function\n"
"mempipe_test:\n"
"\tSUB\t16,SP\n"
"\tSW\tR0,(SP)\n"
"\tLDI\t0x1000,R11\n"
// Test #1 ... Let's start by writing a value to memory
"\tLDI\t-1,R2\n"
"\tCLR\tR3\n"
"\tSW\tR2,8(SP)\n"
"\tLW\t8(SP),R3\n"
"\tCMP\tR3,R2\n"
"\tOR.NZ\t1,R1\n"
// Test #2, reading and then writing a value from memory
"\tNOOP\n"
"\tNOOP\n"
"\tCLR\tR2\n"
"\tCLR\tR3\n"
"\tLW\t8(SP),R2\n" // This should load back up our -1 value
"\tSW\tR2,12(SP)\n"
// Insist that the pipeline clear
"\tLW\t8(SP),R2\n"
// Now let's try loading into R3
"\tNOOP\n"
"\tNOOP\n"
"\tNOOP\n"
"\tNOOP\n"
"\tLW\t12(SP),R3\n"
"\tCMP\tR3,R2\n"
"\tOR.NZ\t2,R1\n"
//
"\tLW\t(SP),R0\n"
"\tADD\t16,SP\n"
"\tJMP\tR0\n");
// }}}
void cexec_test(void);
// {{{
//cexec_test
asm("\t.text\n\t.global\tcexec_test\n"
"\t.type\tcexec_test,@function\n"
"cexec_test:\n"
"\tSUB\t4,SP\n"
"\tSW\tR0,(SP)\n"
//
"\tXOR\tR2,R2\n"
"\tADD.Z\t1,R2\n"
"\tADD.NZ\t1,R1\n"
"\tCMP.Z\t0,R2\n"
"\tOR.Z\t2,R1\n"
//
"\tLW\t(SP),R0\n"
"\tADD\t4,SP\n"
"\tJMP\tR0\n");
// }}}
void nowaitpipe_test(void);
// {{{
// Pipeline stalls have been hideous problems for me. The CPU has been modified
// with special logic to keep stages from stalling. For the most part, this
// means that ALU and memory results may be accessed either before or as they
// are written to the register file. This set of code is designed to test
// whether this bypass logic works.
//
asm("\t.text\n\t.global\tnowaitpipe_test\n"
"\t.type\tnowaitpipe_test,@function\n"
"nowaitpipe_test:\n"
"\tSUB\t8,SP\n"
//
// Let's start with ALU-ALU testing
// AA: result->input A
"\tLDI\t-1,R2\n"
"\tCLR\tR2\n"
"\tADD\t1,R2\n"
"\tCMP\t1,R2\n"
"\tOR.NZ\t1,R1\n"
//
// AA: result -> input B
"\tCLR\tR2\n"
"\tCLR\tR3\n"
"\tADD\t1,R2\n"
"\tCMP\tR2,R3\n"
"\tOR.Z\t2,R1\n"
// AA: result -> input A on condition
"\tXOR\tR2,R2\n"
"\tADD.Z\t5,R2\n"
"\tCMP\t5,R2\n"
"\tOR.NZ\t4,R1\n"
// AA: result -> input B on condition
"\tCLR\tR2\n"
"\tXOR\tR3,R3\n"
"\tADD.Z\t5,R2\n"
"\tCMP\tR2,R3\n"
"\tOR.Z\t8,R1\n"
// AA: result->input B plus offset
"\tCLR\tR2\n"
"\tXOR\tR3,R3\n"
"\tADD\t5,R2\n"
"\tCMP\t-5(R2),R3\n"
"\tOR.NZ\t16,R1\n"
// AA: result->input B plus offset on condition
"\tCLR\tR2\n"
"\tXOR\tR3,R3\n"
"\tADD.Z\t5,R2\n"
"\tCMP\t-5(R2),R3\n"
"\tOR.NZ\t32,R1\n"
//
// Then we need to do the ALU-MEM input testing
//
"\tCLR\tR2\n"
"\tSW\tR2,4(SP)\n"
"\tLDI\t8352,R2\n"
"\tLW\t4(SP),R2\n"
"\tTST\t-1,R2\n"
"\tOR.NZ\t64,R1\n"
// Let's try again, this time with something that's not zero
"\tLDI\t937,R2\n"
"\tSW\tR2,4(SP)\n"
"\tNOOP\n"
"\tLW\t4(SP),R2\n"
"\tCMP\t938,R2\n"
"\tOR.GE\t128,R1\n"
"\tCMP\t936,R2\n"
"\tOR.LT\t256,R1\n"