From 186af33824868bc1fc447bb618930db308e02f41 Mon Sep 17 00:00:00 2001 From: Wiktoria Kuna Date: Mon, 18 Mar 2024 22:05:32 +0100 Subject: [PATCH] test: Simplify ImageTransfer test Due to DMA configurability and previously introduced inheritance, the reflection is no longer needed for the test case. Signed-off-by: Wiktoria Kuna --- .../scala/DMAController/ImageTransfer.scala | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/src/test/scala/DMAController/ImageTransfer.scala b/src/test/scala/DMAController/ImageTransfer.scala index be2a6e9..1f1620c 100644 --- a/src/test/scala/DMAController/ImageTransfer.scala +++ b/src/test/scala/DMAController/ImageTransfer.scala @@ -14,7 +14,6 @@ SPDX-License-Identifier: Apache-2.0 package DMAController -import scala.reflect.runtime.universe._ import DMAController.Bfm.ChiselBfm import DMAController.Worker.{InterruptBundle, SyncBundle} import chiseltest.iotesters.PeekPokeTester @@ -40,15 +39,14 @@ class ImageTransfer(dut: DMATop, dmaFull: DMAFull, dmaConfig: DMAConfig) extends assert(cnt >= min) } - val cls = runtimeMirror(getClass.getClassLoader).reflect(this) - val members = cls.symbol.typeSignature.members - - def bfms = members.filter(_.typeSignature <:< typeOf[ChiselBfm]) + val reader = dmaFull.reader + val writer = dmaFull.writer + val control = dmaFull.control def stepSingle(): Unit = { - for(bfm <- bfms){ - cls.reflectField(bfm.asTerm).get.asInstanceOf[ChiselBfm].update(cnt) - } + reader.update(cnt) + writer.update(cnt) + control.update(cnt) super.step(1) } @@ -58,10 +56,6 @@ class ImageTransfer(dut: DMATop, dmaFull: DMAFull, dmaConfig: DMAConfig) extends } } - val reader = dmaFull.reader - val writer = dmaFull.writer - val control = dmaFull.control - reader.loadFromFile("./img0.rgba") writer.loadFromFile("./img1.rgba")