diff --git a/src/zfinx.tex b/src/zfinx.tex
index e490632db..60a2c551e 100644
--- a/src/zfinx.tex
+++ b/src/zfinx.tex
@@ -59,10 +59,10 @@ \section{Processing of Narrower Values}
 Hence, the need for NaN boxing is diminished.
 
 Sign-extending 32-bit floating-point numbers when held in RV64 {\tt x}
-registers matches the existing RV64 calling conventions, which require all
-32-bit types to be sign-extended when passed or returned in {\tt x} registers.
-To keep the architecture more regular, we extend this pattern to 16-bit
-floating-point numbers in both RV32 and RV64.
+registers is compatible with the existing RV64 calling conventions, which
+leaves bits 33-64 undefined when passing a 32-bit floating point value in
+{\tt x} registers. To keep the architecture more regular, we extend this
+pattern to 16-bit floating-point numbers in both RV32 and RV64.
 \end{commentary}
 
 \section{Zdinx}