From e157e240f71cd3f3db0f5fa17342e85564b17d13 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20M=C3=B6rtsell?= Date: Mon, 18 Dec 2023 13:54:16 +0100 Subject: [PATCH 1/4] Fix CI --- .github/workflows/build.yml | 2 +- CHANGELOG.md | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index e0b0ee2..10b9f39 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -14,7 +14,7 @@ jobs: - name: Checkout sources uses: actions/checkout@v2 - id: pacs - run: echo "::set-output name=pac_matrix::$(ls ./pac --indicator-style=none | grep atsam | cut -c 3- | jq -ncR '[inputs]')" + run: echo "::set-output name=pac_matrix::$(grep -o '^sam\w*' hal/Cargo.toml | uniq | jq -ncR '[inputs]')" - id: boards run: echo "::set-output name=board_matrix::$(ls ./boards --indicator-style=none | jq -ncR '[inputs]')" - id: features diff --git a/CHANGELOG.md b/CHANGELOG.md index 337f428..b5d6fd4 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -19,6 +19,7 @@ - Examples now build and link again - [#62] Remove ambiguous reexports from `src/serial/mod.rs`. - TWIHS: Fix issue with clock frequency calculation. +- Fix CI ## [v0.4.2] 2022-11-06 From 7f3e7ee1770f79972a83140eae703602acef5ffa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20M=C3=B6rtsell?= Date: Mon, 18 Dec 2023 16:01:21 +0100 Subject: [PATCH 2/4] Fix Warnings Thrown BY CI Process --- hal/src/afec.rs | 2 +- hal/src/clocks/mod.rs | 4 ++-- hal/src/pio/bank.rs | 2 +- hal/src/pio/mod.rs | 2 +- hal/src/pio/reg.rs | 4 ++-- hal/src/pwm.rs | 2 +- hal/src/rtt.rs | 6 +++--- hal/src/serial/spi.rs | 19 +++++++++++-------- hal/src/serial/twi.rs | 6 +++--- hal/src/serial/uart.rs | 2 +- hal/src/serial/usart/mod.rs | 2 +- hal/src/serial/usart/spi.rs | 4 ++-- hal/src/tc/generate.rs | 2 +- hal/src/tc/mod.rs | 16 ++++++++-------- hal/src/usb.rs | 12 ++++++------ 15 files changed, 44 insertions(+), 41 deletions(-) diff --git a/hal/src/afec.rs b/hal/src/afec.rs index 3e0b7fb..cd398f8 100644 --- a/hal/src/afec.rs +++ b/hal/src/afec.rs @@ -20,7 +20,7 @@ This implementation presumes that VREFP is 3.3V. # use hal::efc::*; # use hal::afec::*; # use hal::fugit::RateExtU32; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{ hal::pac::Peripherals::steal() }; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let banka = BankA::new(pac.PIOA, &mut mck, &slck, BankConfiguration::default()); diff --git a/hal/src/clocks/mod.rs b/hal/src/clocks/mod.rs index 30f4373..ea9f800 100644 --- a/hal/src/clocks/mod.rs +++ b/hal/src/clocks/mod.rs @@ -28,7 +28,7 @@ For example, if we want to configure the [`MainClock`]: use atsamx7x_hal as hal; use hal::fugit::RateExtU32; -let pac = hal::pac::Peripherals::take().unwrap(); +let pac = unsafe{hal::pac::Peripherals::steal()}; let clocks = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()); let mainck = clocks .mainck @@ -72,7 +72,7 @@ use hal::efc::{Efc, VddioLevel}; use hal::fugit::RateExtU32; // configure the clock hierarchy -let pac = hal::pac::Peripherals::take().unwrap(); +let pac = unsafe{hal::pac::Peripherals::steal()}; let clocks = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()); let slck = clocks.slck.configure_external_normal(); let mainck = clocks diff --git a/hal/src/pio/bank.rs b/hal/src/pio/bank.rs index ef33076..e79e76f 100644 --- a/hal/src/pio/bank.rs +++ b/hal/src/pio/bank.rs @@ -42,7 +42,7 @@ impl BankInterrupts { /// # use hal::pio::*; /// # use hal::clocks::*; /// # use hal::efc::*; - /// # let pac = hal::pac::Peripherals::take().unwrap(); + /// # let pac = unsafe{hal::pac::Peripherals::steal()}; /// # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); /// let mut banka = BankA::new(pac.PIOA, &mut mck, &slck, BankConfiguration::default()); /// for pin in banka.interrupts.iter() { diff --git a/hal/src/pio/mod.rs b/hal/src/pio/mod.rs index cde6366..48ea302 100644 --- a/hal/src/pio/mod.rs +++ b/hal/src/pio/mod.rs @@ -86,7 +86,7 @@ The below example configures [`Pin`] to trigger on # use hal::pio::*; # use hal::clocks::*; # use hal::efc::*; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let banka = BankA::new( diff --git a/hal/src/pio/reg.rs b/hal/src/pio/reg.rs index 84b792d..7fd0f89 100644 --- a/hal/src/pio/reg.rs +++ b/hal/src/pio/reg.rs @@ -150,7 +150,7 @@ pub(in crate::pio) trait RegisterInterface { } fn set_interrupt(&mut self, cfg: Option) { - if cfg == None { + if cfg.is_none() { // Disable pin interrupt // // XXX The peripheral clock is not disabled because it @@ -191,7 +191,7 @@ pub(in crate::pio) trait RegisterInterface { } fn set_filter(&mut self, cfg: Option) { - if cfg == None { + if cfg.is_none() { // disable the input filter self.reg().ifdr.write(|w| unsafe { w.bits(self.mask()) }); } else { diff --git a/hal/src/pwm.rs b/hal/src/pwm.rs index be20644..8907311 100644 --- a/hal/src/pwm.rs +++ b/hal/src/pwm.rs @@ -17,7 +17,7 @@ Refer to §51 for a full description of the PWM peripheral. # use hal::efc::*; # use hal::pwm::*; # use hal::fugit::RateExtU32; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); use hal::ehal::PwmPin; diff --git a/hal/src/rtt.rs b/hal/src/rtt.rs index d738ca5..906d4be 100644 --- a/hal/src/rtt.rs +++ b/hal/src/rtt.rs @@ -23,7 +23,7 @@ via [`Rtt::new_8192Hz`]. # use hal::rtt::*; # use hal::fugit::RateExtU32; # use rtic_monotonic::*; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let mono: Mono<100> = Rtt::new(pac.RTT, &slck, 100.Hz()).unwrap().into_monotonic(); @@ -37,7 +37,7 @@ or # use hal::rtt::*; # use hal::fugit::RateExtU32; # use rtic_monotonic::Monotonic; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); use hal::ehal::{blocking::delay::DelayMs, timer::{CountDown, Cancel}}; @@ -83,7 +83,7 @@ pub enum RttError { /// # use hal::efc::*; /// # use hal::rtt::*; /// # use hal::fugit::RateExtU32; - /// # let pac = hal::pac::Peripherals::take().unwrap(); + /// # let pac = unsafe{hal::pac::Peripherals::steal()}; /// # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); /// let rtt: Rtt<100> = Rtt::new(pac.RTT, &slck, 100.Hz()).unwrap(); /// ``` diff --git a/hal/src/serial/spi.rs b/hal/src/serial/spi.rs index 09cec73..5a02804 100644 --- a/hal/src/serial/spi.rs +++ b/hal/src/serial/spi.rs @@ -23,7 +23,7 @@ Interrupt event management is handled by the [`event system`](crate::generics::e # use hal::serial::spi::*; # use hal::serial::ExtBpsU32; # use hal::fugit::ExtU32; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let bankd = BankD::new(pac.PIOD, &mut mck, &slck, BankConfiguration::default()); @@ -203,11 +203,6 @@ pub struct SpiConfiguration { } impl SpiConfiguration { - /// Generates a default [`Spi`] configuration: test mode inactive. - pub fn default() -> Self { - SpiConfiguration { test_mode: false } - } - /// [`SpiConfiguration::test_mode`] override. pub fn test_mode(mut self, bit: bool) -> Self { self.test_mode = bit; @@ -215,6 +210,14 @@ impl SpiConfiguration { } } +/// Generates a default [`Spi`] configuration: test mode inactive. +impl Default for SpiConfiguration{ + fn default() -> Self { + SpiConfiguration { test_mode: false } + } +} + + /// SPI peripheral abstraction. pub struct Spi { meta: PhantomData, @@ -639,9 +642,9 @@ impl<'spi, M: SpiMeta> blocking::spi::Transactional for Client<'spi, M> { /// Execute the provided transactions, deasserting the select line /// after the last transmitted word. - fn exec<'a>( + fn exec( &mut self, - operations: &mut [blocking::spi::Operation<'a, u8>], + operations: &mut [blocking::spi::Operation], ) -> Result<(), Self::Error> { use blocking::spi::Operation; diff --git a/hal/src/serial/twi.rs b/hal/src/serial/twi.rs index 2401cfc..678b9af 100644 --- a/hal/src/serial/twi.rs +++ b/hal/src/serial/twi.rs @@ -20,7 +20,7 @@ implemented. # use hal::efc::*; # use hal::serial::twi::*; # use hal::fugit::RateExtU32; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let banka = BankA::new(pac.PIOA, &mut mck, &slck, BankConfiguration::default()); @@ -367,10 +367,10 @@ enum TransactionalState { impl blocking::i2c::Transactional for Twi { type Error = TwiError; - fn exec<'a>( + fn exec( &mut self, address: u8, - operations: &mut [blocking::i2c::Operation<'a>], + operations: &mut [blocking::i2c::Operation], ) -> Result<(), Self::Error> { let mut state = TransactionalState::Uninitialized; diff --git a/hal/src/serial/uart.rs b/hal/src/serial/uart.rs index 68806a4..ef233d9 100644 --- a/hal/src/serial/uart.rs +++ b/hal/src/serial/uart.rs @@ -26,7 +26,7 @@ Interrupt event management is handled by the [`event system`](crate::generics::e # use hal::serial::uart::*; # use hal::serial::ExtBpsU32; # use hal::fugit::{ExtU32, RateExtU32}; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; let clocks = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()); let slck = clocks.slck.configure_external_normal(); let mainck = clocks diff --git a/hal/src/serial/usart/mod.rs b/hal/src/serial/usart/mod.rs index 096fe4b..ab2ba6a 100644 --- a/hal/src/serial/usart/mod.rs +++ b/hal/src/serial/usart/mod.rs @@ -32,7 +32,7 @@ Mode support depends on what [`Pin`]s that are available for the # use hal::serial::usart::*; # use hal::serial::ExtBpsU32; # use hal::fugit::{ExtU32, RateExtU32}; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); use hal::generics::events::EventHandler; use hal::ehal::serial::{Read, Write}; diff --git a/hal/src/serial/usart/spi.rs b/hal/src/serial/usart/spi.rs index fcbaece..2896744 100644 --- a/hal/src/serial/usart/spi.rs +++ b/hal/src/serial/usart/spi.rs @@ -227,9 +227,9 @@ impl ehal::spi::FullDuplex for Spi { impl blocking::spi::Transactional for Spi { type Error = SpiError; - fn exec<'a>( + fn exec( &mut self, - operations: &mut [blocking::spi::Operation<'a, u8>], + operations: &mut [blocking::spi::Operation], ) -> Result<(), Self::Error> { use blocking::spi::Operation; diff --git a/hal/src/tc/generate.rs b/hal/src/tc/generate.rs index 681a0e4..7939ca5 100644 --- a/hal/src/tc/generate.rs +++ b/hal/src/tc/generate.rs @@ -144,7 +144,7 @@ where // integer. // // Safe: driver was consumed in Channel::chain. - let mut driver = unsafe { Channel::::new::>() }; + let mut driver = unsafe { Channel::::new() }; // The 16-bit counter is incremented only at each positive // input clock edge. When chaining channels, this then results // in a static /2 prescaler. Refer to §50.6.2. diff --git a/hal/src/tc/mod.rs b/hal/src/tc/mod.rs index 8ca3064..b558176 100644 --- a/hal/src/tc/mod.rs +++ b/hal/src/tc/mod.rs @@ -22,7 +22,7 @@ Refer to §50 for a full description on the capabilities offered by a [`Tc`]. # use hal::efc::*; # use hal::tc::*; # use hal::fugit::ExtU32; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let banka = hal::pio::BankA::new( pac.PIOA, @@ -54,7 +54,7 @@ counter.sample_freq(100.millis()); # use hal::clocks::*; # use hal::efc::*; # use hal::tc::*; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let tc = Tc::new_tc0(pac.TC0, &mut mck); let driver = tc @@ -80,7 +80,7 @@ let mono: Monotonic> # use hal::clocks::*; # use hal::efc::*; # use hal::tc::*; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); let tc = Tc::new_tc0(pac.TC0, &mut mck); let driver = tc @@ -410,7 +410,7 @@ pub enum TcError { /// # use hal::clocks::*; /// # use hal::efc::*; /// # use hal::tc::*; - /// # let pac = hal::pac::Peripherals::take().unwrap(); + /// # let pac = unsafe{hal::pac::Peripherals::steal()}; /// # let (slck, mut mck) = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()).por_state(&mut Efc::new(pac.EFC, VddioLevel::V3)); /// let tc = Tc::new_tc0(pac.TC0, &mut mck); /// let ch = tc.channel_0.generate::<15_000_000>(&mck).unwrap(); @@ -452,7 +452,7 @@ impl Channel { /// /// A [`Channel`] can modify hardware, but can be created without /// consuming a corresponding singleton. - const unsafe fn new() -> Self { + const unsafe fn new() -> Self { Self { _meta: PhantomData, _id: PhantomData, @@ -601,9 +601,9 @@ impl Tc { // Safe: the TC block has been consumed. let mut tc = Self { _meta: PhantomData, - channel_0: unsafe { Channel::new::() }, - channel_1: unsafe { Channel::new::() }, - channel_2: unsafe { Channel::new::() }, + channel_0: unsafe { Channel::new() }, + channel_1: unsafe { Channel::new() }, + channel_2: unsafe { Channel::new() }, }; // Ensure channels are disabled. diff --git a/hal/src/usb.rs b/hal/src/usb.rs index 6f10296..e6471f3 100644 --- a/hal/src/usb.rs +++ b/hal/src/usb.rs @@ -16,7 +16,7 @@ extensively tested, and should be considered unstable at the moment. # use hal::efc::*; # use hal::usb::*; # use hal::fugit::RateExtU32; -# let pac = hal::pac::Peripherals::take().unwrap(); +# let pac = unsafe{hal::pac::Peripherals::steal()}; # let clocks = Tokens::new((pac.PMC, pac.SUPC, pac.UTMI), &pac.WDT.into()); # let slck = clocks.slck.configure_external_normal(); # let mainck = clocks @@ -108,7 +108,7 @@ impl Endpoints { fn find_free_endpoint(&self) -> UsbResult { // start with 1 because 0 is reserved for Control for idx in 1..NUM_ENDPOINTS { - if self.ep_config[idx] == None { + if self.ep_config[idx].is_none() { return Ok(idx); } } @@ -124,7 +124,7 @@ impl Endpoints { max_packet_size: u16, _interval: u8, ) -> UsbResult { - if idx != 0 && self.ep_config[idx] != None { + if idx != 0 && self.ep_config[idx].is_some() { return Err(UsbError::EndpointOverflow); } @@ -222,7 +222,7 @@ impl Inner { fn write_fifo(&self, ep: usize, buf: &[u8]) { unsafe { core::ptr::copy_nonoverlapping( - buf.as_ptr() as *const u8, + buf.as_ptr(), self.fifo_addr(ep) as *mut u8, buf.len(), ); @@ -235,7 +235,7 @@ impl Inner { unsafe { core::ptr::copy_nonoverlapping( self.fifo_addr(ep) as *const u8, - buf.as_mut_ptr() as *mut u8, + buf.as_mut_ptr(), buf.len(), ); } @@ -431,7 +431,7 @@ impl Inner { const DEVISR_PEPS_MASK: u32 = 0x3ff000; const DEVISR_PEPS_OFFSET: u8 = 12; for ep in BitIter::from((dev_isr.bits() & DEVISR_PEPS_MASK) >> DEVISR_PEPS_OFFSET) { - let sr = self.reg().deveptisr_ctrl_mode()[ep as usize].read(); + let sr = self.reg().deveptisr_ctrl_mode()[ep].read(); // SETUP packet? if sr.rxstpi().bit_is_set() { From 58e2e44d0d05a30041f4402f5e52eba806d8844f Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20M=C3=B6rtsell?= Date: Mon, 18 Dec 2023 16:08:28 +0100 Subject: [PATCH 3/4] Run Rustfmt --- hal/src/serial/spi.rs | 8 ++------ hal/src/serial/usart/spi.rs | 5 +---- hal/src/usb.rs | 6 +----- 3 files changed, 4 insertions(+), 15 deletions(-) diff --git a/hal/src/serial/spi.rs b/hal/src/serial/spi.rs index 5a02804..5ffcb78 100644 --- a/hal/src/serial/spi.rs +++ b/hal/src/serial/spi.rs @@ -211,13 +211,12 @@ impl SpiConfiguration { } /// Generates a default [`Spi`] configuration: test mode inactive. -impl Default for SpiConfiguration{ +impl Default for SpiConfiguration { fn default() -> Self { SpiConfiguration { test_mode: false } } } - /// SPI peripheral abstraction. pub struct Spi { meta: PhantomData, @@ -642,10 +641,7 @@ impl<'spi, M: SpiMeta> blocking::spi::Transactional for Client<'spi, M> { /// Execute the provided transactions, deasserting the select line /// after the last transmitted word. - fn exec( - &mut self, - operations: &mut [blocking::spi::Operation], - ) -> Result<(), Self::Error> { + fn exec(&mut self, operations: &mut [blocking::spi::Operation]) -> Result<(), Self::Error> { use blocking::spi::Operation; let len = operations.len(); diff --git a/hal/src/serial/usart/spi.rs b/hal/src/serial/usart/spi.rs index 2896744..6fd2ded 100644 --- a/hal/src/serial/usart/spi.rs +++ b/hal/src/serial/usart/spi.rs @@ -227,10 +227,7 @@ impl ehal::spi::FullDuplex for Spi { impl blocking::spi::Transactional for Spi { type Error = SpiError; - fn exec( - &mut self, - operations: &mut [blocking::spi::Operation], - ) -> Result<(), Self::Error> { + fn exec(&mut self, operations: &mut [blocking::spi::Operation]) -> Result<(), Self::Error> { use blocking::spi::Operation; for o in operations.iter_mut() { diff --git a/hal/src/usb.rs b/hal/src/usb.rs index e6471f3..da549ee 100644 --- a/hal/src/usb.rs +++ b/hal/src/usb.rs @@ -221,11 +221,7 @@ impl Inner { #[inline(always)] fn write_fifo(&self, ep: usize, buf: &[u8]) { unsafe { - core::ptr::copy_nonoverlapping( - buf.as_ptr(), - self.fifo_addr(ep) as *mut u8, - buf.len(), - ); + core::ptr::copy_nonoverlapping(buf.as_ptr(), self.fifo_addr(ep) as *mut u8, buf.len()); } } From dc767a8e9f7f64fd6a45d5f101ec01f329bf2683 Mon Sep 17 00:00:00 2001 From: martinmortsell <102284554+martinmortsell@users.noreply.github.com> Date: Tue, 19 Dec 2023 09:03:09 +0100 Subject: [PATCH 4/4] Clarify Changelog MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Co-authored-by: Michał Fita <4925040+michalfita@users.noreply.github.com> --- CHANGELOG.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index b5d6fd4..bbc9ef7 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -19,7 +19,7 @@ - Examples now build and link again - [#62] Remove ambiguous reexports from `src/serial/mod.rs`. - TWIHS: Fix issue with clock frequency calculation. -- Fix CI +- Fix CI: source of PACs matrix + clippy satisfaction ## [v0.4.2] 2022-11-06