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SpecEmu.pas
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SpecEmu.pas
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unit SpecEmu;
interface
uses MMSystem, STSong, STPatterns, Classes;
type
TNewPatternFunc = procedure() of object;
TPatternTickFunc = procedure() of object;
TEngine = (SFX, TMB, MSD, P1D, P1S, SVG, RMB, PLP, STK, ABOUT);
TSpecEmu = class(TObject)
private
//bLog: boolean;
//F: TextFile;
iPerfFreq: int64;
iSVGStartPos: integer;
FVolume: integer;
FNewPatternFunc: TNewPatternFunc;
FPatternTickFunc: TPatternTickFunc;
FEngine: TEngine;
FWavOutFile: string;
bOutputWavFile: boolean;
FWav: TFileStream;
iWavDataLen: Cardinal;
iPatternTickAddr: array [0..2] of Word;
iNewPatternAddr: array [0..2] of Word;
// Main registers
regA, regF, regB, regC: Byte;
regHL, regDE: Word;
// Alternate registers
regAF_, regHL_, regDE_, regBC_: Word;
// Other registers
regPC, regSP: Word;
regIX, regIY, regID: Word;
regI, regR, regRtemp: Byte;
regIM: byte;
waveout: array [0..4410] of byte;
bInterruptsEnabled: boolean;
Parity: array[0..255] of Byte;
// Speccy hardware
Mem: array [0..65535] of Byte; // RAM
TStates: integer;
cBeeperVal: byte;
cWaveBuf: array [0..70000] of byte; // 69888 Ts per WaveOut
iWavePtr: integer;
iLastIntTime: cardinal;
iLast5IntTime: int64;
WavHdr: array [0..10] of TWaveHdr;
iBufNum: integer;
ghMem: array [0..10] of cardinal;
gpMem: array [0..10] of Pointer;
procedure SetBC(nn: Word);
function NextPCW: Word;
procedure exx;
procedure pushw(w: Word);
procedure pokeb(addr: Word; b: byte);
procedure pokew(addr, w: Word);
function execute_ed: Word;
function popw: Word;
procedure InitParityTable;
procedure or_a(b: byte);
function execute_cb: Word;
function srl(b: Byte): Byte;
procedure SetD(b: byte);
function inc8(b: byte): byte;
function dec8(b: byte): byte;
function outb(port: Word; b: Byte): Word;
procedure SetE(b: byte);
procedure and_a(b: byte);
procedure scf;
procedure add_a(b: byte);
function peekw(addr: Word): Word;
procedure bit(b, r: byte);
procedure cp_a(b: byte);
function add16(a, b: Word): Word;
procedure AddWaveOutBuffer(cBeeperVal: byte; iTS: integer);
procedure OutputWave;
procedure InitializeWaveOut;
procedure xor_a(b: byte);
procedure SetEngine(const Value: TEngine);
function LoadSFXPattern(Patt: STPatterns.TPattern): integer;
function LoadTMBPattern(Patt: STPatterns.TPattern): integer;
procedure SFXAddNoteData(var iMemPtr: integer; iNote, iNoteLen: integer);
function LoadSFXSong(Song: TSTSong; iStartPos: integer): integer;
function LoadTMBSong(Song: TSTSong; iStartPos: integer): integer;
function execute_id: Word;
function sra(b: Byte): Byte;
procedure TMBAddNoteData(var iMemPtr: integer; iCH1, iCH2: integer);
function LoadMSDPattern(Patt: STPatterns.TPattern): integer;
procedure MSDAddNoteData(var iMemPtr: integer; iCH1, iCH2: integer);
function rlc(b: byte): byte;
procedure MSDAddDrumData(var iMemPtr: integer; iCH1, iDrum: integer);
function LoadMSDSong(Song: TSTSong; iStartPos: integer): integer;
procedure SetWavOutFile(const Value: string);
procedure OutputWaveFile;
function LoadP1DPattern(Patt: STPatterns.TPattern; Song: TSTSong): integer;
function LoadP1DSong(Song: TSTSong; iStartPos: integer): integer;
procedure AddIdleTime(var iPtr: integer; iIdleTime: integer);
function bitRes(b, val: byte): byte;
procedure sub_a(b: byte);
procedure rl_a;
procedure P1DAddPatternData(Patt: STPatterns.TPattern;
var iMemPtr: integer);
function LoadP1SPattern(Patt: STPatterns.TPattern; Song: TSTSong): integer;
function LoadP1SSong(Song: TSTSong; iStartPos: integer): integer;
procedure SetVolume(const Value: integer);
procedure execute_id_cb(op: byte; adr: Word);
function SvgAddPatternData(Patt: STPatterns.TPattern;
SvgPatt: STPatterns.TPatternSvg; iChan, iMemPtr: integer): integer;
procedure SvgAddNoteData(iNote, iNoteLen: integer;
var iLastNoteLen: integer; var iMemPtr: integer);
procedure SVG_AddDrumPatternData(Patt: STPatterns.TPattern;
var iMemPtr: integer);
procedure DisplayEmuError(sErr: string; iIntr: byte; regPC: word);
function LoadSVGSong(Song: TSTSong; iStartPos: integer): integer;
function LoadRMBPattern(Patt: STPatterns.TPattern; Song: TSTSong): integer;
function LoadRMBSong(Song: TSTSong; iStartPos: integer): integer;
procedure RMBAddNoteData(var iMemPtr: integer; iCH1, iCH2: integer);
function in_bc: Word;
function sbc16(a, b: Word): Word;
procedure adc_a(b: byte);
procedure sbc_a(b: byte);
procedure rr_a;
function rrc(b: byte): byte;
function bitSet(b, val: byte): byte;
function rr(ans: byte): byte;
function adc16(a, b: Word): Word;
function rl(ans: byte): byte;
procedure neg_a;
function sla(b: Byte): Byte;
procedure rrc_a;
const
Ts_PER_INTERRUPT = 69888;
FLAG_S = $80;
FLAG_Z = $40;
FLAG_5 = $20;
FLAG_H = $10;
FLAG_3 = $08;
FLAG_PV = $04;
FLAG_N = $02;
FLAG_C = $01;
FLAG_NOT_PV = $251;
public
hWaveOut: System.Cardinal;
iIntCycle: integer;
constructor Create(hWaveOutIn: System.Cardinal);
destructor Destroy(); override;
procedure Exec(bUntilInterrupt: boolean = true);
function Interrupt(): Word;
function LoadImage(sResName: string): integer;
function LoadPlayerNote(iCh1, iCh2, iSus1, iSus2, iDrum: byte; iTempo: integer; Song: TSTSong = nil): integer;
function LoadPlayerPattern(Patt: STPatterns.TPattern; SvgPatt: STPatterns.TPatternSVG; Song: TSTSong = nil): integer;
function LoadPlayerSong(Song: TSTSong; iStartPos: integer = 0): integer;
function GetPhaser1Drum(iIndex: integer; var A: array of byte): boolean;
procedure ResetWaveBuffers();
procedure SaveTop32K(sFileName: string);
procedure CloseWaveFile;
property Register_PC: Word read regPC write regPC;
property Register_SP: Word read regSP write regSP;
property OnNewPattern: TNewPatternFunc read FNewPatternFunc write FNewPatternFunc;
property OnPatternTick: TPatternTickFunc read FPatternTickFunc write FPatternTickFunc;
property Engine: TEngine read FEngine write SetEngine;
property WavOutputFile: string read FWavOutFile write SetWavOutFile;
property WavDataLength: Cardinal read iWavDataLen;
property Volume: Integer read FVolume write SetVolume;
procedure SetDrum(iIndex: byte; iOffset: integer; bVal: boolean);
function SavageLoadPlayerNote(iCh1,iCh2: byte; iGlis1,iGlis2: integer;
iSkew1,iSkew2: integer;
iXor1,iXor2: integer;
iArp1,iArp2: integer;
iPhase1,iPhase2: integer;
iDrum: byte; iTempo: integer; Song: TSTSong = nil): integer;
function LoadSVGPattern(Patt: STPatterns.TPattern; SvgPatt: STPatterns.TPatternSvg; Song: TSTSong): integer;
end;
implementation
{ TSpecEmu }
uses Math, SysUtils, Dialogs, Windows, GrokUtils, Forms;
procedure TSpecEmu.InitParityTable();
var
i: integer;
p: boolean;
j: Byte;
begin
for i := 0 to 255 do
begin
p := true;
for j := 0 To 7 do
if ((i and Trunc(IntPower(2,j))) <> 0) then p := not p;
if p then Parity[i] := FLAG_PV else Parity[i] := 0;
end;
end;
constructor TSpecEmu.Create(hWaveOutIn: System.Cardinal);
begin
if not QueryPerformanceFrequency(iPerfFreq) then
begin
iPerfFreq := 1000;
ShowMessage('No high res timer available on this PC');
end;
// Initialize Spectrum
regA := 0; regF := 0; regHL := 0; regPC := 0; regSP := 0;
regI := 0; regR := 0; regIM := 0; regRtemp := 0;
TStates := Ts_PER_INTERRUPT;
InitParityTable();
bOutputWavFile := false;
FWavOutFile := '';
iWavDataLen := 0;
FWav := nil;
FVolume := 100;
hWaveOut := hWaveOutIn;
InitializeWaveOut();
FEngine := SFX;
end;
destructor TSpecEmu.Destroy;
var
i: Integer;
begin
for i := 0 to 10 do
begin
waveOutUnprepareHeader(hWaveOut,@WavHdr[i],SizeOf(WavHdr[i]));
GlobalUnlock(ghMem[i]);
GlobalFree(ghMem[i]);
end;
//waveOutClose(hWaveOut);
CloseWaveFile(); // Close the Wav output file if one exists
inherited;
end;
procedure TSpecEmu.Exec(bUntilInterrupt: boolean = true);
var
pcb: Byte;
wTemp: Word;
d: Shortint; // (Signed byte for relative jumps)
TStart: integer;
begin
repeat
if TStates <= 0 then
begin
TStates := TStates + Ts_PER_INTERRUPT - Interrupt();
break;
end;
inc(regRtemp);
// Call NewPatternFunc if we hit a new pattern...
if (Assigned(FNewPatternFunc)) then
begin
if (regPC = iNewPatternAddr[0]) or (regPC = iNewPatternAddr[1]) or
(regPC = iNewPatternAddr[2]) then
FNewPatternFunc();
end;
// Call PatternTickFunc one starting a new pattern row
if (Assigned(FPatternTickFunc)) then
begin
if (regPC = iPatternTickAddr[0]) or (regPC = iPatternTickAddr[1]) or
(regPC = iPatternTickAddr[2]) then
FPatternTickFunc();
end;
if (FEngine = SVG) then
begin
if ((regPC = 33345) and (regIX = 32899)) and (Assigned(FNewPatternFunc)) then
FNewPatternFunc()
else if (iSVGStartPos > 0) and (regPC = 32880) then
begin
// Set CHAN_DATA
Mem[regIX] := Mem[regDE - 1 + (iSVGStartPos * 2)];
Mem[regIX+1] := Mem[regDE + (iSVGStartPos * 2)];
// Set CHAN_CURPOS
mem[regIX+4] := iSVGStartPos * 2;
end;
end;
{
if regPC = $806c then
begin
bLog := not bLog;
if bLog then
begin
AssignFile(F,'c:\dev\grok\specem\tzx\SPTRACK-TMB-806C.txt');
Rewrite(F);
end
else
CloseFile(F);
end;
if bLog then
WriteLn(F,Format('%.4x',[regPC]));
ShowMessage('PC: ' + Format('%.4x',[regPC]) + ' SP: ' + Format('%.4x',[regSP]) + #13#10 +
'AF: ' + Format('%.2x%.2x',[regA,regF]) + ' AF'':' + Format('%.4x',[regAF_]) + #13#10 +
'BC: ' + Format('%.2x%.2x',[regB,regC]) + ' BC'':' + Format('%.4x',[regBC_]) + #13#10 +
'DE: ' + Format('%.4x',[regDE]) + ' DE'':' + Format('%.4x',[regDE_]) + #13#10 +
'HL: ' + Format('%.4x',[regHL]) + ' HL'':' + Format('%.4x',[regHL_]) + #13#10 +
'IX: ' + Format('%.4x',[regIX]) + ' IY:' + Format('%.4x',[regIY]) + #13#10 +
'IR: ' + Format('%.2x%.2x',[regI,regR]) + ' IM:' + Format('%.2x',[regIM]));
}
pcb := Mem[regPC];
inc(regPC);
TStart := TStates;
case pcb of
0: dec(TStates,4); // NOP
1: begin // LD BC,nn
SetBC(NextPCW());
dec(TStates,10);
end;
2: begin // LD (BC),A
Mem[(regB shl 8) or regC] := regA;
dec(TStates,7);
end;
3: begin // INC BC
setBC(((regB shl 8) or regC) + 1);
dec(TStates,6);
end;
4: begin // INC B
regB := inc8(regB);
dec(TStates,4);
end;
5: begin // DEC B
regB := dec8(regB);
dec(TStates,4);
end;
6: begin // LD B,n
regB := Mem[regPC];
inc(regPC);
dec(TStates,7);
end;
7: begin // RLCA
regF := (regF and FLAG_S) or
(regF and FLAG_Z) or
(regF and FLAG_PV);
if (regA and $80) <> 0 then
regF := regF or FLAG_C;
regA := ((regA * 2) or (regF and FLAG_C));
regF := regF or
(regA and FLAG_3) or
(regA and FLAG_5);
// H and N are reset
dec(TStates,4);
end;
8: begin // EX AF,AF'
wTemp := ((regA * 256) or regF);
regA := regAF_ shr 8;
regF := regAF_ and $FF;
regAF_ := wTemp;
dec(TStates,4)
end;
9: begin // ADD HL,BC
regHL := add16(regHL, (regB shl 8) or regC);
dec(TStates,11);
end;
10: begin // LD A,(BC)
regA := Mem[(regB shl 8) Or regC];
dec(TStates,7);
end;
11: begin // DEC BC
wTemp := ((regB shl 8) or regC);
dec(wTemp);
regB := (wTemp and $FF00) shr 8;
regC := (wTemp and $FF);
dec(TStates,6)
end;
12: begin // INC C
regC := inc8(regC);
dec(TStates,4);
end;
13: begin // DEC C
regC := dec8(regC);
dec(TStates,4);
end;
14: begin // LD C,n
regC := Mem[regPC];
inc(regPC);
dec(TStates,7);
end;
15: begin // RRC A
rrc_a();
dec(TStates,4)
end;
16: begin // DJNZ dis
dec(regB);
if (regB <> 0) then
begin
d := Mem[regPC];
inc(regPC);
regPC := (regPC + d);
dec(TStates,13)
end
else begin
inc(regPC);
dec(TStates,8)
end;
end;
17: begin // LD DE,nn
regDE := NextPCW();
dec(TStates,10);
end;
18: begin // LD (DE),A
pokeb(regDE, regA);
dec(TStates,7);
end;
19: begin // INC DE
inc(regDE);
dec(TStates,6)
end;
20: begin // INC D
setD( inc8((regDE shr 8)));
dec(TStates,4)
end;
21: begin // DEC D
setD( dec8((regDE shr 8)));
dec(TStates,4)
end;
22: begin // LD D,n
setD(Mem[regPC]);
inc(regPC);
dec(TStates,7);
end;
23: begin // RLA
rl_a();
dec(TStates,4);
end;
24: begin // JR dis
d := Mem[regPC];
inc(regPC);
regPC := (regPC + d);
dec(TStates,12);
end;
25: begin // ADD HL,DE
regHL := add16(regHL, regDE);
dec(TStates,11);
end;
26: begin // LD A,(DE)
regA := Mem[regDE];
dec(TStates,7)
end;
27: begin // DEC DE
dec(regDE);
dec(TStates,6)
end;
28: begin // INC E
setE( inc8((regDE and $FF)));
dec(TStates,4);
end;
29: begin // DEC E
setE( dec8((regDE and $FF)));
dec(TStates,4);
end;
30: begin // LD E,n
setE(Mem[regPC]);
inc(regPC);
dec(TStates,7);
end;
31: begin // RRA
rr_a;
dec(TStates,4);
end;
32: begin // JR NZ,dis
if (regF and FLAG_Z) = 0 then
begin
d := Mem[regPC];
inc(regPC);
regPC := (regPC + d);
dec(TStates,12);
end
else
begin
inc(regPC);
dec(TStates,7);
end;
end;
33: begin // LD HL,nn
regHL := NextPCW();
dec(TStates,10);
end;
34: begin // LD (nn),HL
pokew(NextPCW(), regHL);
dec(TStates,16);
end;
35: begin // INC HL
inc(regHL);
dec(TStates,6)
end;
37: begin // DEC H
regHL := (regHL and $FF) or (dec8(regHL shr 8) shl 8);
dec(TStates,4);
end;
38: begin // LD H,n
regHL := (Mem[regPC] * 256) or (regHL and $FF);
inc(regPC);
dec(TStates,7);
end;
40: begin // JR Z,dis
if (regF and FLAG_Z) <> 0 then
begin
d := Mem[regPC];
inc(regPC);
regPC := (regPC + d);
dec(TStates,12);
end
else begin
inc(regPC);
dec(TStates,7)
end;
end;
41: begin // ADD HL,HL
regHL := add16(regHL, regHL);
dec(TStates,11);
end;
42: begin // LD HL,(nn)
regHL := peekw(NextPCW());
dec(TStates,16);
end;
43: begin // DEC HL
dec(regHL);
dec(TStates,6);
end;
45: begin // DEC L
regHL := (regHL and $FF00) or dec8(regHL and $FF);
dec(TStates,4);
end;
46: begin // LD L,n
regHL := (regHL and $FF00) or Mem[regPC];
inc(regPC);
dec(TStates,7);
end;
47: begin // CPL
regA := (regA xor $FF);
regF := (regF and (FLAG_S or FLAG_Z or FLAG_C or FLAG_PV))or
(regA and FLAG_3) or
(regA and FLAG_5) or
FLAG_H or FLAG_N;
dec(TStates,4);
end;
48: begin // JR NC,dis
if (regF and FLAG_C) = 0 then
begin
d := Mem[regPC];
inc(regPC);
regPC := (regPC + d);
dec(TStates,12);
end
else
begin
inc(regPC);
dec(TStates,7);
end;
end;
49: begin // LD SP,nn
regSP := NextPCW();
dec(TStates,10);
end;
50: begin // LD (nn),A
pokeb(NextPCW(), regA);
dec(TStates,13);
end;
52: begin // INC (HL)
Mem[regHL] := inc8(Mem[regHL]);
dec(TStates,11)
end;
53: begin // DEC (HL)
Mem[regHL] := dec8(Mem[regHL]);
dec(TStates,11)
end;
54: begin // LD (HL),n
pokeb(regHL, Mem[regPC]);
inc(regPC);
dec(TStates,10)
end;
55: begin // SCF
scf();
dec(TStates,4);
end;
56: begin // JR C,dis
if (regF and FLAG_C) = FLAG_C then
begin
d := Mem[regPC];
inc(regPC);
regPC := (regPC + d);
dec(TStates,12)
end
else
begin
inc(regPC);
dec(TStates,7)
end;
end;
58: begin // LD A,(nn)
regA := Mem[NextPCW()];
dec(TStates,13)
end;
60: begin // INC A
regA := inc8(regA);
dec(TStates,4);
end;
61: begin // DEC A
regA := dec8(regA);
dec(TStates,4);
end;
62: begin // LD A,n
regA := Mem[regPC];
inc(regPC);
dec(TStates,7);
end;
63: begin // CCF
regF := (regF and (FLAG_S or FLAG_PV or FLAG_H)) or
(regA and FLAG_3) or
(regA and FLAG_5);
if (regF and FLAG_C) <> 0 then regF := regF or FLAG_H;
if (regF and FLAG_C) = 0 then regF := regF or FLAG_C;
dec(TStates,4);
end;
65: begin // LD B,C
regB := regC;
dec(TStates,4);
end;
66: begin // LD B,D
regB := (regDE shr 8);
dec(TStates,4);
end;
67: begin // LD B,E
regB := regDE and $FF;
dec(TStates,4);
end;
68: begin // LD B,H
regB := regHL shr 8;
dec(TStates,4);
end;
69: begin // LD B,L
regB := regHL and $FF;
dec(TStates,4);
end;
70: begin // LD B,(HL)
regB := Mem[regHL];
dec(TStates,7);
end;
71: begin // LD B,A
regB := regA;
dec(TStates,4);
end;
72: begin // LD C,B
regC := regB;
dec(TStates,4);
end;
73: begin // LD C,C
dec(TStates,4);
end;
74: begin // LD C,D
regC := (regDE shr 8);
dec(TStates,4);
end;
75: begin // LD C,E
regC := (regDE and $FF);
dec(TStates,4);
end;
76: begin // LD C,H
regC := (regHL shr 8);
dec(TStates,4);
end;
77: begin // LD C,L
regC := regHL and $FF;
dec(TStates,4);
end;
78: begin // LD C,(HL)
regC := Mem[regHL];
dec(TStates,7);
end;
79: begin // LD C,A
regC := regA;
dec(TStates,4);
end;
80: begin // LD D,B
setD(regB);
dec(TStates,4);
end;
81: begin // LD D,C
setD(regC);
dec(TStates,4);
end;
83: begin // LD D,E
setD(regDE and $FF);
dec(TStates,4);
end;
84: begin // LD D,H
setD(regHL shr 8);
dec(TStates,4);
end;
85: begin // LD D,L
setD(regHL and $FF);
dec(TStates,4);
end;
86: begin // LD D,(HL)
setD(Mem[regHL]);
dec(TStates,7)
end;
87: begin // LD D,A
setD(regA);
dec(TStates,4);
end;
88: begin // LD E,B
regDE := (regDE and $FF00) or (regB);
dec(TStates,4);
end;
89: begin // LD E,C
regDE := (regDE and $FF00) or (regC);
dec(TStates,4);
end;
90: begin // LD E,D
regDE := (regDE and $FF00) or (regDE shr 8);
dec(TStates,4);
end;
93: begin // LD E,L
regDE := (regDE and $FF00) or (regHL and $FF);
dec(TStates,4);
end;
94: begin // LD E,(HL)
setE(Mem[regHL]);
dec(TStates,7);
end;
95: begin // LD E,A
setE(regA);
dec(TStates,4)
end;
96: begin // LD H,B
regHL := (regHL or $FF) or (regB shl 8);
dec(TStates,4);
end;
97: begin // LD H,C
regHL := (regHL or $FF) or (regC shl 8);
dec(TStates,4);
end;
98: begin // LD H,D
regHL := (regDE and $FF00) or (regHL and $FF);
dec(TStates,4);
end;
100: begin // LD H,H
dec(TStates,4);
end;
101: begin // LD H,L
regHL := (regHL and $FF) or (regHL shl 8);
dec(TStates,4);
end;
102: begin // LD H,(HL)
regHL := (Mem[regHL] * 256) or (regHL and $FF);
dec(TStates,7);
end;
103: begin // LD H,A
regHL := (regA shl 8) or (regHL and $FF);
dec(TStates,4);
end;
104: begin // LD L,B
regHL := (regHL and $FF00) or regB;
dec(TStates,4);
end;
105: begin // LD L,C
regHL := (regHL and $FF00) or regC;
dec(TStates,4);
end;
106: begin // LD L,D
regHL := (regDE shr 8) or (regHL and $FF00);
dec(TStates,4);
end;
107: begin // LD L,E
regHL := (regDE and $FF) or (regHL and $FF00);
dec(TStates,4);
end;
108: begin // LD L,H
regHL := (regHL and $FF00) or (regHL shr 8);
dec(TStates,4);
end;
110: begin // LD L,(HL)
regHL := (regHL and $FF00) or (Mem[regHL]);
dec(TStates,7);
end;
111: begin // LD L,A
regHL := (regHL and $FF00) or regA;
dec(TStates,4);
end;
112: begin // LD (HL),B
pokeb(regHL, regB);
dec(TStates,7);
end;
113: begin // LD (HL),C
pokeb(regHL, regC);
dec(TStates,7);
end;
114: begin // LD (HL),D
Mem[regHL] := regDE shr 8;
dec(TStates,7);
end;
115: begin // LD (HL),E
Mem[regHL] := regDE and $FF;
dec(TStates,7);
end;
118: begin // HALT
dec(TStates,4);
if (TStates > 0) then dec(regPC); // Keep executing HALT until interrupt
end;
119: begin // LD (HL),A
mem[regHL] := regA;
dec(TStates,7);
end;
120: begin // LD A,B
regA := regB;
dec(TStates,4)
end;
121: begin // LD A,C
regA := regC;
dec(TStates,4);
end;
122: begin // LD A,D
regA := regDE shr 8;
dec(TStates,4);
end;
123: begin // LD A,E
regA := regDE and $FF;
dec(TStates,4)
end;
124: begin // LD A,H
regA := regHL shr 8;
dec(TStates,4);
end;
125: begin // LD A,L
regA := regHL and $FF;
dec(TStates,4);
end;
126: begin // LD A,(HL)
regA := Mem[regHL];
dec(TStates,7);
end;
127: begin // LD A,A
dec(TStates,4);
end;
128: begin // ADD A,B
add_a(regB);
dec(TStates,4)
end;
129: begin // ADD A,C
add_a(regC);
dec(TStates,4)
end;
130: begin // ADD A,D
add_a(regDE shr 8);
dec(TStates,4)
end;
131: begin // ADD A,E
add_a(regDE and $FF);
dec(TStates,4)
end;
132: begin // ADD A,H
add_a(regHL shr 8);
dec(TStates,4)
end;
133: begin // ADD A,L
add_a(regHL and $FF);
dec(TStates,4);
end;
134: begin // ADD A,(HL)
add_a(Mem[regHL]);
dec(TStates,7)
end;
135: begin // ADD A,A
add_a(regA);
dec(TStates,4)
end;
137: begin // ADC A,C
adc_a(regC);
dec(TStates,4);
end;
138: begin // ADC A,D
adc_a(regDE shr 8);
dec(TStates,4);
end;
139: begin // ADC A,E
adc_a(regDE and $FF);
dec(TStates,4);
end;
140: begin // ADC A,H
adc_a(regHL shr 8);
dec(TStates,4);
end;
141: begin // ADC A,L
adc_a(regHL and $FF);
dec(TStates,4);
end;
142: begin // ADC A,(HL)
adc_a(Mem[regHL]);
dec(TStates,7);
end;
144: begin // SUB B
sub_a(regB);
dec(TStates,4);
end;
145: begin // SUB C
sub_a(regC);
dec(TStates,4);
end;
149: begin // SUB L
sub_a(regHL and $FF);
dec(TStates,4);
end;
151: begin // SUB A
sub_a(regA);
dec(TStates,4);
end;
159: begin // SBC A,A
sbc_a(regA);
dec(TStates,4);
end;
161: begin // AND C
and_a(regC);
dec(TStates,4);
end;
162: begin // AND D
and_a(regDE shr 8);
dec(TStates,4);
end;
163: begin // AND E
and_a(regDE and $FF);
dec(TStates,4);
end;
164: begin // AND H
and_a(regHL shr 8);
dec(TStates,4);
end;
165: begin // AND L
and_a(regHL and $FF);
dec(TStates,4);
end;
166: begin // AND (HL)
and_a(Mem[regHL]);
dec(TStates,7);
end;
167: begin // AND A
and_a(regA);
dec(TStates,4)
end;
168: begin // XOR B
xor_a(regB);
dec(TStates,4)
end;
169: begin // XOR C
xor_a(regC);
dec(TStates,4)
end;
170: begin // XOR D
xor_a(regDE shr 8);
dec(TStates,4);
end;
171: begin // XOR E
xor_a(regDE and $FF);
dec(TStates,4);
end;
172: begin // XOR H
xor_a(regHL shr 8);
dec(TStates,4);
end;
173: begin // XOR L
xor_a(regHL And $FF);
dec(TStates,4);
end;
174: begin // XOR (HL)
xor_a(Mem[regHL]);
dec(TStates,7);
end;
175: begin // XOR A
regA := 0;
regF := FLAG_PV or FLAG_Z;
dec(TStates,4)
end;
177: begin // OR C
or_a(regC);
dec(TStates,4)
end;
178: begin // OR D