spike.md

riscv_hardware	cmake_plat	xcompiler_arg	platform	arch	virtualization	iommu	simulation_target	Status	Contrib	Maintained	redirect_from	SPDX-License-Identifier	SPDX-FileCopyrightText
true	spike	-DRISCV64=1	Spike	RV32GC, RV64IMAFDC	No	No	true	Unverified	Data61, [Hesham Almatary](https://github.com/heshamelmatary)	seL4 Foundation	/Hardware/RISCV	CC-BY-SA-4.0	2020 seL4 Project a Series of LF Projects, LLC.

Spike

Building the GCC toolchain

{% include risc-v.md %}

Getting the Simulator

You can use either RISC-V ISA Simulator or QEMU >= v4.2 shipped with your Linux distribution.

If you prefer to build qemu from source, make sure you have the correct target enabled.

git clone https://git.qemu.org/git/qemu.git
cd qemu
mkdir build
cd build
../configure --prefix=/opt/riscv --target-list=riscv64-softmmu,riscv32-softmmu
make

Building seL4test

{% include sel4test.md %}

You can also use run the tests on the 32-bit spike platform by replacing the -DRISCV64=TRUE option with -DRISCV32=TRUE.