From 3e2e14c6171349543d29e538d453dc054c40630a Mon Sep 17 00:00:00 2001 From: billow Date: Fri, 11 Oct 2024 17:44:36 +0800 Subject: [PATCH 1/4] xtensa: Fix Branch Target --- arch/Xtensa/XtensaDisassembler.c | 2 +- arch/Xtensa/XtensaMapping.c | 4 ++-- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/Xtensa/XtensaDisassembler.c b/arch/Xtensa/XtensaDisassembler.c index 8d465d3294..63a82371b6 100644 --- a/arch/Xtensa/XtensaDisassembler.c +++ b/arch/Xtensa/XtensaDisassembler.c @@ -90,7 +90,7 @@ static bool tryAddingSymbolicOperand(int64_t Value, bool isBranch, { // return Dis->tryAddingSymbolicOperand(MI, Value, Address, isBranch, // Offset, /*OpSize=*/0, InstSize); - return true; + return false; } static DecodeStatus decodeCallOperand(MCInst *Inst, uint64_t Imm, diff --git a/arch/Xtensa/XtensaMapping.c b/arch/Xtensa/XtensaMapping.c index 81fb339851..d45f88ea0b 100644 --- a/arch/Xtensa/XtensaMapping.c +++ b/arch/Xtensa/XtensaMapping.c @@ -195,8 +195,8 @@ void Xtensa_add_cs_detail(MCInst *MI, xtensa_op_group op_group, va_list args) case XTENSA_OP_GROUP_CALLOPERAND: { int64_t val = MCOperand_getImm(MCInst_getOperand(MI, op_num)) + 4; - xop->type = XTENSA_OP_MEM_IMM; - xop->mem.base = (int32_t)val; + xop->type = XTENSA_OP_IMM; + xop->imm = (int32_t)val; } break; case XTENSA_OP_GROUP_L32RTARGET: { int64_t Value = From 67b2999da00d758ca1f8782e92a0d327a69e171f Mon Sep 17 00:00:00 2001 From: billow Date: Tue, 15 Oct 2024 15:28:32 +0800 Subject: [PATCH 2/4] auto-sync: fix byte pattern --- suite/auto-sync/src/autosync/MCUpdater.py | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/suite/auto-sync/src/autosync/MCUpdater.py b/suite/auto-sync/src/autosync/MCUpdater.py index 770395912a..0b93062fda 100755 --- a/suite/auto-sync/src/autosync/MCUpdater.py +++ b/suite/auto-sync/src/autosync/MCUpdater.py @@ -146,7 +146,14 @@ def init_tests(self, unified_test_cases: bool): log.debug(f"llvm-mc result: {mc_output}") text_section = 0 # Counts the .text sections asm_pat = f"(?P.+)" - enc_pat = r"(\[?(?P(?P((0x[a-fA-F0-9]{1,2}[, ]{0,2}))+)[^, ]?)\]?)" + byte_pat = r"0[bx][a-fA-F0-9]+" + enc_pat = ( + r"(\[?(?P" + + "(?P" + + rf"({byte_pat}(,\s*))+({byte_pat}|A)" + + ")" + + ")\]?)" + ) dups = [] for line in mc_output.stdout.splitlines(): @@ -160,7 +167,7 @@ def init_tests(self, unified_test_cases: bool): if not match: continue full_enc_string = match.group("full_enc_string") - if not re.search(r"0x[a-fA-F0-9]{1,2}$", full_enc_string[:-1]): + if not re.search(rf"{byte_pat}$", full_enc_string[:-1]): log.debug(f"Ignore because symbol injection is needed: {line}") # The encoding string contains symbol information of the form: # [0xc0,0xe0,A,A,A... or similar. We ignore these for now. From 520f3571d939884bd1991da4ad23cb2bd19ebe08 Mon Sep 17 00:00:00 2001 From: billow Date: Tue, 15 Oct 2024 16:04:17 +0800 Subject: [PATCH 3/4] xtensa: add branch insn tests --- tests/MC/Xtensa/branch.s.yaml | 311 ++++++++++++++++++++++++++++++++++ 1 file changed, 311 insertions(+) create mode 100644 tests/MC/Xtensa/branch.s.yaml diff --git a/tests/MC/Xtensa/branch.s.yaml b/tests/MC/Xtensa/branch.s.yaml new file mode 100644 index 0000000000..ee9d2a343c --- /dev/null +++ b/tests/MC/Xtensa/branch.s.yaml @@ -0,0 +1,311 @@ +test_cases: + - + input: + bytes: [ 0x37, 0x41, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "ball a1, a3, . +4" + + - + input: + bytes: [ 0xd7, 0x88, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bany a8, a13, . +4" + + - + input: + bytes: [ 0x77, 0x58, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bbc a8, a7, . +4" + + - + input: + bytes: [ 0x7, 0x73, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bbci a3, 16, . +4" + + - + input: + bytes: [ 0x7, 0x73, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bbci a3, 16, . +4" + + - + input: + bytes: [ 0x57, 0xdc, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bbs a12, a5, . +4" + + - + input: + bytes: [ 0x7, 0xf3, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bbsi a3, 16, . +4" + + - + input: + bytes: [ 0x37, 0xc7, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bnall a7, a3, . +4" + + - + input: + bytes: [ 0x47, 0x2, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bnone a2, a4, . +4" + + - + input: + bytes: [ 0x27, 0x11, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "beq a1, a2, . +4" + + - + input: + bytes: [ 0x57, 0x1b, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "beq a11, a5, . +4" + + - + input: + bytes: [ 0x26, 0xf1, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "beqi a1, 256, . +4" + + - + input: + bytes: [ 0x26, 0xb, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "beqi a11, -1, . +4" + + - + input: + bytes: [ 0x16, 0x8, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "beqz a8, . +4" + + - + input: + bytes: [ 0x27, 0xae, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bge a14, a2, . +4" + + - + input: + bytes: [ 0xe6, 0xb, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgei a11, -1, . +4" + + - + input: + bytes: [ 0xe6, 0xeb, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgei a11, 128, . +4" + + - + input: + bytes: [ 0x27, 0xbe, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgeu a14, a2, . +4" + + - + input: + bytes: [ 0x17, 0xbd, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgeu a13, a1, . +4" + + - + input: + bytes: [ 0xf6, 0x9, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgeui a9, 32768, . +4" + + - + input: + bytes: [ 0xf6, 0x17, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgeui a7, 65536, . +4" + + - + input: + bytes: [ 0xf6, 0xd7, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgeui a7, 64, . +4" + + - + input: + bytes: [ 0xd6, 0x8, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bgez a8, . +4" + + - + input: + bytes: [ 0x27, 0x2e, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "blt a14, a2, . +4" + + - + input: + bytes: [ 0xa6, 0xc, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "blti a12, -1, . +4" + + - + input: + bytes: [ 0xa6, 0xc0, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "blti a0, 32, . +4" + + - + input: + bytes: [ 0xb6, 0xb7, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bltui a7, 16, . +4" + + - + input: + bytes: [ 0x96, 0x6, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bltz a6, . +4" + + - + input: + bytes: [ 0x47, 0x93, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bne a3, a4, . +4" + + - + input: + bytes: [ 0x66, 0xa5, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bnei a5, 12, . +4" + + - + input: + bytes: [ 0x56, 0x5, 0x0 ] + arch: "CS_ARCH_XTENSA" + options: [ "xtensa" ] + expected: + insns: + - + asm_text: "bnez a5, . +4" + From 923a35efe73f9ac1d2eff8e066fd35a3b4e3a7f3 Mon Sep 17 00:00:00 2001 From: billow Date: Thu, 17 Oct 2024 21:01:54 +0800 Subject: [PATCH 4/4] Revert "auto-sync: fix byte pattern" This reverts commit cf8e870f776889514b69a2f25a376f62ab2b291c. --- suite/auto-sync/src/autosync/MCUpdater.py | 11 ++--------- 1 file changed, 2 insertions(+), 9 deletions(-) diff --git a/suite/auto-sync/src/autosync/MCUpdater.py b/suite/auto-sync/src/autosync/MCUpdater.py index 0b93062fda..770395912a 100755 --- a/suite/auto-sync/src/autosync/MCUpdater.py +++ b/suite/auto-sync/src/autosync/MCUpdater.py @@ -146,14 +146,7 @@ def init_tests(self, unified_test_cases: bool): log.debug(f"llvm-mc result: {mc_output}") text_section = 0 # Counts the .text sections asm_pat = f"(?P.+)" - byte_pat = r"0[bx][a-fA-F0-9]+" - enc_pat = ( - r"(\[?(?P" - + "(?P" - + rf"({byte_pat}(,\s*))+({byte_pat}|A)" - + ")" - + ")\]?)" - ) + enc_pat = r"(\[?(?P(?P((0x[a-fA-F0-9]{1,2}[, ]{0,2}))+)[^, ]?)\]?)" dups = [] for line in mc_output.stdout.splitlines(): @@ -167,7 +160,7 @@ def init_tests(self, unified_test_cases: bool): if not match: continue full_enc_string = match.group("full_enc_string") - if not re.search(rf"{byte_pat}$", full_enc_string[:-1]): + if not re.search(r"0x[a-fA-F0-9]{1,2}$", full_enc_string[:-1]): log.debug(f"Ignore because symbol injection is needed: {line}") # The encoding string contains symbol information of the form: # [0xc0,0xe0,A,A,A... or similar. We ignore these for now.