diff --git a/src/datavault/rtl/dv_reg.sv b/src/datavault/rtl/dv_reg.sv index 80da84b80..25a53d3aa 100644 --- a/src/datavault/rtl/dv_reg.sv +++ b/src/datavault/rtl/dv_reg.sv @@ -481,6 +481,6 @@ module dv_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.hard_reset_b) endmodule \ No newline at end of file diff --git a/src/doe/rtl/doe_reg.sv b/src/doe/rtl/doe_reg.sv index 744cd6d25..2d8863604 100644 --- a/src/doe/rtl/doe_reg.sv +++ b/src/doe/rtl/doe_reg.sv @@ -1409,6 +1409,6 @@ module doe_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.reset_b) endmodule \ No newline at end of file diff --git a/src/ecc/rtl/ecc_reg.sv b/src/ecc/rtl/ecc_reg.sv index 2c7c89d24..dacdd19b0 100644 --- a/src/ecc/rtl/ecc_reg.sv +++ b/src/ecc/rtl/ecc_reg.sv @@ -1814,6 +1814,6 @@ module ecc_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.reset_b) endmodule \ No newline at end of file diff --git a/src/hmac/rtl/hmac_reg.sv b/src/hmac/rtl/hmac_reg.sv index 5a4fb362f..1f8227ab2 100644 --- a/src/hmac/rtl/hmac_reg.sv +++ b/src/hmac/rtl/hmac_reg.sv @@ -2054,6 +2054,6 @@ module hmac_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.reset_b) endmodule \ No newline at end of file diff --git a/src/keyvault/rtl/kv_reg.sv b/src/keyvault/rtl/kv_reg.sv index dd3a75296..500aef16a 100644 --- a/src/keyvault/rtl/kv_reg.sv +++ b/src/keyvault/rtl/kv_reg.sv @@ -443,6 +443,6 @@ module kv_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.reset_b) endmodule \ No newline at end of file diff --git a/src/pcrvault/rtl/pv_reg.sv b/src/pcrvault/rtl/pv_reg.sv index 83de58233..59e068405 100644 --- a/src/pcrvault/rtl/pv_reg.sv +++ b/src/pcrvault/rtl/pv_reg.sv @@ -294,6 +294,6 @@ module pv_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.hard_reset_b) endmodule \ No newline at end of file diff --git a/src/sha256/rtl/sha256_reg.sv b/src/sha256/rtl/sha256_reg.sv index 6d6b33496..f42a9f8ff 100644 --- a/src/sha256/rtl/sha256_reg.sv +++ b/src/sha256/rtl/sha256_reg.sv @@ -1426,6 +1426,6 @@ module sha256_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.reset_b) endmodule \ No newline at end of file diff --git a/src/sha512/rtl/sha512_reg.sv b/src/sha512/rtl/sha512_reg.sv index 3b6ae1873..32f21810c 100644 --- a/src/sha512/rtl/sha512_reg.sv +++ b/src/sha512/rtl/sha512_reg.sv @@ -2025,6 +2025,6 @@ module sha512_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.reset_b) endmodule \ No newline at end of file diff --git a/src/soc_ifc/rtl/mbox_csr.sv b/src/soc_ifc/rtl/mbox_csr.sv index dad17969f..309a48831 100644 --- a/src/soc_ifc/rtl/mbox_csr.sv +++ b/src/soc_ifc/rtl/mbox_csr.sv @@ -581,6 +581,6 @@ module mbox_csr ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.cptra_rst_b) endmodule \ No newline at end of file diff --git a/src/soc_ifc/rtl/sha512_acc_csr.sv b/src/soc_ifc/rtl/sha512_acc_csr.sv index edc1a59aa..8bed2ecd7 100644 --- a/src/soc_ifc/rtl/sha512_acc_csr.sv +++ b/src/soc_ifc/rtl/sha512_acc_csr.sv @@ -1616,6 +1616,6 @@ module sha512_acc_csr ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.cptra_rst_b) endmodule \ No newline at end of file diff --git a/src/soc_ifc/rtl/soc_ifc_reg.sv b/src/soc_ifc/rtl/soc_ifc_reg.sv index 52f0459b2..d0ba5245e 100644 --- a/src/soc_ifc/rtl/soc_ifc_reg.sv +++ b/src/soc_ifc/rtl/soc_ifc_reg.sv @@ -5684,6 +5684,6 @@ module soc_ifc_reg ( assign cpuif_rd_data = readback_data; assign cpuif_rd_err = readback_err; -`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1) +`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, hwif_in.cptra_rst_b) endmodule \ No newline at end of file diff --git a/tools/scripts/rdl_post_process.py b/tools/scripts/rdl_post_process.py index 2614021c8..aeb547283 100644 --- a/tools/scripts/rdl_post_process.py +++ b/tools/scripts/rdl_post_process.py @@ -36,6 +36,10 @@ def scrub_line_by_line(fname): has_unpacked = re.search(r'\[\d+\]', line) has_struct = re.search(r'\bstruct\b\s*(?:unpacked)?', line) is_endmodule = re.search(r'\bendmodule\b', line) + has_reset = re.search(r'\bnegedge.+\_b\b', line) + if (has_reset is not None): + substring = re.search(r"negedge (\w+.\w+)", line) + reset_name = substring.group(1) # Skip lines with logic assignments or references to signals; we # only want to scrub signal definitions for unpacked arrays if (has_assign is not None or has_reg_strb is not None): @@ -58,7 +62,7 @@ def scrub_line_by_line(fname): mod_cnt+=1 elif (is_endmodule is not None): mod_lines+="\n" - mod_lines+="`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, '1)\n" + mod_lines+="`CALIPTRA_ASSERT_KNOWN(ERR_HWIF_IN, hwif_in, clk, " + reset_name + ")\n" mod_lines+="\n" mod_lines+=line else: