Documentation on sw-controlled interface for flushing cache blocks

[OrkunAliOzkan]

Hi,

I have integrated the L2 cache into the rocketchip provided by chipsalliance, and I would like to run a cache flush, but I do not know how to invoke this, would anyone have any related .asm showing the command in use or reference to any docs?

Thanks :)

[rralf]

Yep, this is what I'd like to know as well. Were you able to find some documentation?

[jerryz123]

Unfortunately not, but the interface is not complex.Writing physical addresses into the flush64 memory-mapped register is all that is necessary.

[rralf]

Thanks a bunch Jerry. I just found the Control.scala that helped a lot. Just a question: Besides the flush64 command, is there a way to invalidate the cache? I need it for a benchmark.

[jerryz123]

No, unfortunately not.

[rralf]

Ah damn, I already assumed that. I'll try to implement it.