- Time: 11AM EDT
- Recording: youtube.chipsalliance.org
- Live minutes: https://docs.google.com/document/d/1Fl7IQ8CGon1-sdn3IHyXn9FoVb5SJ0Zs1RpK7cs2T5k/edit#
- Henry Cook
- Michael Gielda
- Rob Mains
- Brian Warner
Quorum: 2/3 TSC members present, quorum reached
Please add agenda items by opening a PR prior to the meeting.
- Welcome
- Review recent email votes
- Verible was added as a graduated project (2/2 votes). Henner Zeller is the 3rd TSC member
- Review applications for sandbox 2. Espresso: #38 1. Some questions over non-Apache licenses 2. Need to do some digging to understand the will of the original authors. 3. Sandbox stage is appropriate for projects which have expressed the will to join: 3. Gem5 (UM/UCD/gem5.org) - BSD 3-clause 4. sv-tests (Antmicro/Google) - ISC 5. MAGICAL (UTA) - BSD 3-clause 6. ALIGN (Intel) - BSD 3-clause
- Review applications for graduated 4. Surelog-UHDM: #38 7. Vote passed! (2/3 votes) 5. Applications we need to create: 8. OpenFASoC (UM) 1. over time, merge full FASOC 9. SWeRV (WDC) (1 or multiple projects?) 2. Michael to reach out to Srini @ WD 10. RISC-V DV (Google) 11. AiB (Intel) 12. OmniXtend (WDC) 13. Rocket Chip (SiFive/Berkeley) 14. Chisel (SiFive/Berkeley)
- Discussion of TSC repo structure
- Transferring projects to chips GitHub