In general, page validation should be performed by physical address,
which is required on certain platforms; platforms that require
validation by virtual address can create a temporary virtual mapping to
describe the physical page being validated.  However, in certain
contexts (like stage2), temporary mapping is not possible, and the pages
to be validate already have virtual mapping, so a mechanism to validate
by virtual address is retained solely for use in those limited cases
where a virtual mapping already exists in such a restricted context.

Signed-off-by: Jon Lange <[email protected]>

All processors that support virtualization also support NX.  Therefore,
there is no reason to detect NX via CPUID, and EFER.NXE can be enabled
very early in boot, unconditionally, for simplicity in managing page
tables.

Signed-off-by: Jon Lange <[email protected]>

It is possible to insert a reference to the current page table into the
page table itself, creating a recursive "self-map".  This permits access
to any PTE in the address space by taking advantage of the hierarchical
property of page tables, using the CPU's own page table walker to obtain
the PTE contents.  This change inserts a self-map entry into every page
table, and reimplements `virt_to_phys()` to use the self map so that it
is possible to translate any VA to a PA without requiring either the VA
or the PA to be within the bounds of any known address range.

Signed-off-by: Jon Lange <[email protected]>

Some platforms will require translation from virtual to physical address
in order to perform page validation by virtual address.  Therefore, on
other platforms, force a call to `virt_to_phys()` in debug builds to
increas the number of test environments that can detect possible
translation failures to add in debugging.

Signed-off-by: Jon Lange <[email protected]>