From 46355f2ab4e94059febeb9dff142c52166d6cffc Mon Sep 17 00:00:00 2001 From: Yu Ding Date: Fri, 6 Sep 2024 09:49:22 -0700 Subject: [PATCH] fix GPAW mask in the reset vector GPAW is the [0:6] bit of ESP. the current mask 0x2f does not extract the 5th bit. 0x3f is the correct bitmask. this should close issue #734 --- td-shim/ResetVector/Ia32/Flat32ToFlat64.asm | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/td-shim/ResetVector/Ia32/Flat32ToFlat64.asm b/td-shim/ResetVector/Ia32/Flat32ToFlat64.asm index 99d2b26d..2f19a444 100644 --- a/td-shim/ResetVector/Ia32/Flat32ToFlat64.asm +++ b/td-shim/ResetVector/Ia32/Flat32ToFlat64.asm @@ -22,7 +22,7 @@ Transition32FlatTo64Flat: ; LA57 and use 5-level paging ; mov ecx, esp - and ecx, 0x2f + and ecx, 0x3f cmp ecx, 52 jl .set_cr4 bts eax, 12