From 4ec0a2241e1c9420a065672a9b38aa4a21c0cf25 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Tue, 4 May 2021 09:26:43 -0400
Subject: [PATCH 01/13] * Enable interrupts, set up the mtvec, and print a
 simple  debug msg when a trap occurs so we know the mtval, mepc, and mcause.

---
 vcu118/boot.S |  3 ++-
 vcu118/init.c | 18 ++++++++++++++++++
 2 files changed, 20 insertions(+), 1 deletion(-)

diff --git a/vcu118/boot.S b/vcu118/boot.S
index d8fe6d1..c6b69c0 100644
--- a/vcu118/boot.S
+++ b/vcu118/boot.S
@@ -73,7 +73,8 @@
 /* Startup code */
 .globl boot
 boot:
-    li t6, 0x1800
+	// enable MSTATUS_PRV1 and MSTATUS_MIE
+    li t6, 0x1888
     csrw mstatus, t6
     j _mstart
 
diff --git a/vcu118/init.c b/vcu118/init.c
index a16f508..6a682fe 100644
--- a/vcu118/init.c
+++ b/vcu118/init.c
@@ -3,12 +3,30 @@
 
 extern int main(void);
 
+#define write_csr(reg, val) \
+  asm volatile ("csrw " #reg ", %0" :: "r"(val))
+
+#define read_csr(reg) ({ unsigned long __tmp;               \
+            asm volatile ("csrr %0, " #reg : "=r"(__tmp));  \
+            __tmp; })
+
+void bad_trap(){
+  unsigned long mepc, mtval, mcause;
+  asm volatile("csrr %0, mcause" : "=r"(mcause));
+  asm volatile("csrr %0, mtval" : "=r"(mtval));
+  asm volatile("csrr %0, mepc" : "=r"(mepc));
+  printf("\n FAILURE: \n mcause=0x%lx\n, mepc=0x%lx \n, mtval=0x%lx \n", mcause, mepc, mtval);
+}
+
 void _init(void)
 {
   int result;
 
   uart0_init();
 
+   // set up a bad trap handler
+  write_csr(mtvec, ((uintptr_t)&bad_trap));
+  
   // set up floating point computation
   uintptr_t misa, mstatus;
   asm volatile("csrr %0, misa" : "=r"(misa));

From e459d9a4a74189e270905fc4bdafc6512e2fa20f Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Wed, 16 Jun 2021 09:21:01 -0400
Subject: [PATCH 02/13] * Add support for UART2, which is the transport uart
 used by the AP * Added some macros to make the uart code less verbose.

---
 iveia/Makefile |   2 +
 iveia/bsp.h    |  18 ++++++--
 iveia/uart.c   | 119 +++++++++++++------------------------------------
 iveia/uart.h   |  51 +++++++++++++++++++++
 4 files changed, 100 insertions(+), 90 deletions(-)

diff --git a/iveia/Makefile b/iveia/Makefile
index 58863d1..1bb0159 100644
--- a/iveia/Makefile
+++ b/iveia/Makefile
@@ -8,6 +8,7 @@ RISCV_ARCH 			 ?= rv32ima
 RISCV_ABI        ?= ilp32
 CFLAGS += --target=riscv32-unknown-elf
 CFLAGS += -DCPU_CLOCK_HZ=50000000
+CFLAGS += -DRV32
 else
 RISCV_ARCH ?= rv64imafd
 RISCV_ABI ?= lp64d
@@ -15,6 +16,7 @@ RISCV_ABI ?= lp64d
 CFLAGS += --target=riscv64-unknown-elf
 CFLAGS += -mcmodel=medany
 CFLAGS += -DCPU_CLOCK_HZ=50000000
+CFLAGS += -DRV64
 endif
 
 CFLAGS += -O0 -g3 -Wall -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
diff --git a/iveia/bsp.h b/iveia/bsp.h
index 96b387a..64f51fe 100644
--- a/iveia/bsp.h
+++ b/iveia/bsp.h
@@ -1,6 +1,8 @@
 #ifndef RISCV_P2_BSP_H
 #define RISCV_P2_BSP_H
 
+#include "memory_map.h"
+
 #ifndef CPU_CLOCK_HZ
 #define CPU_CLOCK_HZ 50000000
 #endif
@@ -8,20 +10,30 @@
 /**
  * UART defines
  */
-#define XPAR_XUARTNS550_NUM_INSTANCES 2
+#define XPAR_XUARTNS550_NUM_INSTANCES 3
 #define XPAR_DEFAULT_BAUD_RATE 115200
 
 #define BSP_USE_UART0 1
 #define XPAR_UARTNS550_0_DEVICE_ID 0
 #define XPAR_UARTNS550_0_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_0_BASEADDR 0xA0000000ULL
+#define XPAR_UARTNS550_0_BASEADDR SOC_ADDR_UART0
+// #define XPAR_UARTNS550_0_BASEADDR 0xA0000000ULL
 #define XPAR_UARTNS550_0_CLOCK_HZ CPU_CLOCK_HZ
 
 // UART1 is in use by the PEX, so avoid re-initializing it on the AP
 #define BSP_USE_UART1 0
 #define XPAR_UARTNS550_1_DEVICE_ID 1
 #define XPAR_UARTNS550_1_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_1_BASEADDR (0xA0010000ULL)
+#define XPAR_UARTNS550_1_BASEADDR SOC_ADDR_UART1
+//#define XPAR_UARTNS550_1_BASEADDR (0xA0010000ULL)
 #define XPAR_UARTNS550_1_CLOCK_HZ CPU_CLOCK_HZ
 
+// UART2 is used by the AP as transport
+#define BSP_USE_UART2 1
+#define XPAR_UARTNS550_2_DEVICE_ID 2
+#define XPAR_UARTNS550_2_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
+#define XPAR_UARTNS550_2_BASEADDR SOC_ADDR_UART2
+// #define XPAR_UARTNS550_2_BASEADDR 0xA0020000ULL
+#define XPAR_UARTNS550_2_CLOCK_HZ CPU_CLOCK_HZ
+
 #endif /* RISCV_P2_BSP_H */
diff --git a/iveia/uart.c b/iveia/uart.c
index b91e565..b4edb6e 100644
--- a/iveia/uart.c
+++ b/iveia/uart.c
@@ -53,108 +53,48 @@ static XUartNs550 UartNs550_1;
 struct UartDriver Uart1;
 #endif
 
+#if BSP_USE_UART2
+static XUartNs550 UartNs550_2;
+struct UartDriver Uart2;
+#endif
+
 /*****************************************************************************/
 /* Peripheral specific definitions */
 #if BSP_USE_UART0
 /**
  * Initialize UART 0 peripheral
  */
-void uart0_init(void)
-{
-    uart_init(&Uart0, XPAR_UARTNS550_0_DEVICE_ID, 0);
-}
-
-/**
- * Return 1 if UART0 has at leas 1 byte in the RX FIFO
- */
-bool uart0_rxready(void)
-{
-    return uart_rxready(&Uart0);
-}
-
-/**
- * Receive a single byte. Polling mode, waits until finished
- */
-char uart0_rxchar(void)
-{
-    return (char)uart_rxchar(&Uart0);
-}
-
-/**
- * Transmit a buffer. Waits indefinitely for a UART TX mutex,
- * returns number of transferred bytes or -1 in case of an error.
- * Synchronous API.
- */
-int uart0_txbuffer(char *ptr, int len)
-{
-    return uart_txbuffer(&Uart0, (uint8_t *)ptr, len);
-}
-
-/**
- * Transmit a single byte. Polling mode, waits until finished
- */
-char uart0_txchar(char c)
-{
-    return (char)uart_txchar(&Uart0, (uint8_t)c);
-}
+UART_INIT(0)
+UART_RXREADY(0)
+UART_RXCHAR(0)
+UART_TXCHAR(0)
+UART_TXBUFFER(0)
+UART_RXBUFFER(0)
 
-int uart0_rxbuffer(char *ptr, int len)
-{
-    return uart_rxbuffer(&Uart0, (uint8_t *)ptr, len);
-}
 #endif /* BSP_USE_UART0 */
 
 #if BSP_USE_UART1
-/**
- * Initialize UART 1 peripheral
- */
-void uart1_init(void)
-{
-    uart_init(&Uart1, XPAR_UARTNS550_1_DEVICE_ID, 0);
-}
 
-/**
- * Return 1 if UART1 has at leas 1 byte in the RX FIFO
- */
-bool uart1_rxready(void)
-{
-    return uart_rxready(&Uart1);
-}
+UART_INIT(1)
+UART_RXREADY(1)
+UART_RXCHAR(1)
+UART_TXCHAR(1)
+UART_TXBUFFER(1)
+UART_RXBUFFER(1)
 
-/**
- * Receive a single byte.
- */
-char uart1_rxchar(void)
-{
-    return (char)uart_rxchar(&Uart1);
-}
+#endif /* BSP_USE_UART1 */
 
-/**
- * Transmit a buffer. Waits indefinitely for a UART TX mutex,
- * returns number of transferred bytes or -1 in case of an error.
- * Synchronous API.
- */
-int uart1_txbuffer(char *ptr, int len)
-{
-    return uart_txbuffer(&Uart1, (uint8_t *)ptr, len);
-}
+#if BSP_USE_UART2
 
-/**
- * Transmit a single byte.
- */
-char uart1_txchar(char c)
-{
-    return (char)uart_txchar(&Uart1, (uint8_t)c);
-}
+UART_INIT(2)
+UART_RXREADY(2)
+UART_RXCHAR(2)
+UART_TXCHAR(2)
+UART_TXBUFFER(2)
+UART_RXBUFFER(2)
+
+#endif /* BSP_USE_UART2 */
 
-/**
- * Transmit buffer.
- */
-int uart1_rxbuffer(char *ptr, int len)
-{
-    return uart_rxbuffer(&Uart1, (uint8_t *)ptr, len);
-}
-#endif /* BSP_USE_UART1 */
 
 /*****************************************************************************/
 /* Driver specific defintions */
@@ -180,6 +120,11 @@ static void uart_init(struct UartDriver *Uart, uint8_t device_id, uint8_t plic_s
     case 1:
         Uart->Device = UartNs550_1;
         break;
+#endif
+#if BSP_USE_UART2
+    case 2:
+        Uart->Device = UartNs550_2;
+        break;
 #endif
     default:
         // Trigger a fault: unsupported device ID
diff --git a/iveia/uart.h b/iveia/uart.h
index b1521d8..82e6934 100644
--- a/iveia/uart.h
+++ b/iveia/uart.h
@@ -4,6 +4,48 @@
 #include "bsp.h"
 #include <stdbool.h>
 
+/**
+ * Initialize UART peripheral
+ */
+#define UART_INIT(uart_number)	    \
+  void uart##uart_number##_init(void) \
+  { uart_init(&Uart ## uart_number, XPAR_UARTNS550_ ## uart_number ## _DEVICE_ID , 0); }
+
+/**
+ * Return 1 if UART has at leas 1 byte in the RX FIFO
+ */
+#define UART_RXREADY(uart_number) \
+  bool uart##uart_number##_rxready(void) \
+  {return uart_rxready(&Uart##uart_number);}
+
+/**
+ * Receive a single byte. Polling mode, waits until finished
+ */
+#define UART_RXCHAR(uart_number) \
+  char uart ## uart_number ## _rxchar(void) \
+  { return (char)uart_rxchar(&Uart##uart_number);}
+
+/**
+ * Transmit a single byte. Polling mode, waits until finished
+ */
+#define UART_TXCHAR(uart_number) \
+  char uart##uart_number##_txchar(char c) \
+  { return (char)uart_txchar(&Uart##uart_number, (uint8_t)c); }
+/**
+ * Transmit a buffer. Waits indefinitely for a UART TX mutex,
+ * returns number of transferred bytes or -1 in case of an error.
+ * Synchronous API.
+ */
+#define UART_TXBUFFER(uart_number) \
+  int uart##uart_number##_txbuffer(char *ptr, int len) \
+  { return uart_txbuffer(&Uart##uart_number, (uint8_t *)ptr, len); }
+
+
+#define UART_RXBUFFER(uart_number) \
+  int uart##uart_number##_rxbuffer(char *ptr, int len) \
+  { return uart_rxbuffer(&Uart##uart_number, (uint8_t *)ptr, len);}
+
+
 #if BSP_USE_UART0
 bool uart0_rxready(void);
 char uart0_rxchar(void);
@@ -22,4 +64,13 @@ int uart1_txbuffer(char *ptr, int len);
 void uart1_init(void);
 #endif
 
+#if BSP_USE_UART2
+bool uart2_rxready(void);
+char uart2_rxchar(void);
+char uart2_txchar(char c);
+int uart2_rxbuffer(char *ptr, int len);
+int uart2_txbuffer(char *ptr, int len);
+void uart2_init(void);
+#endif
+
 #endif

From 683c91df2d074cc6e9c9af3879d51e0c71aff52f Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Tue, 13 Jul 2021 17:49:08 -0400
Subject: [PATCH 03/13] * Added support for the transport UART.

---
 iveia/xilinx/uartns550/xuartns550_g.c | 8 +++++++-
 1 file changed, 7 insertions(+), 1 deletion(-)

diff --git a/iveia/xilinx/uartns550/xuartns550_g.c b/iveia/xilinx/uartns550/xuartns550_g.c
index 83a5943..8d4a633 100644
--- a/iveia/xilinx/uartns550/xuartns550_g.c
+++ b/iveia/xilinx/uartns550/xuartns550_g.c
@@ -83,6 +83,12 @@ XUartNs550_Config XUartNs550_ConfigTable[] =
 		XPAR_UARTNS550_1_BASEADDR,
 		XPAR_UARTNS550_1_CLOCK_HZ,
 		XPAR_UARTNS550_1_BAUD_RATE
-	}
+	},
+	{
+                XPAR_UARTNS550_2_DEVICE_ID,
+                XPAR_UARTNS550_2_BASEADDR,
+                XPAR_UARTNS550_2_CLOCK_HZ,
+                XPAR_UARTNS550_2_BAUD_RATE
+        }
 };
 /** @} */

From 217e4a2b6eabf70a1d28be2218f173b68154bf39 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Wed, 14 Jul 2021 14:29:49 -0400
Subject: [PATCH 04/13] * Split the makefile into two targets - one to make the
 original iveia lib and one to make only the uart lib (which we plan to reuse
 for pex as well)

---
 iveia/Makefile | 23 +++++++++++++++--------
 1 file changed, 15 insertions(+), 8 deletions(-)

diff --git a/iveia/Makefile b/iveia/Makefile
index 1bb0159..307def0 100644
--- a/iveia/Makefile
+++ b/iveia/Makefile
@@ -22,6 +22,7 @@ endif
 CFLAGS += -O0 -g3 -Wall -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
 
 LIB_TARGET = libiveia.a
+LIB_UART  = libuart-$(ARCH).a
 
 CFLAGS += -I$(ISP_PREFIX)/include \
           -I$(BASE_DIR) \
@@ -34,13 +35,11 @@ CFLAGS += -I$(ISP_PREFIX)/include \
 C_SRCS = init.c \
 				 uart.c \
 				 wrap/isatty.c \
-				 wrap/malloc.c \
 				 wrap/printf.c \
 				 wrap/puts.c \
 				 wrap/read.c \
 				 wrap/write.c \
-				 wrap/sbrk.c \
-			   xilinx/common/xbasic_types.c \
+			         xilinx/common/xbasic_types.c \
 				 xilinx/common/xil_io.c \
 				 xilinx/common/xil_assert.c \
 				 xilinx/uartns550/xuartns550.c \
@@ -53,13 +52,18 @@ C_SRCS = init.c \
 				 xilinx/uartns550/xuartns550_sinit.c \
 				 xilinx/uartns550/xuartns550_stats.c
 
+C_SRCS_SYS = wrap/malloc.c \
+			 wrap/sbrk.c
+
+
 ASM_SRCS = boot.S
 
-OBJS   = $(patsubst %.c,%.o,$(C_SRCS))
-OBJS   += $(patsubst %.S,%.o,$(ASM_SRCS))
+OBJS = $(patsubst %.c,%.o,$(C_SRCS))
+ASM_OBJS = $(patsubst %.S,%.o,$(ASM_SRCS))
+SYS_OBJS = $(patsubst %.c,%.o,$(C_SRCS_SYS))
 
 all: $(LIB_TARGET)
-.PHONY: all clean
+.PHONY: all clean $(LIB_UART)
 .PRECIOUS: $(BUILD_DIR)/ $(BUILD_DIR)%/
 .SECONDEXPANSION:
 
@@ -69,8 +73,11 @@ all: $(LIB_TARGET)
 %.o: %.S
 	$(CC) $(CFLAGS) -c $< -o $@
 
-$(LIB_TARGET): $(OBJS)
+$(LIB_TARGET): $(OBJS) $(ASM_OBJS) $(SYS_OBJS)
+	ar rcs $@ $(OBJS) $(ASM_OBJS) $(SYS_OBJS)
+
+$(LIB_UART): $(OBJS)
 	ar rcs $@ $(OBJS)
 
 clean:
-	rm -rf $(OBJS) $(LIB_TARGET)
+	rm -rf $(OBJS) $(ASM_OBJS) $(SYS_OBJS) $(LIB_TARGET)

From 1065ad7d947d04364f502f7398d0fa31e2820cea Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Wed, 14 Jul 2021 14:31:11 -0400
Subject: [PATCH 05/13] * Creates the iveia lib and two uart libs (for 32/64
 bits). The latter libs are to be shared with the PEX (e.g. only the 32 bit
 actaully).

---
 iveia/Makefile.isp | 13 +++++++++++++
 1 file changed, 13 insertions(+)
 create mode 100644 iveia/Makefile.isp

diff --git a/iveia/Makefile.isp b/iveia/Makefile.isp
new file mode 100644
index 0000000..fb062dd
--- /dev/null
+++ b/iveia/Makefile.isp
@@ -0,0 +1,13 @@
+LIBS := libiveia.a
+LIBS += libuart-rv32.a
+LIBS += libuart-rv64.a
+
+.PHONY: all
+
+all:
+	make clean && make all
+	ARCH=rv32 make -B libuart-rv32.a
+	ARCH=rv64 make -B libuart-rv64.a
+
+clean:
+	make clean && /bin/rm -f $(LIBS)

From a99399f2921595eee440d96c1c538a1cf620fc16 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Wed, 14 Jul 2021 14:32:55 -0400
Subject: [PATCH 06/13] * WIP --- * Use the new names for the UART peripherals
 according to the new json configuraiton. * Need to add the new name for the
 AP TRANSPORT UART - right now I have hardcoded its address

---
 iveia/bsp.h | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/iveia/bsp.h b/iveia/bsp.h
index 64f51fe..4e8df62 100644
--- a/iveia/bsp.h
+++ b/iveia/bsp.h
@@ -16,7 +16,7 @@
 #define BSP_USE_UART0 1
 #define XPAR_UARTNS550_0_DEVICE_ID 0
 #define XPAR_UARTNS550_0_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_0_BASEADDR SOC_ADDR_UART0
+#define XPAR_UARTNS550_0_BASEADDR AP_MMIO_UART_BEGIN
 // #define XPAR_UARTNS550_0_BASEADDR 0xA0000000ULL
 #define XPAR_UARTNS550_0_CLOCK_HZ CPU_CLOCK_HZ
 
@@ -24,7 +24,7 @@
 #define BSP_USE_UART1 0
 #define XPAR_UARTNS550_1_DEVICE_ID 1
 #define XPAR_UARTNS550_1_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_1_BASEADDR SOC_ADDR_UART1
+#define XPAR_UARTNS550_1_BASEADDR PEX_MMIO_UART_BEGIN
 //#define XPAR_UARTNS550_1_BASEADDR (0xA0010000ULL)
 #define XPAR_UARTNS550_1_CLOCK_HZ CPU_CLOCK_HZ
 
@@ -32,8 +32,8 @@
 #define BSP_USE_UART2 1
 #define XPAR_UARTNS550_2_DEVICE_ID 2
 #define XPAR_UARTNS550_2_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_2_BASEADDR SOC_ADDR_UART2
-// #define XPAR_UARTNS550_2_BASEADDR 0xA0020000ULL
+// #define XPAR_UARTNS550_2_BASEADDR SOC_ADDR_UART2
+#define XPAR_UARTNS550_2_BASEADDR 0xA0020000ULL
 #define XPAR_UARTNS550_2_CLOCK_HZ CPU_CLOCK_HZ
 
 #endif /* RISCV_P2_BSP_H */

From 2648397fdf72388c494e2d8d778512cb693179d6 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Wed, 14 Jul 2021 14:34:43 -0400
Subject: [PATCH 07/13] * Use uint8_t instead of char.

---
 iveia/uart.h | 40 ++++++++++++++++++++--------------------
 1 file changed, 20 insertions(+), 20 deletions(-)

diff --git a/iveia/uart.h b/iveia/uart.h
index 82e6934..2c1f395 100644
--- a/iveia/uart.h
+++ b/iveia/uart.h
@@ -22,54 +22,54 @@
  * Receive a single byte. Polling mode, waits until finished
  */
 #define UART_RXCHAR(uart_number) \
-  char uart ## uart_number ## _rxchar(void) \
-  { return (char)uart_rxchar(&Uart##uart_number);}
+  uint8_t uart ## uart_number ## _rxchar(void) \
+  { return uart_rxchar(&Uart##uart_number);}
 
 /**
  * Transmit a single byte. Polling mode, waits until finished
  */
 #define UART_TXCHAR(uart_number) \
-  char uart##uart_number##_txchar(char c) \
-  { return (char)uart_txchar(&Uart##uart_number, (uint8_t)c); }
+  uint8_t uart##uart_number##_txchar(uint8_t c) \
+  { return uart_txchar(&Uart##uart_number, c); }
 /**
  * Transmit a buffer. Waits indefinitely for a UART TX mutex,
  * returns number of transferred bytes or -1 in case of an error.
  * Synchronous API.
  */
 #define UART_TXBUFFER(uart_number) \
-  int uart##uart_number##_txbuffer(char *ptr, int len) \
-  { return uart_txbuffer(&Uart##uart_number, (uint8_t *)ptr, len); }
+  int uart##uart_number##_txbuffer(uint8_t *ptr, int len) \
+  { return uart_txbuffer(&Uart##uart_number, ptr, len); }
 
 
 #define UART_RXBUFFER(uart_number) \
-  int uart##uart_number##_rxbuffer(char *ptr, int len) \
-  { return uart_rxbuffer(&Uart##uart_number, (uint8_t *)ptr, len);}
+  int uart##uart_number##_rxbuffer(uint8_t *ptr, int len) \
+  { return uart_rxbuffer(&Uart##uart_number, ptr, len);}
 
 
 #if BSP_USE_UART0
 bool uart0_rxready(void);
-char uart0_rxchar(void);
-char uart0_txchar(char c);
-int uart0_rxbuffer(char *ptr, int len);
-int uart0_txbuffer(char *ptr, int len);
+uint8_t uart0_rxchar(void);
+uint8_t uart0_txchar(uint8_t c);
+int uart0_rxbuffer(uint8_t *ptr, int len);
+int uart0_txbuffer(uint8_t *ptr, int len);
 void uart0_init(void);
 #endif
 
 #if BSP_USE_UART1
 bool uart1_rxready(void);
-char uart1_rxchar(void);
-char uart1_txchar(char c);
-int uart1_rxbuffer(char *ptr, int len);
-int uart1_txbuffer(char *ptr, int len);
+uint8_t uart1_rxuint8_t(void);
+uint8_t uart1_txuint8_t(uint8_t c);
+int uart1_rxbuffer(uint8_t *ptr, int len);
+int uart1_txbuffer(uint8_t *ptr, int len);
 void uart1_init(void);
 #endif
 
 #if BSP_USE_UART2
 bool uart2_rxready(void);
-char uart2_rxchar(void);
-char uart2_txchar(char c);
-int uart2_rxbuffer(char *ptr, int len);
-int uart2_txbuffer(char *ptr, int len);
+uint8_t uart2_rxuint8_t(void);
+uint8_t uart2_txuint8_t(uint8_t c);
+int uart2_rxbuffer(uint8_t *ptr, int len);
+int uart2_txbuffer(uint8_t *ptr, int len);
 void uart2_init(void);
 #endif
 

From 5b68dee3187129fd2e999031705342532a4a31e3 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Wed, 14 Jul 2021 19:25:16 -0400
Subject: [PATCH 08/13] * Removed hard-coded address for the AP transport uart.

---
 iveia/bsp.h | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

diff --git a/iveia/bsp.h b/iveia/bsp.h
index 4e8df62..8adcdee 100644
--- a/iveia/bsp.h
+++ b/iveia/bsp.h
@@ -25,15 +25,15 @@
 #define XPAR_UARTNS550_1_DEVICE_ID 1
 #define XPAR_UARTNS550_1_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
 #define XPAR_UARTNS550_1_BASEADDR PEX_MMIO_UART_BEGIN
-//#define XPAR_UARTNS550_1_BASEADDR (0xA0010000ULL)
+//#define XPAR_UARTNS550_1_BASEADDR 0xA0010000ULL
 #define XPAR_UARTNS550_1_CLOCK_HZ CPU_CLOCK_HZ
 
 // UART2 is used by the AP as transport
 #define BSP_USE_UART2 1
 #define XPAR_UARTNS550_2_DEVICE_ID 2
 #define XPAR_UARTNS550_2_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-// #define XPAR_UARTNS550_2_BASEADDR SOC_ADDR_UART2
-#define XPAR_UARTNS550_2_BASEADDR 0xA0020000ULL
+#define XPAR_UARTNS550_2_BASEADDR AP_MMIO_UART_TRANSPORT_BEGIN
+// #define XPAR_UARTNS550_2_BASEADDR 0xA0020000ULL
 #define XPAR_UARTNS550_2_CLOCK_HZ CPU_CLOCK_HZ
 
 #endif /* RISCV_P2_BSP_H */

From be0fc986d58bd34ac2d5b3b9a08863175e941741 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Thu, 22 Jul 2021 11:54:41 -0400
Subject: [PATCH 09/13] * Updated the Makefiles to include the
 $ISP_PREFIX/soc_cfg (that's where the bsp.h lives).

---
 iveia/Makefile  | 2 +-
 vcu118/Makefile | 4 +++-
 2 files changed, 4 insertions(+), 2 deletions(-)

diff --git a/iveia/Makefile b/iveia/Makefile
index 307def0..b164520 100644
--- a/iveia/Makefile
+++ b/iveia/Makefile
@@ -24,7 +24,7 @@ CFLAGS += -O0 -g3 -Wall -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
 LIB_TARGET = libiveia.a
 LIB_UART  = libuart-$(ARCH).a
 
-CFLAGS += -I$(ISP_PREFIX)/include \
+CFLAGS += -I$(ISP_PREFIX)/include -I$(ISP_PREFIX)/soc_cfg \
           -I$(BASE_DIR) \
           -I$(BASE_DIR)/wrap \
           -I$(BASE_DIR)/xilinx/common \
diff --git a/vcu118/Makefile b/vcu118/Makefile
index 3184cfa..7a0a5f8 100644
--- a/vcu118/Makefile
+++ b/vcu118/Makefile
@@ -8,6 +8,7 @@ RISCV_ARCH 			 ?= rv32ima
 RISCV_ABI        ?= ilp32
 CFLAGS += --target=riscv32-unknown-elf
 CFLAGS += -DCPU_CLOCK_HZ=50000000
+CFLAGS += -DRV32
 else
 RISCV_ARCH ?= rv64imafd
 RISCV_ABI ?= lp64d
@@ -15,13 +16,14 @@ RISCV_ABI ?= lp64d
 CFLAGS += --target=riscv64-unknown-elf
 CFLAGS += -mcmodel=medany
 CFLAGS += -DCPU_CLOCK_HZ=100000000
+CFLAGS += -DRV64
 endif
 
 CFLAGS += -O0 -g3 -Wall -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
 
 LIB_TARGET = libvcu118.a
 
-CFLAGS += -I$(ISP_PREFIX)/include \
+CFLAGS += -I$(ISP_PREFIX)/include -I$(ISP_PREFIX)/soc_cfg \
           -I$(BASE_DIR) \
           -I$(BASE_DIR)/wrap \
           -I$(BASE_DIR)/xilinx/common \

From b58f70c1107d568e00b91f8a76b79da8edbcc195 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Fri, 23 Jul 2021 11:03:30 -0400
Subject: [PATCH 10/13] * Tweaked the error message to make it more descriptive

---
 iveia/init.c  |  2 +-
 vcu118/bsp.h  | 27 ---------------------------
 vcu118/init.c |  2 +-
 3 files changed, 2 insertions(+), 29 deletions(-)
 delete mode 100644 vcu118/bsp.h

diff --git a/iveia/init.c b/iveia/init.c
index 48047d3..176d8d4 100644
--- a/iveia/init.c
+++ b/iveia/init.c
@@ -15,7 +15,7 @@ void bad_trap(){
   asm volatile("csrr %0, mcause" : "=r"(mcause));
   asm volatile("csrr %0, mtval" : "=r"(mtval));
   asm volatile("csrr %0, mepc" : "=r"(mepc));
-  printf("\n FAILURE: \n mcause=0x%lx\n, mepc=0x%lx \n, mtval=0x%lx \n", mcause, mepc, mtval);
+  printf("\n BAD TRAP: \n mcause=0x%lx\n, mepc=0x%lx \n, mtval=0x%lx \n", mcause, mepc, mtval);
 }
 
 void _init(void)
diff --git a/vcu118/bsp.h b/vcu118/bsp.h
deleted file mode 100644
index b95f7a8..0000000
--- a/vcu118/bsp.h
+++ /dev/null
@@ -1,27 +0,0 @@
-#ifndef RISCV_P1_BSP_H
-#define RISCV_P1_BSP_H
-
-#ifndef CPU_CLOCK_HZ
-#define CPU_CLOCK_HZ 100000000
-#endif
-
-/**
- * UART defines
- */
-#define XPAR_XUARTNS550_NUM_INSTANCES 2
-#define XPAR_DEFAULT_BAUD_RATE 115200
-
-#define BSP_USE_UART0 1
-#define XPAR_UARTNS550_0_DEVICE_ID 0
-#define XPAR_UARTNS550_0_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_0_BASEADDR 0x62300000ULL
-#define XPAR_UARTNS550_0_CLOCK_HZ CPU_CLOCK_HZ
-
-// UART1 is in use by the PEX, so avoid re-initializing it on the AP
-#define BSP_USE_UART1 0
-#define XPAR_UARTNS550_1_DEVICE_ID 1
-#define XPAR_UARTNS550_1_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_1_BASEADDR (0x62340000ULL)
-#define XPAR_UARTNS550_1_CLOCK_HZ CPU_CLOCK_HZ
-
-#endif /* RISCV_P1_BSP_H */
diff --git a/vcu118/init.c b/vcu118/init.c
index 6a682fe..62b0402 100644
--- a/vcu118/init.c
+++ b/vcu118/init.c
@@ -15,7 +15,7 @@ void bad_trap(){
   asm volatile("csrr %0, mcause" : "=r"(mcause));
   asm volatile("csrr %0, mtval" : "=r"(mtval));
   asm volatile("csrr %0, mepc" : "=r"(mepc));
-  printf("\n FAILURE: \n mcause=0x%lx\n, mepc=0x%lx \n, mtval=0x%lx \n", mcause, mepc, mtval);
+  printf("\n BAD TRAP: \n mcause=0x%lx\n, mepc=0x%lx \n, mtval=0x%lx \n", mcause, mepc, mtval);
 }
 
 void _init(void)

From b9c84865f3b09dbd1ae64e47cf0cb062ac15a3ac Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Fri, 23 Jul 2021 12:02:05 -0400
Subject: [PATCH 11/13] * bsp.h is now generated and present in the
 $ISP_PREFIX/soc_cfg

---
 iveia/bsp.h | 39 ---------------------------------------
 1 file changed, 39 deletions(-)
 delete mode 100644 iveia/bsp.h

diff --git a/iveia/bsp.h b/iveia/bsp.h
deleted file mode 100644
index 8adcdee..0000000
--- a/iveia/bsp.h
+++ /dev/null
@@ -1,39 +0,0 @@
-#ifndef RISCV_P2_BSP_H
-#define RISCV_P2_BSP_H
-
-#include "memory_map.h"
-
-#ifndef CPU_CLOCK_HZ
-#define CPU_CLOCK_HZ 50000000
-#endif
-
-/**
- * UART defines
- */
-#define XPAR_XUARTNS550_NUM_INSTANCES 3
-#define XPAR_DEFAULT_BAUD_RATE 115200
-
-#define BSP_USE_UART0 1
-#define XPAR_UARTNS550_0_DEVICE_ID 0
-#define XPAR_UARTNS550_0_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_0_BASEADDR AP_MMIO_UART_BEGIN
-// #define XPAR_UARTNS550_0_BASEADDR 0xA0000000ULL
-#define XPAR_UARTNS550_0_CLOCK_HZ CPU_CLOCK_HZ
-
-// UART1 is in use by the PEX, so avoid re-initializing it on the AP
-#define BSP_USE_UART1 0
-#define XPAR_UARTNS550_1_DEVICE_ID 1
-#define XPAR_UARTNS550_1_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_1_BASEADDR PEX_MMIO_UART_BEGIN
-//#define XPAR_UARTNS550_1_BASEADDR 0xA0010000ULL
-#define XPAR_UARTNS550_1_CLOCK_HZ CPU_CLOCK_HZ
-
-// UART2 is used by the AP as transport
-#define BSP_USE_UART2 1
-#define XPAR_UARTNS550_2_DEVICE_ID 2
-#define XPAR_UARTNS550_2_BAUD_RATE XPAR_DEFAULT_BAUD_RATE
-#define XPAR_UARTNS550_2_BASEADDR AP_MMIO_UART_TRANSPORT_BEGIN
-// #define XPAR_UARTNS550_2_BASEADDR 0xA0020000ULL
-#define XPAR_UARTNS550_2_CLOCK_HZ CPU_CLOCK_HZ
-
-#endif /* RISCV_P2_BSP_H */

From cb584591e8a513aa82998022fda9b237a530ad81 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Tue, 7 Sep 2021 11:49:52 -0400
Subject: [PATCH 12/13] * bsp.h lives in a new directory

---
 iveia/Makefile | 5 ++++-
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/iveia/Makefile b/iveia/Makefile
index b164520..11e7cd5 100644
--- a/iveia/Makefile
+++ b/iveia/Makefile
@@ -3,6 +3,9 @@ BASE_DIR = $(abspath .)
 CFLAGS := -DALIGN_UART -DFPGA_GFE
 
 CC 							 := $(ISP_PREFIX)/bin/clang
+
+ARCH ?= rv64
+
 ifneq ($(ARCH), rv64)
 RISCV_ARCH 			 ?= rv32ima
 RISCV_ABI        ?= ilp32
@@ -24,7 +27,7 @@ CFLAGS += -O0 -g3 -Wall -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
 LIB_TARGET = libiveia.a
 LIB_UART  = libuart-$(ARCH).a
 
-CFLAGS += -I$(ISP_PREFIX)/include -I$(ISP_PREFIX)/soc_cfg \
+CFLAGS += -I$(ISP_PREFIX)/include -I$(ISP_PREFIX)/iveia_bsp \
           -I$(BASE_DIR) \
           -I$(BASE_DIR)/wrap \
           -I$(BASE_DIR)/xilinx/common \

From 05e3f9528055da95efa61e5c1266ed9b81e6aa64 Mon Sep 17 00:00:00 2001
From: Silviu Chiricescu <silviu@draper.com>
Date: Tue, 7 Sep 2021 11:51:58 -0400
Subject: [PATCH 13/13] * New locaiton for hte bsp header file

---
 vcu118/Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/vcu118/Makefile b/vcu118/Makefile
index 7a0a5f8..8146003 100644
--- a/vcu118/Makefile
+++ b/vcu118/Makefile
@@ -23,7 +23,7 @@ CFLAGS += -O0 -g3 -Wall -march=$(RISCV_ARCH) -mabi=$(RISCV_ABI)
 
 LIB_TARGET = libvcu118.a
 
-CFLAGS += -I$(ISP_PREFIX)/include -I$(ISP_PREFIX)/soc_cfg \
+CFLAGS += -I$(ISP_PREFIX)/include -I$(ISP_PREFIX)/vcu118_bsp \
           -I$(BASE_DIR) \
           -I$(BASE_DIR)/wrap \
           -I$(BASE_DIR)/xilinx/common \