Skip to content
New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

TODOs #4

Open
5 tasks
joamatab opened this issue Mar 11, 2023 · 4 comments
Open
5 tasks

TODOs #4

joamatab opened this issue Mar 11, 2023 · 4 comments

Comments

@joamatab
Copy link
Contributor

joamatab commented Mar 11, 2023

we have just released a fully open source PDK for Globalfoundries 180nm process technology.

The repositories are now available under https://github.com/google - see https://github.com/google?q=globalfoundries&type=all&language=&sort=

You might find the better KLayout support interesting;
KLayout DRC rules and a full DRC test suite -- https://github.com/google/globalfoundries-pdk-libs-gf180mcu_fd_pr/tree/main/rules/klayout/drc

KLayout Pymacros (Pcells) -- https://github.com/google/globalfoundries-pdk-libs-gf180mcu_fd_pr/tree/main/cells/klayout/pymacros

We have also started publishing a "naming guide" for our open source PDKs at https://bit.ly/open-source-pdks-naming

TODO:

  • remove lists (mutable from arguments) so that flake8 passes
  • add layer_stack, thickness and zmin for each LayerLevel
  • bring DRC and LVS, so that we can call it from python
  • demo python PySpice, Ngspice integration with python. Similar to https://app.siliwiz.com/
  • build schematic symbols

@mabrains
@atorkmabrains
@proppy
@SkandanC

@njcoburn
Copy link

Hey @joamatab @proppy,

I am trying to install this on my mac. I get the following error. Perhaps this is my own computer flaring up? The install worked on my linux cloudtop.

image

@joamatab
Copy link
Contributor Author

Which python are you using? That looks like python2

@atorkmabrains
Copy link
Contributor

@joamatab We need to discuss the changes you want. Let's plan on meeting to discuss that.

@njcoburn
Copy link

@joamatab @atorkmabrains I would be happy to join to give my thoughts. Adding multiple ports for the transistor components would be very useful for auto-routing. For example, source, gate, drain, & bulk ports for the nfets and pfets.

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
Development

No branches or pull requests

3 participants