From 3baec2389577e09706181da93bab24c9fca17a53 Mon Sep 17 00:00:00 2001 From: Ayush Ranjan Date: Fri, 20 Dec 2024 23:26:45 -0800 Subject: [PATCH] nvproxy: Clean up struct field tags. PiperOrigin-RevId: 708532738 --- pkg/abi/nvgpu/classes.go | 56 +- pkg/abi/nvgpu/ctrl.go | 32 +- pkg/abi/nvgpu/frontend.go | 202 +++--- pkg/abi/nvgpu/frontend_unsafe.go | 4 +- pkg/abi/nvgpu/nvgpu.go | 2 +- pkg/abi/nvgpu/uvm.go | 66 +- pkg/sentry/devices/nvproxy/frontend.go | 70 +- pkg/sentry/devices/nvproxy/frontend_unsafe.go | 22 +- pkg/sentry/devices/nvproxy/handlers.go | 12 +- pkg/sentry/devices/nvproxy/nvproxy_test.go | 18 +- pkg/sentry/devices/nvproxy/object.go | 8 +- pkg/sentry/devices/nvproxy/version.go | 677 +++++++++--------- tools/ioctl_sniffer/sniffer/sniffer.go | 2 +- 13 files changed, 567 insertions(+), 604 deletions(-) diff --git a/pkg/abi/nvgpu/classes.go b/pkg/abi/nvgpu/classes.go index fa6b4dcebf..422bced0ed 100644 --- a/pkg/abi/nvgpu/classes.go +++ b/pkg/abi/nvgpu/classes.go @@ -93,7 +93,7 @@ const ( // // +marshal type NV2081_ALLOC_PARAMETERS struct { - Reserved uint32 `nvproxy:"same"` + Reserved uint32 } // NV0005_ALLOC_PARAMETERS is the alloc params type for NV01_EVENT* classes @@ -101,7 +101,7 @@ type NV2081_ALLOC_PARAMETERS struct { // // +marshal type NV0005_ALLOC_PARAMETERS struct { - HParentClient Handle `nvproxy:"same"` + HParentClient Handle HSrcResource Handle HClass ClassID NotifyIndex uint32 @@ -118,7 +118,7 @@ const ( // // +marshal type NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS struct { - Offset uint64 `nvproxy:"same"` + Offset uint64 Limit uint64 HVASpace Handle Pad0 [4]byte @@ -129,7 +129,7 @@ type NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS struct { // // +marshal type NV0080_ALLOC_PARAMETERS struct { - DeviceID uint32 `nvproxy:"same"` + DeviceID uint32 HClientShare Handle HTargetClient Handle HTargetDevice Handle @@ -147,7 +147,7 @@ type NV0080_ALLOC_PARAMETERS struct { // // +marshal type NV2080_ALLOC_PARAMETERS struct { - SubDeviceID uint32 `nvproxy:"same"` + SubDeviceID uint32 } // NV_MEMORY_ALLOCATION_PARAMS is the alloc params type for various NV*_MEMORY* @@ -155,7 +155,7 @@ type NV2080_ALLOC_PARAMETERS struct { // // +marshal type NV_MEMORY_ALLOCATION_PARAMS struct { - Owner uint32 `nvproxy:"same"` + Owner uint32 Type uint32 Flags uint32 Width uint32 @@ -185,16 +185,16 @@ type NV_MEMORY_ALLOCATION_PARAMS struct { // // +marshal type NV_MEMORY_ALLOCATION_PARAMS_V545 struct { - NV_MEMORY_ALLOCATION_PARAMS `nvproxy:"NV_MEMORY_ALLOCATION_PARAMS"` - NumaNode int32 - _ uint32 + NV_MEMORY_ALLOCATION_PARAMS + NumaNode int32 + _ uint32 } // NV503B_BAR1_P2P_DMA_INFO from src/common/sdk/nvidia/inc/class/cl503b.h. // // +marshal type NV503B_BAR1_P2P_DMA_INFO struct { - DmaAddress uint64 `nvproxy:"same"` + DmaAddress uint64 DmaSize uint64 } @@ -203,7 +203,7 @@ type NV503B_BAR1_P2P_DMA_INFO struct { // // +marshal type NV503B_ALLOC_PARAMETERS struct { - HSubDevice Handle `nvproxy:"same"` + HSubDevice Handle HPeerSubDevice Handle SubDevicePeerIDMask uint32 PeerSubDevicePeerIDMask uint32 @@ -221,7 +221,7 @@ type NV503B_ALLOC_PARAMETERS struct { // // +marshal type NV503C_ALLOC_PARAMETERS struct { - Flags uint32 `nvproxy:"same"` + Flags uint32 } // NV83DE_ALLOC_PARAMETERS is the alloc params type for GT200_DEBUGGER, @@ -229,7 +229,7 @@ type NV503C_ALLOC_PARAMETERS struct { // // +marshal type NV83DE_ALLOC_PARAMETERS struct { - HDebuggerClient_Obsolete Handle `nvproxy:"same"` + HDebuggerClient_Obsolete Handle HAppClient Handle HClass3DObject Handle } @@ -239,7 +239,7 @@ type NV83DE_ALLOC_PARAMETERS struct { // // +marshal type NV_CTXSHARE_ALLOCATION_PARAMETERS struct { - HVASpace Handle `nvproxy:"same"` + HVASpace Handle Flags uint32 SubctxID uint32 } @@ -249,7 +249,7 @@ type NV_CTXSHARE_ALLOCATION_PARAMETERS struct { // // +marshal type NV_VASPACE_ALLOCATION_PARAMETERS struct { - Index uint32 `nvproxy:"same"` + Index uint32 Flags uint32 VASize uint64 VAStartInternal uint64 @@ -264,7 +264,7 @@ type NV_VASPACE_ALLOCATION_PARAMETERS struct { // // +marshal type NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS struct { - HObjectError Handle `nvproxy:"same"` + HObjectError Handle HObjectECCError Handle HVASpace Handle EngineType uint32 @@ -277,7 +277,7 @@ type NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS struct { // // +marshal type NV_MEMORY_DESC_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Size uint64 AddressSpace uint32 CacheAttrib uint32 @@ -289,7 +289,7 @@ type NV_MEMORY_DESC_PARAMS struct { // // +marshal type NV_CHANNEL_ALLOC_PARAMS struct { - HObjectError Handle `nvproxy:"same"` + HObjectError Handle HObjectBuffer Handle GPFIFOOffset uint64 GPFIFOEntries uint32 @@ -323,7 +323,7 @@ type NV_CHANNEL_ALLOC_PARAMS struct { // // +marshal type NVB0B5_ALLOCATION_PARAMETERS struct { - Version uint32 `nvproxy:"same"` + Version uint32 EngineType uint32 } @@ -332,7 +332,7 @@ type NVB0B5_ALLOCATION_PARAMETERS struct { // // +marshal type NV_GR_ALLOCATION_PARAMETERS struct { - Version uint32 `nvproxy:"same"` + Version uint32 Flags uint32 Size uint32 Caps uint32 @@ -343,7 +343,7 @@ type NV_GR_ALLOCATION_PARAMETERS struct { // // +marshal type NV_HOPPER_USERMODE_A_PARAMS struct { - Bar1Mapping uint8 `nvproxy:"same"` + Bar1Mapping uint8 Priv uint8 } @@ -352,7 +352,7 @@ type NV_HOPPER_USERMODE_A_PARAMS struct { // // +marshal type NV9072_ALLOCATION_PARAMETERS struct { - LogicalHeadID uint32 `nvproxy:"same"` + LogicalHeadID uint32 DisplayMask uint32 Caps uint32 } @@ -362,7 +362,7 @@ type NV9072_ALLOCATION_PARAMETERS struct { // // +marshal type NV00DE_ALLOC_PARAMETERS struct { - Reserved uint32 `nvproxy:"same"` + Reserved uint32 } // NV00DE_ALLOC_PARAMETERS_V545 is the updated version of @@ -370,7 +370,7 @@ type NV00DE_ALLOC_PARAMETERS struct { // // +marshal type NV00DE_ALLOC_PARAMETERS_V545 struct { - PolledDataMask uint64 `nvproxy:"NV00DE_ALLOC_PARAMETERS"` + PolledDataMask uint64 } // +marshal @@ -385,7 +385,7 @@ type nv00f8Map struct { // // +marshal type NV00F8_ALLOCATION_PARAMETERS struct { - Alignment uint64 `nvproxy:"same"` + Alignment uint64 AllocSize uint64 PageSize uint64 AllocFlags uint32 @@ -412,7 +412,7 @@ type NV_EXPORT_MEM_PACKET struct { // // +marshal type NV00FD_ALLOCATION_PARAMETERS struct { - Alignment uint64 `nvproxy:"same"` + Alignment uint64 AllocSize uint64 PageSize uint32 AllocFlags uint32 @@ -426,7 +426,7 @@ type NV00FD_ALLOCATION_PARAMETERS struct { // // +marshal type NV00FD_ALLOCATION_PARAMETERS_V545 struct { - ExpPacket NV_EXPORT_MEM_PACKET `nvproxy:"NV00FD_ALLOCATION_PARAMETERS"` + ExpPacket NV_EXPORT_MEM_PACKET Index uint16 _ [6]byte NV00FD_ALLOCATION_PARAMETERS @@ -437,5 +437,5 @@ type NV00FD_ALLOCATION_PARAMETERS_V545 struct { // // +marshal type NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS struct { - Handle Handle `nvproxy:"same"` + Handle Handle } diff --git a/pkg/abi/nvgpu/ctrl.go b/pkg/abi/nvgpu/ctrl.go index c6ddf3c4c4..18a9110f52 100644 --- a/pkg/abi/nvgpu/ctrl.go +++ b/pkg/abi/nvgpu/ctrl.go @@ -86,7 +86,7 @@ const ( // // +marshal type NV0000_CTRL_GPU_GET_ID_INFO_PARAMS struct { - GpuID uint32 `nvproxy:"same"` + GpuID uint32 GpuFlags uint32 DeviceInstance uint32 SubDeviceInstance uint32 @@ -120,7 +120,7 @@ const ( // // +marshal type NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS struct { - GpuIDs [NV0000_CTRL_SYSTEM_MAX_ATTACHED_GPUS]uint32 `nvproxy:"same"` + GpuIDs [NV0000_CTRL_SYSTEM_MAX_ATTACHED_GPUS]uint32 GpuCount uint32 P2PCaps uint32 P2POptimalReadCEs uint32 @@ -135,8 +135,8 @@ type NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS struct { // // +marshal type NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS_V550 struct { - NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS `nvproxy:"NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS"` - BusEgmPeerIDs P64 + NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS + BusEgmPeerIDs P64 } // From src/common/sdk/nvidia/inc/ctrl/ctrl0000/ctrl0000unix.h: @@ -149,7 +149,7 @@ const ( // +marshal type NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS struct { - FD int32 `nvproxy:"same"` + FD int32 DeviceInstance uint32 MaxObjects uint16 Metadata [NV0000_OS_UNIX_EXPORT_OBJECT_FD_BUFFER_SIZE]uint8 @@ -168,7 +168,7 @@ func (p *NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS) SetFrontendFD(fd int // +marshal type NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS_V545 struct { - FD int32 `nvproxy:"NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS"` + FD int32 DeviceInstance uint32 GpuInstanceID uint32 MaxObjects uint16 @@ -194,7 +194,7 @@ type NV0000_CTRL_OS_UNIX_EXPORT_OBJECT struct { // +marshal type NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS struct { - Object NV0000_CTRL_OS_UNIX_EXPORT_OBJECT `nvproxy:"same"` + Object NV0000_CTRL_OS_UNIX_EXPORT_OBJECT FD int32 Flags uint32 } @@ -211,7 +211,7 @@ func (p *NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS) SetFrontendFD(fd int32) // +marshal type NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS struct { - FD int32 `nvproxy:"same"` + FD int32 Object NV0000_CTRL_OS_UNIX_EXPORT_OBJECT } @@ -227,7 +227,7 @@ func (p *NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS) SetFrontendFD(fd int3 // +marshal type NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS struct { - SizeOfStrings uint32 `nvproxy:"same"` + SizeOfStrings uint32 Pad [4]byte PDriverVersionBuffer P64 PVersionBuffer P64 @@ -262,7 +262,7 @@ const ( // +marshal type NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS struct { - NumChannels uint32 `nvproxy:"same"` + NumChannels uint32 Pad [4]byte PChannelHandleList P64 PChannelList P64 @@ -309,7 +309,7 @@ type NV0080_CTRL_GET_CAPS_PARAMS struct { // +marshal type NV0080_CTRL_GR_ROUTE_INFO struct { - Flags uint32 `nvproxy:"same"` + Flags uint32 Pad [4]byte Route uint64 } @@ -377,7 +377,7 @@ const ( // +marshal type NV00FD_CTRL_ATTACH_GPU_PARAMS struct { - HSubDevice Handle `nvproxy:"same"` + HSubDevice Handle Flags uint32 DevDescriptor uint64 } @@ -431,7 +431,7 @@ const ( // +marshal type NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS struct { - BDisable uint8 `nvproxy:"same"` + BDisable uint8 Pad1 [3]byte NumChannels uint32 BOnlyDisableScheduling uint8 @@ -495,8 +495,8 @@ const ( // +marshal type NV2080_CTRL_GR_GET_INFO_PARAMS struct { - NvxxxCtrlXxxGetInfoParams `nvproxy:"same"` - GRRouteInfo NV0080_CTRL_GR_ROUTE_INFO + NvxxxCtrlXxxGetInfoParams + GRRouteInfo NV0080_CTRL_GR_ROUTE_INFO } // ListSize implements HasCtrlInfoList.ListSize. @@ -555,7 +555,7 @@ const ( // +marshal type NV503C_CTRL_REGISTER_VA_SPACE_PARAMS struct { - HVASpace Handle `nvproxy:"same"` + HVASpace Handle Pad [4]byte VASpaceToken uint64 } diff --git a/pkg/abi/nvgpu/frontend.go b/pkg/abi/nvgpu/frontend.go index e573a8d078..0d8dcb96c5 100644 --- a/pkg/abi/nvgpu/frontend.go +++ b/pkg/abi/nvgpu/frontend.go @@ -63,7 +63,7 @@ const ( // // +marshal type IoctlRegisterFD struct { - CtlFD int32 `nvproxy:"nv_ioctl_register_fd_t"` + CtlFD int32 } // GetStatus implements HasStatus.GetStatus. @@ -79,7 +79,7 @@ func (p *IoctlRegisterFD) GetStatus() uint32 { // // +marshal type IoctlAllocOSEvent struct { - HClient Handle `nvproxy:"nv_ioctl_alloc_os_event_t"` + HClient Handle HDevice Handle FD uint32 Status uint32 @@ -104,7 +104,7 @@ func (p *IoctlAllocOSEvent) GetStatus() uint32 { // // +marshal type IoctlFreeOSEvent struct { - HClient Handle `nvproxy:"nv_ioctl_free_os_event_t"` + HClient Handle HDevice Handle FD uint32 Status uint32 @@ -129,7 +129,7 @@ func (p *IoctlFreeOSEvent) GetStatus() uint32 { // // +marshal type RMAPIVersion struct { - Cmd uint32 `nvproxy:"nv_ioctl_rm_api_version_t"` + Cmd uint32 Reply uint32 VersionString [64]byte } @@ -146,7 +146,7 @@ func (p *RMAPIVersion) GetStatus() uint32 { // // +marshal type IoctlSysParams struct { - MemblockSize uint64 `nvproxy:"nv_ioctl_sys_params_t"` + MemblockSize uint64 } // GetStatus implements HasStatus.GetStatus. @@ -161,7 +161,7 @@ func (p *IoctlSysParams) GetStatus() uint32 { // // +marshal type IoctlWaitOpenComplete struct { - Rc int32 `nvproxy:"nv_ioctl_wait_open_complete_t"` + Rc int32 AdapterStatus uint32 } @@ -174,7 +174,7 @@ func (p *IoctlWaitOpenComplete) GetStatus() uint32 { // // +marshal type IoctlNVOS02ParametersWithFD struct { - Params NVOS02Parameters `nvproxy:"nv_ioctl_nvos02_parameters_with_fd"` + Params NVOS02_PARAMETERS FD int32 Pad0 [4]byte } @@ -185,8 +185,8 @@ func (p *IoctlNVOS02ParametersWithFD) GetStatus() uint32 { } // +marshal -type NVOS02Parameters struct { - HRoot Handle `nvproxy:"NVOS02_PARAMETERS"` +type NVOS02_PARAMETERS struct { + HRoot Handle HObjectParent Handle HObjectNew Handle HClass ClassID @@ -209,18 +209,18 @@ const ( NVOS02_FLAGS_MAPPING_NO_MAP = 0x00000001 ) -// NVOS00Parameters is the parameter type for NV_ESC_RM_FREE. +// NVOS00_PARAMETERS is the parameter type for NV_ESC_RM_FREE. // // +marshal -type NVOS00Parameters struct { - HRoot Handle `nvproxy:"NVOS00_PARAMETERS"` +type NVOS00_PARAMETERS struct { + HRoot Handle HObjectParent Handle HObjectOld Handle Status uint32 } // GetStatus implements HasStatus.GetStatus. -func (p *NVOS00Parameters) GetStatus() uint32 { +func (p *NVOS00_PARAMETERS) GetStatus() uint32 { return p.Status } @@ -232,8 +232,8 @@ type RmAllocParamType interface { GetPRightsRequested() P64 SetPAllocParms(p P64) SetPRightsRequested(p P64) - FromOS64(other NVOS64Parameters) - ToOS64() NVOS64Parameters + FromOS64(other NVOS64_PARAMETERS) + ToOS64() NVOS64_PARAMETERS GetPointer() uintptr HasStatus marshal.Marshallable @@ -243,16 +243,16 @@ type RmAllocParamType interface { // RmAllocParamType based on passed parameters. func GetRmAllocParamObj(isNVOS64 bool) RmAllocParamType { if isNVOS64 { - return &NVOS64Parameters{} + return &NVOS64_PARAMETERS{} } - return &NVOS21Parameters{} + return &NVOS21_PARAMETERS{} } -// NVOS21Parameters is one possible parameter type for NV_ESC_RM_ALLOC. +// NVOS21_PARAMETERS is one possible parameter type for NV_ESC_RM_ALLOC. // // +marshal -type NVOS21Parameters struct { - HRoot Handle `nvproxy:"NVOS21_PARAMETERS"` +type NVOS21_PARAMETERS struct { + HRoot Handle HObjectParent Handle HObjectNew Handle HClass ClassID @@ -262,30 +262,30 @@ type NVOS21Parameters struct { } // GetHClass implements RmAllocParamType.GetHClass. -func (n *NVOS21Parameters) GetHClass() ClassID { +func (n *NVOS21_PARAMETERS) GetHClass() ClassID { return n.HClass } // GetPAllocParms implements RmAllocParamType.GetPAllocParms. -func (n *NVOS21Parameters) GetPAllocParms() P64 { +func (n *NVOS21_PARAMETERS) GetPAllocParms() P64 { return n.PAllocParms } // GetPRightsRequested implements RmAllocParamType.GetPRightsRequested. -func (n *NVOS21Parameters) GetPRightsRequested() P64 { +func (n *NVOS21_PARAMETERS) GetPRightsRequested() P64 { return 0 } // SetPAllocParms implements RmAllocParamType.SetPAllocParms. -func (n *NVOS21Parameters) SetPAllocParms(p P64) { n.PAllocParms = p } +func (n *NVOS21_PARAMETERS) SetPAllocParms(p P64) { n.PAllocParms = p } // SetPRightsRequested implements RmAllocParamType.SetPRightsRequested. -func (n *NVOS21Parameters) SetPRightsRequested(p P64) { +func (n *NVOS21_PARAMETERS) SetPRightsRequested(p P64) { panic("impossible") } // FromOS64 implements RmAllocParamType.FromOS64. -func (n *NVOS21Parameters) FromOS64(other NVOS64Parameters) { +func (n *NVOS21_PARAMETERS) FromOS64(other NVOS64_PARAMETERS) { n.HRoot = other.HRoot n.HObjectParent = other.HObjectParent n.HObjectNew = other.HObjectNew @@ -296,8 +296,8 @@ func (n *NVOS21Parameters) FromOS64(other NVOS64Parameters) { } // ToOS64 implements RmAllocParamType.ToOS64. -func (n *NVOS21Parameters) ToOS64() NVOS64Parameters { - return NVOS64Parameters{ +func (n *NVOS21_PARAMETERS) ToOS64() NVOS64_PARAMETERS { + return NVOS64_PARAMETERS{ HRoot: n.HRoot, HObjectParent: n.HObjectParent, HObjectNew: n.HObjectNew, @@ -309,15 +309,15 @@ func (n *NVOS21Parameters) ToOS64() NVOS64Parameters { } // GetStatus implements RmAllocParamType.GetStatus. -func (n *NVOS21Parameters) GetStatus() uint32 { +func (n *NVOS21_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS55Parameters is the parameter type for NV_ESC_RM_DUP_OBJECT. +// NVOS55_PARAMETERS is the parameter type for NV_ESC_RM_DUP_OBJECT. // // +marshal -type NVOS55Parameters struct { - HClient Handle `nvproxy:"NVOS55_PARAMETERS"` +type NVOS55_PARAMETERS struct { + HClient Handle HParent Handle HObject Handle HClientSrc Handle @@ -327,31 +327,30 @@ type NVOS55Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS55Parameters) GetStatus() uint32 { +func (n *NVOS55_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS57Parameters is the parameter type for NV_ESC_RM_SHARE. +// NVOS57_PARAMETERS is the parameter type for NV_ESC_RM_SHARE. // // +marshal -type NVOS57Parameters struct { - HClient Handle `nvproxy:"NVOS57_PARAMETERS"` +type NVOS57_PARAMETERS struct { + HClient Handle HObject Handle SharePolicy RS_SHARE_POLICY Status uint32 } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS57Parameters) GetStatus() uint32 { +func (n *NVOS57_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS30Parameters is NVOS30_PARAMETERS, the parameter type for -// NV_ESC_RM_IDLE_CHANNELS. +// NVOS30_PARAMETERS is the parameter type for NV_ESC_RM_IDLE_CHANNELS. // // +marshal -type NVOS30Parameters struct { - Client Handle `nvproxy:"NVOS30_PARAMETERS"` +type NVOS30_PARAMETERS struct { + Client Handle Device Handle Channel Handle NumChannels uint32 @@ -367,15 +366,15 @@ type NVOS30Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS30Parameters) GetStatus() uint32 { +func (n *NVOS30_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS32Parameters is the parameter type for NV_ESC_RM_VID_HEAP_CONTROL. +// NVOS32_PARAMETERS is the parameter type for NV_ESC_RM_VID_HEAP_CONTROL. // // +marshal -type NVOS32Parameters struct { - HRoot Handle `nvproxy:"NVOS32_PARAMETERS"` +type NVOS32_PARAMETERS struct { + HRoot Handle HObjectParent Handle Function uint32 HVASpace Handle @@ -388,7 +387,7 @@ type NVOS32Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS32Parameters) GetStatus() uint32 { +func (n *NVOS32_PARAMETERS) GetStatus() uint32 { return n.Status } @@ -448,7 +447,7 @@ const ( // // +marshal type IoctlNVOS33ParametersWithFD struct { - Params NVOS33Parameters `nvproxy:"nv_ioctl_nvos33_parameters_with_fd"` + Params NVOS33_PARAMETERS FD int32 Pad0 [4]byte } @@ -459,8 +458,8 @@ func (p *IoctlNVOS33ParametersWithFD) GetStatus() uint32 { } // +marshal -type NVOS33Parameters struct { - HClient Handle `nvproxy:"NVOS33_PARAMETERS"` +type NVOS33_PARAMETERS struct { + HClient Handle HDevice Handle HMemory Handle Pad0 [4]byte @@ -471,11 +470,11 @@ type NVOS33Parameters struct { Flags uint32 } -// NVOS34Parameters is the parameter type for NV_ESC_RM_UNMAP_MEMORY. +// NVOS34_PARAMETERS is the parameter type for NV_ESC_RM_UNMAP_MEMORY. // // +marshal -type NVOS34Parameters struct { - HClient Handle `nvproxy:"NVOS34_PARAMETERS"` +type NVOS34_PARAMETERS struct { + HClient Handle HDevice Handle HMemory Handle Pad0 [4]byte @@ -485,16 +484,15 @@ type NVOS34Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS34Parameters) GetStatus() uint32 { +func (n *NVOS34_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS39Parameters is NVOS39_PARAMETERS, the parameter type for -// NV_ESC_RM_ALLOC_CONTEXT_DMA2. +// NVOS39_PARAMETERS is the parameter type for NV_ESC_RM_ALLOC_CONTEXT_DMA2. // // +marshal -type NVOS39Parameters struct { - HObjectParent Handle `nvproxy:"NVOS39_PARAMETERS"` +type NVOS39_PARAMETERS struct { + HObjectParent Handle HSubDevice Handle HObjectNew Handle HClass ClassID @@ -509,16 +507,15 @@ type NVOS39Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS39Parameters) GetStatus() uint32 { +func (n *NVOS39_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS46Parameters is NVOS46_PARAMETERS, the parameter type for -// NV_ESC_RM_MAP_MEMORY_DMA. +// NVOS46_PARAMETERS is the parameter type for NV_ESC_RM_MAP_MEMORY_DMA. // // +marshal -type NVOS46Parameters struct { - Client Handle `nvproxy:"NVOS46_PARAMETERS"` +type NVOS46_PARAMETERS struct { + Client Handle Device Handle Dma Handle Memory Handle @@ -532,16 +529,15 @@ type NVOS46Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS46Parameters) GetStatus() uint32 { +func (n *NVOS46_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS47Parameters is NVOS47_PARAMETERS, the parameter type for -// NV_ESC_RM_UNMAP_MEMORY_DMA. +// NVOS47_PARAMETERS is the parameter type for NV_ESC_RM_UNMAP_MEMORY_DMA. // // +marshal -type NVOS47Parameters struct { - Client Handle `nvproxy:"NVOS47_PARAMETERS"` +type NVOS47_PARAMETERS struct { + Client Handle Device Handle Dma Handle Memory Handle @@ -553,16 +549,16 @@ type NVOS47Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS47Parameters) GetStatus() uint32 { +func (n *NVOS47_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS47ParametersV550 is the updated version of NVOS47Parameters since +// NVOS47_PARAMETERS_V550 is the updated version of NVOS47_PARAMETERS since // 550.54.04. // // +marshal -type NVOS47ParametersV550 struct { - Client Handle `nvproxy:"NVOS47_PARAMETERS"` +type NVOS47_PARAMETERS_V550 struct { + Client Handle Device Handle Dma Handle Memory Handle @@ -575,15 +571,15 @@ type NVOS47ParametersV550 struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS47ParametersV550) GetStatus() uint32 { +func (n *NVOS47_PARAMETERS_V550) GetStatus() uint32 { return n.Status } -// NVOS54Parameters is the parameter type for NV_ESC_RM_CONTROL. +// NVOS54_PARAMETERS is the parameter type for NV_ESC_RM_CONTROL. // // +marshal -type NVOS54Parameters struct { - HClient Handle `nvproxy:"NVOS54_PARAMETERS"` +type NVOS54_PARAMETERS struct { + HClient Handle HObject Handle Cmd uint32 Flags uint32 @@ -593,15 +589,15 @@ type NVOS54Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS54Parameters) GetStatus() uint32 { +func (n *NVOS54_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS56Parameters is the parameter type for NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO. +// NVOS56_PARAMETERS is the parameter type for NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO. // // +marshal -type NVOS56Parameters struct { - HClient Handle `nvproxy:"NVOS56_PARAMETERS"` +type NVOS56_PARAMETERS struct { + HClient Handle HDevice Handle HMemory Handle Pad0 [4]byte @@ -612,16 +608,16 @@ type NVOS56Parameters struct { } // GetStatus implements HasStatus.GetStatus. -func (n *NVOS56Parameters) GetStatus() uint32 { +func (n *NVOS56_PARAMETERS) GetStatus() uint32 { return n.Status } -// NVOS64Parameters is one possible parameter type for NV_ESC_RM_ALLOC. +// NVOS64_PARAMETERS is one possible parameter type for NV_ESC_RM_ALLOC. // // +marshal // +stateify savable -type NVOS64Parameters struct { - HRoot Handle `nvproxy:"NVOS64_PARAMETERS"` +type NVOS64_PARAMETERS struct { + HRoot Handle HObjectParent Handle HObjectNew Handle HClass ClassID @@ -634,34 +630,34 @@ type NVOS64Parameters struct { } // GetHClass implements RmAllocParamType.GetHClass. -func (n *NVOS64Parameters) GetHClass() ClassID { +func (n *NVOS64_PARAMETERS) GetHClass() ClassID { return n.HClass } // GetPAllocParms implements RmAllocParamType.GetPAllocParms. -func (n *NVOS64Parameters) GetPAllocParms() P64 { +func (n *NVOS64_PARAMETERS) GetPAllocParms() P64 { return n.PAllocParms } // GetPRightsRequested implements RmAllocParamType.GetPRightsRequested. -func (n *NVOS64Parameters) GetPRightsRequested() P64 { +func (n *NVOS64_PARAMETERS) GetPRightsRequested() P64 { return n.PRightsRequested } // SetPAllocParms implements RmAllocParamType.SetPAllocParms. -func (n *NVOS64Parameters) SetPAllocParms(p P64) { n.PAllocParms = p } +func (n *NVOS64_PARAMETERS) SetPAllocParms(p P64) { n.PAllocParms = p } // SetPRightsRequested implements RmAllocParamType.SetPRightsRequested. -func (n *NVOS64Parameters) SetPRightsRequested(p P64) { n.PRightsRequested = p } +func (n *NVOS64_PARAMETERS) SetPRightsRequested(p P64) { n.PRightsRequested = p } // FromOS64 implements RmAllocParamType.FromOS64. -func (n *NVOS64Parameters) FromOS64(other NVOS64Parameters) { *n = other } +func (n *NVOS64_PARAMETERS) FromOS64(other NVOS64_PARAMETERS) { *n = other } // ToOS64 implements RmAllocParamType.ToOS64. -func (n *NVOS64Parameters) ToOS64() NVOS64Parameters { return *n } +func (n *NVOS64_PARAMETERS) ToOS64() NVOS64_PARAMETERS { return *n } // GetStatus implements RmAllocParamType.GetStatus. -func (n *NVOS64Parameters) GetStatus() uint32 { +func (n *NVOS64_PARAMETERS) GetStatus() uint32 { return n.Status } @@ -682,17 +678,17 @@ var ( SizeofIoctlSysParams = uint32((*IoctlSysParams)(nil).SizeBytes()) SizeofIoctlWaitOpenComplete = uint32((*IoctlWaitOpenComplete)(nil).SizeBytes()) SizeofIoctlNVOS02ParametersWithFD = uint32((*IoctlNVOS02ParametersWithFD)(nil).SizeBytes()) - SizeofNVOS00Parameters = uint32((*NVOS00Parameters)(nil).SizeBytes()) - SizeofNVOS21Parameters = uint32((*NVOS21Parameters)(nil).SizeBytes()) + SizeofNVOS00Parameters = uint32((*NVOS00_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS21Parameters = uint32((*NVOS21_PARAMETERS)(nil).SizeBytes()) SizeofIoctlNVOS33ParametersWithFD = uint32((*IoctlNVOS33ParametersWithFD)(nil).SizeBytes()) - SizeofNVOS30Parameters = uint32((*NVOS30Parameters)(nil).SizeBytes()) - SizeofNVOS32Parameters = uint32((*NVOS32Parameters)(nil).SizeBytes()) - SizeofNVOS34Parameters = uint32((*NVOS34Parameters)(nil).SizeBytes()) - SizeofNVOS39Parameters = uint32((*NVOS39Parameters)(nil).SizeBytes()) - SizeofNVOS46Parameters = uint32((*NVOS46Parameters)(nil).SizeBytes()) - SizeofNVOS54Parameters = uint32((*NVOS54Parameters)(nil).SizeBytes()) - SizeofNVOS55Parameters = uint32((*NVOS55Parameters)(nil).SizeBytes()) - SizeofNVOS56Parameters = uint32((*NVOS56Parameters)(nil).SizeBytes()) - SizeofNVOS57Parameters = uint32((*NVOS57Parameters)(nil).SizeBytes()) - SizeofNVOS64Parameters = uint32((*NVOS64Parameters)(nil).SizeBytes()) + SizeofNVOS30Parameters = uint32((*NVOS30_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS32Parameters = uint32((*NVOS32_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS34Parameters = uint32((*NVOS34_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS39Parameters = uint32((*NVOS39_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS46Parameters = uint32((*NVOS46_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS54Parameters = uint32((*NVOS54_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS55Parameters = uint32((*NVOS55_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS56Parameters = uint32((*NVOS56_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS57Parameters = uint32((*NVOS57_PARAMETERS)(nil).SizeBytes()) + SizeofNVOS64Parameters = uint32((*NVOS64_PARAMETERS)(nil).SizeBytes()) ) diff --git a/pkg/abi/nvgpu/frontend_unsafe.go b/pkg/abi/nvgpu/frontend_unsafe.go index 8918860df3..7e0f244981 100644 --- a/pkg/abi/nvgpu/frontend_unsafe.go +++ b/pkg/abi/nvgpu/frontend_unsafe.go @@ -17,11 +17,11 @@ package nvgpu import "unsafe" // GetPointer implements RmAllocParamType.GetPointer. -func (n *NVOS21Parameters) GetPointer() uintptr { +func (n *NVOS21_PARAMETERS) GetPointer() uintptr { return uintptr(unsafe.Pointer(n)) } // GetPointer implements RmAllocParamType.GetPointer. -func (n *NVOS64Parameters) GetPointer() uintptr { +func (n *NVOS64_PARAMETERS) GetPointer() uintptr { return uintptr(unsafe.Pointer(n)) } diff --git a/pkg/abi/nvgpu/nvgpu.go b/pkg/abi/nvgpu/nvgpu.go index aa8192ae62..9aa9304214 100644 --- a/pkg/abi/nvgpu/nvgpu.go +++ b/pkg/abi/nvgpu/nvgpu.go @@ -32,7 +32,7 @@ const ( // +marshal // +stateify savable type Handle struct { - Val uint32 `nvproxy:"NvHandle"` + Val uint32 } // String implements fmt.Stringer.String. diff --git a/pkg/abi/nvgpu/uvm.go b/pkg/abi/nvgpu/uvm.go index 37d60d0aad..746b7d3b6a 100644 --- a/pkg/abi/nvgpu/uvm.go +++ b/pkg/abi/nvgpu/uvm.go @@ -53,7 +53,7 @@ const ( // +marshal type UVM_INITIALIZE_PARAMS struct { - Flags uint64 `nvproxy:"same"` + Flags uint64 RMStatus uint32 Pad0 [4]byte } @@ -70,7 +70,7 @@ const ( // +marshal type UVM_CREATE_RANGE_GROUP_PARAMS struct { - RangeGroupID uint64 `nvproxy:"same"` + RangeGroupID uint64 RMStatus uint32 Pad0 [4]byte } @@ -82,7 +82,7 @@ func (p *UVM_CREATE_RANGE_GROUP_PARAMS) GetStatus() uint32 { // +marshal type UVM_DESTROY_RANGE_GROUP_PARAMS struct { - RangeGroupID uint64 `nvproxy:"same"` + RangeGroupID uint64 RMStatus uint32 Pad0 [4]byte } @@ -94,7 +94,7 @@ func (p *UVM_DESTROY_RANGE_GROUP_PARAMS) GetStatus() uint32 { // +marshal type UVM_REGISTER_GPU_VASPACE_PARAMS struct { - GPUUUID NvUUID `nvproxy:"same"` + GPUUUID NvUUID RMCtrlFD int32 HClient Handle HVASpace Handle @@ -118,7 +118,7 @@ func (p *UVM_REGISTER_GPU_VASPACE_PARAMS) GetStatus() uint32 { // +marshal type UVM_UNREGISTER_GPU_VASPACE_PARAMS struct { - GPUUUID NvUUID `nvproxy:"same"` + GPUUUID NvUUID RMStatus uint32 } @@ -129,7 +129,7 @@ func (p *UVM_UNREGISTER_GPU_VASPACE_PARAMS) GetStatus() uint32 { // +marshal type UVM_REGISTER_CHANNEL_PARAMS struct { - GPUUUID NvUUID `nvproxy:"same"` + GPUUUID NvUUID RMCtrlFD int32 HClient Handle HChannel Handle @@ -157,7 +157,7 @@ func (p *UVM_REGISTER_CHANNEL_PARAMS) GetStatus() uint32 { // +marshal type UVM_UNREGISTER_CHANNEL_PARAMS struct { - GPUUUID NvUUID `nvproxy:"same"` + GPUUUID NvUUID HClient Handle HChannel Handle RMStatus uint32 @@ -170,7 +170,7 @@ func (p *UVM_UNREGISTER_CHANNEL_PARAMS) GetStatus() uint32 { // +marshal type UVM_ENABLE_PEER_ACCESS_PARAMS struct { - GPUUUIDA NvUUID `nvproxy:"same"` + GPUUUIDA NvUUID GPUUUIDB NvUUID RMStatus uint32 } @@ -182,7 +182,7 @@ func (p *UVM_ENABLE_PEER_ACCESS_PARAMS) GetStatus() uint32 { // +marshal type UVM_DISABLE_PEER_ACCESS_PARAMS struct { - GPUUUIDA NvUUID `nvproxy:"same"` + GPUUUIDA NvUUID GPUUUIDB NvUUID RMStatus uint32 } @@ -194,7 +194,7 @@ func (p *UVM_DISABLE_PEER_ACCESS_PARAMS) GetStatus() uint32 { // +marshal type UVM_SET_RANGE_GROUP_PARAMS struct { - RangeGroupID uint64 `nvproxy:"same"` + RangeGroupID uint64 RequestedBase uint64 Length uint64 RMStatus uint32 @@ -208,7 +208,7 @@ func (p *UVM_SET_RANGE_GROUP_PARAMS) GetStatus() uint32 { // +marshal type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 Offset uint64 PerGPUAttributes [UVM_MAX_GPUS]UvmGpuMappingAttributes @@ -236,7 +236,7 @@ func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS) GetStatus() uint32 { // +marshal type UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550 struct { - Base uint64 `nvproxy:"UVM_MAP_EXTERNAL_ALLOCATION_PARAMS"` + Base uint64 Length uint64 Offset uint64 PerGPUAttributes [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes @@ -264,7 +264,7 @@ func (p *UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550) GetStatus() uint32 { // +marshal type UVM_FREE_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 RMStatus uint32 Pad0 [4]byte @@ -277,7 +277,7 @@ func (p *UVM_FREE_PARAMS) GetStatus() uint32 { // +marshal type UVM_REGISTER_GPU_PARAMS struct { - GPUUUID NvUUID `nvproxy:"same"` + GPUUUID NvUUID NumaEnabled uint8 Pad [3]byte NumaNodeID int32 @@ -304,7 +304,7 @@ func (p *UVM_REGISTER_GPU_PARAMS) GetStatus() uint32 { // +marshal type UVM_UNREGISTER_GPU_PARAMS struct { - GPUUUID NvUUID `nvproxy:"same"` + GPUUUID NvUUID RMStatus uint32 } @@ -315,7 +315,7 @@ func (p *UVM_UNREGISTER_GPU_PARAMS) GetStatus() uint32 { // +marshal type UVM_PAGEABLE_MEM_ACCESS_PARAMS struct { - PageableMemAccess uint8 `nvproxy:"same"` + PageableMemAccess uint8 Pad [3]byte RMStatus uint32 } @@ -327,7 +327,7 @@ func (p *UVM_PAGEABLE_MEM_ACCESS_PARAMS) GetStatus() uint32 { // +marshal type UVM_SET_PREFERRED_LOCATION_PARAMS struct { - RequestedBase uint64 `nvproxy:"same"` + RequestedBase uint64 Length uint64 PreferredLocation NvUUID RMStatus uint32 @@ -341,7 +341,7 @@ func (p *UVM_SET_PREFERRED_LOCATION_PARAMS) GetStatus() uint32 { // +marshal type UVM_SET_PREFERRED_LOCATION_PARAMS_V550 struct { - RequestedBase uint64 `nvproxy:"UVM_SET_PREFERRED_LOCATION_PARAMS"` + RequestedBase uint64 Length uint64 PreferredLocation NvUUID PreferredCPUNumaNode int32 @@ -355,7 +355,7 @@ func (p *UVM_SET_PREFERRED_LOCATION_PARAMS_V550) GetStatus() uint32 { // +marshal type UVM_UNSET_PREFERRED_LOCATION_PARAMS struct { - RequestedBase uint64 `nvproxy:"same"` + RequestedBase uint64 Length uint64 RMStatus uint32 Pad0 [4]byte @@ -368,7 +368,7 @@ func (p *UVM_UNSET_PREFERRED_LOCATION_PARAMS) GetStatus() uint32 { // +marshal type UVM_DISABLE_READ_DUPLICATION_PARAMS struct { - RequestedBase uint64 `nvproxy:"same"` + RequestedBase uint64 Length uint64 RMStatus uint32 Pad0 [4]byte @@ -381,7 +381,7 @@ func (p *UVM_DISABLE_READ_DUPLICATION_PARAMS) GetStatus() uint32 { // +marshal type UVM_UNSET_ACCESSED_BY_PARAMS struct { - RequestedBase uint64 `nvproxy:"same"` + RequestedBase uint64 Length uint64 AccessedByUUID NvUUID RMStatus uint32 @@ -395,7 +395,7 @@ func (p *UVM_UNSET_ACCESSED_BY_PARAMS) GetStatus() uint32 { // +marshal type UVM_MIGRATE_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 DestinationUUID NvUUID Flags uint32 @@ -419,7 +419,7 @@ func (p *UVM_MIGRATE_PARAMS) GetStatus() uint32 { // // +marshal type UVM_MIGRATE_PARAMS_V550 struct { - Base uint64 `nvproxy:"UVM_MIGRATE_PARAMS"` + Base uint64 Length uint64 DestinationUUID NvUUID Flags uint32 @@ -440,7 +440,7 @@ func (p *UVM_MIGRATE_PARAMS_V550) GetStatus() uint32 { // +marshal type UVM_MIGRATE_RANGE_GROUP_PARAMS struct { - RangeGroupID uint64 `nvproxy:"same"` + RangeGroupID uint64 DestinationUUID NvUUID RMStatus uint32 Pad0 [4]byte @@ -453,7 +453,7 @@ func (p *UVM_MIGRATE_RANGE_GROUP_PARAMS) GetStatus() uint32 { // +marshal type UVM_TOOLS_READ_PROCESS_MEMORY_PARAMS struct { - Buffer uint64 `nvproxy:"same"` + Buffer uint64 Size uint64 TargetVA uint64 BytesRead uint64 @@ -463,7 +463,7 @@ type UVM_TOOLS_READ_PROCESS_MEMORY_PARAMS struct { // +marshal type UVM_TOOLS_WRITE_PROCESS_MEMORY_PARAMS struct { - Buffer uint64 `nvproxy:"same"` + Buffer uint64 Size uint64 TargetVA uint64 BytesWritten uint64 @@ -473,7 +473,7 @@ type UVM_TOOLS_WRITE_PROCESS_MEMORY_PARAMS struct { // +marshal type UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 GPUUUID NvUUID RMStatus uint32 @@ -487,7 +487,7 @@ func (p *UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS) GetStatus() uint32 { // +marshal type UVM_UNMAP_EXTERNAL_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 GPUUUID NvUUID RMStatus uint32 @@ -501,7 +501,7 @@ func (p *UVM_UNMAP_EXTERNAL_PARAMS) GetStatus() uint32 { // +marshal type UVM_ALLOC_SEMAPHORE_POOL_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 PerGPUAttributes [UVM_MAX_GPUS]UvmGpuMappingAttributes GPUAttributesCount uint64 @@ -516,7 +516,7 @@ func (p *UVM_ALLOC_SEMAPHORE_POOL_PARAMS) GetStatus() uint32 { // +marshal type UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550 struct { - Base uint64 `nvproxy:"UVM_ALLOC_SEMAPHORE_POOL_PARAMS"` + Base uint64 Length uint64 PerGPUAttributes [UVM_MAX_GPUS_V2]UvmGpuMappingAttributes GPUAttributesCount uint64 @@ -531,7 +531,7 @@ func (p *UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550) GetStatus() uint32 { // +marshal type UVM_VALIDATE_VA_RANGE_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 RMStatus uint32 Pad0 [4]byte @@ -544,7 +544,7 @@ func (p *UVM_VALIDATE_VA_RANGE_PARAMS) GetStatus() uint32 { // +marshal type UVM_CREATE_EXTERNAL_RANGE_PARAMS struct { - Base uint64 `nvproxy:"same"` + Base uint64 Length uint64 RMStatus uint32 Pad0 [4]byte @@ -557,7 +557,7 @@ func (p *UVM_CREATE_EXTERNAL_RANGE_PARAMS) GetStatus() uint32 { // +marshal type UVM_MM_INITIALIZE_PARAMS struct { - UvmFD int32 `nvproxy:"same"` + UvmFD int32 RMStatus uint32 } diff --git a/pkg/sentry/devices/nvproxy/frontend.go b/pkg/sentry/devices/nvproxy/frontend.go index 23dda93e53..256548c654 100644 --- a/pkg/sentry/devices/nvproxy/frontend.go +++ b/pkg/sentry/devices/nvproxy/frontend.go @@ -397,7 +397,7 @@ func frontendIoctlHasFD[Params any, PtrParams hasFrontendFDAndStatusPtr[Params]] } func rmAllocContextDMA2(fi *frontendIoctlState) (uintptr, error) { - var ioctlParams nvgpu.NVOS39Parameters + var ioctlParams nvgpu.NVOS39_PARAMETERS if fi.ioctlParamsSize != nvgpu.SizeofNVOS39Parameters { return 0, linuxerr.EINVAL } @@ -627,7 +627,7 @@ func rmAllocOSDescriptor(fi *frontendIoctlState, ioctlParams *nvgpu.IoctlNVOS02P } func rmDupObject(fi *frontendIoctlState) (uintptr, error) { - var ioctlParams nvgpu.NVOS55Parameters + var ioctlParams nvgpu.NVOS55_PARAMETERS if fi.ioctlParamsSize != nvgpu.SizeofNVOS55Parameters { return 0, linuxerr.EINVAL } @@ -653,7 +653,7 @@ func rmDupObject(fi *frontendIoctlState) (uintptr, error) { } func rmFree(fi *frontendIoctlState) (uintptr, error) { - var ioctlParams nvgpu.NVOS00Parameters + var ioctlParams nvgpu.NVOS00_PARAMETERS if fi.ioctlParamsSize != nvgpu.SizeofNVOS00Parameters { return 0, linuxerr.EINVAL } @@ -678,7 +678,7 @@ func rmFree(fi *frontendIoctlState) (uintptr, error) { } func rmControl(fi *frontendIoctlState) (uintptr, error) { - var ioctlParams nvgpu.NVOS54Parameters + var ioctlParams nvgpu.NVOS54_PARAMETERS if fi.ioctlParamsSize != nvgpu.SizeofNVOS54Parameters { return 0, linuxerr.EINVAL } @@ -729,7 +729,7 @@ func rmControl(fi *frontendIoctlState) (uintptr, error) { return result, err } -func rmControlSimple(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func rmControlSimple(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { if ioctlParams.ParamsSize == 0 { if ioctlParams.Params != 0 { return 0, linuxerr.EINVAL @@ -754,13 +754,13 @@ func rmControlSimple(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters return n, nil } -func ctrlCmdFailWithStatus(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters, status uint32) error { +func ctrlCmdFailWithStatus(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS, status uint32) error { ioctlParams.Status = status _, err := ioctlParams.CopyOut(fi.t, fi.ioctlParamsAddr) return err } -func ctrlHasFrontendFD[Params any, PtrParams hasFrontendFDPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlHasFrontendFD[Params any, PtrParams hasFrontendFDPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParamsValue Params ctrlParams := PtrParams(&ctrlParamsValue) if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { @@ -793,7 +793,7 @@ func ctrlHasFrontendFD[Params any, PtrParams hasFrontendFDPtr[Params]](fi *front return n, nil } -func ctrlMemoryMulticastFabricAttachGPU(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlMemoryMulticastFabricAttachGPU(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV00FD_CTRL_ATTACH_GPU_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -841,7 +841,7 @@ func rmapiParamsSizeCheck(numElems uint32, sizeOfElem uint32) bool { return uint64(numElems)*uint64(sizeOfElem) <= nvgpu.RMAPI_PARAM_COPY_MAX_PARAMS_SIZE } -func ctrlClientSystemGetBuildVersion(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlClientSystemGetBuildVersion(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -879,7 +879,7 @@ func ctrlClientSystemGetBuildVersion(fi *frontendIoctlState, ioctlParams *nvgpu. return n, nil } -func ctrlGetNvU32List(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlGetNvU32List(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.RmapiParamNvU32List if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -903,7 +903,7 @@ func ctrlGetNvU32List(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameter return ctrlGetNvU32ListInvoke(fi, ioctlParams, &ctrlParams, list) } -func ctrlDevGetCaps(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlDevGetCaps(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV0080_CTRL_GET_CAPS_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -921,7 +921,7 @@ func ctrlDevGetCaps(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) return ctrlDevGRGetCapsInvoke(fi, ioctlParams, &ctrlParams, capsTbl) } -func ctrlRegisterVASpace(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlRegisterVASpace(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV503C_CTRL_REGISTER_VA_SPACE_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -946,7 +946,7 @@ func ctrlRegisterVASpace(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parame return n, nil } -func ctrlSubdevFIFODisableChannels(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlSubdevFIFODisableChannels(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -971,7 +971,7 @@ func ctrlSubdevFIFODisableChannels(fi *frontendIoctlState, ioctlParams *nvgpu.NV return n, nil } -func ctrlGpuGetIDInfo(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlGpuGetIDInfo(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV0000_CTRL_GPU_GET_ID_INFO_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -1048,7 +1048,7 @@ func rmAlloc(fi *frontendIoctlState) (uintptr, error) { } // See src/nvidia/src/kernel/rmapi/alloc_free.c:_fixupAllocParams(). -func fixupHClass(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters) error { +func fixupHClass(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS) error { // "NV01_EVENT isn't a valid class to allocate so overwrite it with the // subclass from the event params." if ioctlParams.HClass == nvgpu.NV01_EVENT { @@ -1072,17 +1072,17 @@ func fixupHClass(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters) er // // Unlike frontendIoctlSimple and rmControlSimple, rmAllocSimple requires the // parameter type since the parameter's size is otherwise unknown. -func rmAllocSimple[Params any, PtrParams marshalPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { +func rmAllocSimple[Params any, PtrParams marshalPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { return rmAllocSimpleParams[Params, PtrParams](fi, ioctlParams, isNVOS64, addSimpleObjDepParentLocked) } // addSimpleObjDepParentLocked implements rmAllocInvoke.addObjLocked for // classes that require no special handling and depend only on their parents. -func addSimpleObjDepParentLocked[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params) { +func addSimpleObjDepParentLocked[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params) { fi.fd.dev.nvp.objAdd(fi.ctx, ioctlParams.HRoot, ioctlParams.HObjectNew, ioctlParams.HClass, newRmAllocObject(fi.fd, ioctlParams, rightsRequested, allocParams), ioctlParams.HObjectParent) } -func rmAllocSimpleParams[Params any, PtrParams marshalPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool, objAddLocked func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params)) (uintptr, error) { +func rmAllocSimpleParams[Params any, PtrParams marshalPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool, objAddLocked func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params)) (uintptr, error) { if ioctlParams.PAllocParms == 0 { return rmAllocInvoke[Params](fi, ioctlParams, nil, isNVOS64, objAddLocked) } @@ -1108,12 +1108,12 @@ func rmAllocSimpleParams[Params any, PtrParams marshalPtr[Params]](fi *frontendI return n, nil } -func rmAllocNoParams(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { +func rmAllocNoParams(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { return rmAllocInvoke[byte](fi, ioctlParams, nil, isNVOS64, addSimpleObjDepParentLocked) } -func rmAllocRootClient(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { - return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.Handle) { +func rmAllocRootClient(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { + return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.Handle) { fi.fd.dev.nvp.objAdd(fi.ctx, ioctlParams.HRoot, ioctlParams.HObjectNew, ioctlParams.HClass, newRootClient(fi.fd, ioctlParams, rightsRequested, allocParams), nvgpu.Handle{Val: nvgpu.NV01_NULL_OBJECT} /* parentH */) if fi.fd.clients == nil { fi.fd.clients = make(map[nvgpu.Handle]struct{}) @@ -1122,7 +1122,7 @@ func rmAllocRootClient(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Paramete }) } -func rmAllocEventOSEvent(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { +func rmAllocEventOSEvent(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { var allocParams nvgpu.NV0005_ALLOC_PARAMETERS if _, err := allocParams.CopyIn(fi.t, addrFromP64(ioctlParams.PAllocParms)); err != nil { return 0, err @@ -1139,7 +1139,7 @@ func rmAllocEventOSEvent(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parame origData := allocParams.Data allocParams.Data = nvgpu.P64(uint64(eventFile.hostFD)) - n, err := rmAllocInvoke(fi, ioctlParams, &allocParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV0005_ALLOC_PARAMETERS) { + n, err := rmAllocInvoke(fi, ioctlParams, &allocParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV0005_ALLOC_PARAMETERS) { fi.fd.dev.nvp.objAdd(fi.ctx, ioctlParams.HRoot, ioctlParams.HObjectNew, ioctlParams.HClass, &miscObject{}, ioctlParams.HObjectParent) }) if err != nil { @@ -1153,8 +1153,8 @@ func rmAllocEventOSEvent(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parame return n, nil } -func rmAllocMemoryVirtual(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { - return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS) { +func rmAllocMemoryVirtual(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { + return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS) { // See // src/nvidia/src/kernel/mem_mgr/virt_mem_range.c:vmrangeConstruct_IMPL() // => refAddDependant(). @@ -1169,8 +1169,8 @@ func rmAllocMemoryVirtual(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Param }) } -func rmAllocSMDebuggerSession(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { - return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV83DE_ALLOC_PARAMETERS) { +func rmAllocSMDebuggerSession(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { + return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV83DE_ALLOC_PARAMETERS) { // Compare // src/nvidia/src/kernel/gpu/gr/kernel_sm_debugger_session.c:ksmdbgssnConstruct_IMPL() // => _ShareDebugger() => sessionAddDependency/sessionAddDependant(); @@ -1180,8 +1180,8 @@ func rmAllocSMDebuggerSession(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64P }) } -func rmAllocChannelGroup(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { - return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS) { +func rmAllocChannelGroup(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { + return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS) { // See // src/nvidia/src/kernel/gpu/fifo/kernel_channel_group_api.c:kchangrpapiConstruct_IMPL() // => refAddDependant(). @@ -1198,8 +1198,8 @@ func rmAllocChannelGroup(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parame }) } -func rmAllocChannel(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { - return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CHANNEL_ALLOC_PARAMS) { +func rmAllocChannel(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { + return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CHANNEL_ALLOC_PARAMS) { // See // src/nvidia/src/kernel/gpu/fifo/kernel_channel.c:kchannelConstruct_IMPL() // => refAddDependant(). The channel's parent may be a device or @@ -1212,8 +1212,8 @@ func rmAllocChannel(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, }) } -func rmAllocContextShare(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { - return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CTXSHARE_ALLOCATION_PARAMETERS) { +func rmAllocContextShare(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { + return rmAllocSimpleParams(fi, ioctlParams, isNVOS64, func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.NV_CTXSHARE_ALLOCATION_PARAMETERS) { // See // src/nvidia/src/kernel/gpu/fifo/kernel_ctxshare.c:kctxshareapiConstruct_IMPL() // => refAddDependant(). The context share's parent is the channel @@ -1226,7 +1226,7 @@ func rmAllocContextShare(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parame // See src/nvidia/interface/deprecated/rmapi_deprecated_misc.c:RmDeprecatedIdleChannels(). func rmIdleChannels(fi *frontendIoctlState) (uintptr, error) { - var ioctlParams nvgpu.NVOS30Parameters + var ioctlParams nvgpu.NVOS30_PARAMETERS if fi.ioctlParamsSize != nvgpu.SizeofNVOS30Parameters { return 0, linuxerr.EINVAL } @@ -1270,7 +1270,7 @@ func rmIdleChannels(fi *frontendIoctlState) (uintptr, error) { } func rmVidHeapControl(fi *frontendIoctlState) (uintptr, error) { - var ioctlParams nvgpu.NVOS32Parameters + var ioctlParams nvgpu.NVOS32_PARAMETERS if fi.ioctlParamsSize != nvgpu.SizeofNVOS32Parameters { return 0, linuxerr.EINVAL } diff --git a/pkg/sentry/devices/nvproxy/frontend_unsafe.go b/pkg/sentry/devices/nvproxy/frontend_unsafe.go index a0101d675a..57ad474d53 100644 --- a/pkg/sentry/devices/nvproxy/frontend_unsafe.go +++ b/pkg/sentry/devices/nvproxy/frontend_unsafe.go @@ -46,7 +46,7 @@ func frontendIoctlBytesInvoke(fi *frontendIoctlState, sentryParams *byte) (uintp return n, nil } -func rmControlInvoke[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters, ctrlParams *Params) (uintptr, error) { +func rmControlInvoke[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS, ctrlParams *Params) (uintptr, error) { defer runtime.KeepAlive(ctrlParams) // since we convert to non-pointer-typed P64 origParams := ioctlParams.Params ioctlParams.Params = p64FromPtr(unsafe.Pointer(ctrlParams)) @@ -61,7 +61,7 @@ func rmControlInvoke[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS return n, nil } -func ctrlClientSystemGetBuildVersionInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters, ctrlParams *nvgpu.NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS, driverVersionBuf, versionBuf, titleBuf *byte) (uintptr, error) { +func ctrlClientSystemGetBuildVersionInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS, ctrlParams *nvgpu.NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS, driverVersionBuf, versionBuf, titleBuf *byte) (uintptr, error) { // *Buf arguments don't need runtime.KeepAlive() since our caller // ctrlClientSystemGetBuildVersion() copies them out, keeping them alive // during this function. @@ -84,7 +84,7 @@ func ctrlClientSystemGetBuildVersionInvoke(fi *frontendIoctlState, ioctlParams * return n, nil } -func ctrlIoctlHasInfoList[Params any, PtrParams hasCtrlInfoListPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlIoctlHasInfoList[Params any, PtrParams hasCtrlInfoListPtr[Params]](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParamsValue Params ctrlParams := PtrParams(&ctrlParamsValue) @@ -129,7 +129,7 @@ func ctrlIoctlHasInfoList[Params any, PtrParams hasCtrlInfoListPtr[Params]](fi * return n, nil } -func ctrlGetNvU32ListInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters, ctrlParams *nvgpu.RmapiParamNvU32List, list []uint32) (uintptr, error) { +func ctrlGetNvU32ListInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS, ctrlParams *nvgpu.RmapiParamNvU32List, list []uint32) (uintptr, error) { origList := ctrlParams.List ctrlParams.List = p64FromPtr(unsafe.Pointer(&list[0])) n, err := rmControlInvoke(fi, ioctlParams, ctrlParams) @@ -146,7 +146,7 @@ func ctrlGetNvU32ListInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Par return n, nil } -func ctrlDevGRGetCapsInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters, ctrlParams *nvgpu.NV0080_CTRL_GET_CAPS_PARAMS, capsTbl []byte) (uintptr, error) { +func ctrlDevGRGetCapsInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS, ctrlParams *nvgpu.NV0080_CTRL_GET_CAPS_PARAMS, capsTbl []byte) (uintptr, error) { origCapsTbl := ctrlParams.CapsTbl ctrlParams.CapsTbl = p64FromPtr(unsafe.Pointer(&capsTbl[0])) n, err := rmControlInvoke(fi, ioctlParams, ctrlParams) @@ -163,7 +163,7 @@ func ctrlDevGRGetCapsInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Par return n, nil } -func ctrlDevFIFOGetChannelList(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlDevFIFOGetChannelList(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -227,7 +227,7 @@ func ctrlClientSystemGetP2PCapsInitializeArray(origArr nvgpu.P64, gpuCount uint3 return p64FromPtr(unsafe.Pointer(&arr[0])), arr, true } -func ctrlClientSystemGetP2PCaps(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlClientSystemGetP2PCaps(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -257,7 +257,7 @@ func ctrlClientSystemGetP2PCaps(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS5 return n, err } -func ctrlClientSystemGetP2PCapsV550(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54Parameters) (uintptr, error) { +func ctrlClientSystemGetP2PCapsV550(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { var ctrlParams nvgpu.NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS_V550 if ctrlParams.SizeBytes() != int(ioctlParams.ParamsSize) { return 0, linuxerr.EINVAL @@ -299,7 +299,7 @@ func ctrlClientSystemGetP2PCapsV550(fi *frontendIoctlState, ioctlParams *nvgpu.N return n, err } -func rmAllocInvoke[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, allocParams *Params, isNVOS64 bool, addObjLocked func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params)) (uintptr, error) { +func rmAllocInvoke[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, allocParams *Params, isNVOS64 bool, addObjLocked func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params)) (uintptr, error) { defer runtime.KeepAlive(allocParams) // since we convert to non-pointer-typed P64 // Temporarily replace application pointers with sentry pointers. @@ -348,7 +348,7 @@ func rmAllocInvoke[Params any](fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64 return n, nil } -func rmIdleChannelsInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS30Parameters, clientsBuf, devicesBuf, channelsBuf *byte) (uintptr, error) { +func rmIdleChannelsInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS30_PARAMETERS, clientsBuf, devicesBuf, channelsBuf *byte) (uintptr, error) { origClients := ioctlParams.Clients origDevices := ioctlParams.Devices origChannels := ioctlParams.Channels @@ -368,7 +368,7 @@ func rmIdleChannelsInvoke(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS30Param return n, nil } -func rmVidHeapControlAllocSize(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS32Parameters) (uintptr, error) { +func rmVidHeapControlAllocSize(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS32_PARAMETERS) (uintptr, error) { allocSizeParams := (*nvgpu.NVOS32AllocSize)(unsafe.Pointer(&ioctlParams.Data)) origAddress := allocSizeParams.Address var addr uint64 diff --git a/pkg/sentry/devices/nvproxy/handlers.go b/pkg/sentry/devices/nvproxy/handlers.go index 6a0dd85d9b..0858ffe43b 100644 --- a/pkg/sentry/devices/nvproxy/handlers.go +++ b/pkg/sentry/devices/nvproxy/handlers.go @@ -67,14 +67,14 @@ func (h frontendIoctlHandler) handle(fi *frontendIoctlState) (uintptr, error) { type controlCmdHandler struct { // handler is the function to call if a capability in capSet is enabled. - handler func(*frontendIoctlState, *nvgpu.NVOS54Parameters) (uintptr, error) + handler func(*frontendIoctlState, *nvgpu.NVOS54_PARAMETERS) (uintptr, error) // capSet is a bitmask of capabilities that this handler is available for. capSet nvconf.DriverCaps } // ctrlHandler returns a controlCmdHandler that wraps the given function. // The handler will be called if any of the given capabilities are enabled. -func ctrlHandler(handler func(*frontendIoctlState, *nvgpu.NVOS54Parameters) (uintptr, error), caps nvconf.DriverCaps) controlCmdHandler { +func ctrlHandler(handler func(*frontendIoctlState, *nvgpu.NVOS54_PARAMETERS) (uintptr, error), caps nvconf.DriverCaps) controlCmdHandler { return controlCmdHandler{ handler: handler, capSet: caps, @@ -85,7 +85,7 @@ func ctrlHandler(handler func(*frontendIoctlState, *nvgpu.NVOS54Parameters) (uin // Returns errMissingCapability if the caller is missing the required // capabilities for this handler. // Returns errUndefinedHandler if the handler does not exist. -func (h controlCmdHandler) handle(fi *frontendIoctlState, params *nvgpu.NVOS54Parameters) (uintptr, error) { +func (h controlCmdHandler) handle(fi *frontendIoctlState, params *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { if h.handler == nil { return 0, &errUndefinedHandler } @@ -97,14 +97,14 @@ func (h controlCmdHandler) handle(fi *frontendIoctlState, params *nvgpu.NVOS54Pa type allocationClassHandler struct { // handler is the function to call if a capability in capSet is enabled. - handler func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) + handler func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) // capSet is a bitmask of capabilities that this handler is available for. capSet nvconf.DriverCaps } // allocHandler returns a allocationClassHandler that wraps the given function. // The handler will be called if any of the given capabilities are enabled. -func allocHandler(handler func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error), caps nvconf.DriverCaps) allocationClassHandler { +func allocHandler(handler func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error), caps nvconf.DriverCaps) allocationClassHandler { return allocationClassHandler{ handler: handler, capSet: caps, @@ -115,7 +115,7 @@ func allocHandler(handler func(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64 // Returns errMissingCapability if the caller is missing the required // capabilities for this handler. // Returns errUndefinedHandler if the handler does not exist. -func (h allocationClassHandler) handle(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64Parameters, isNVOS64 bool) (uintptr, error) { +func (h allocationClassHandler) handle(fi *frontendIoctlState, ioctlParams *nvgpu.NVOS64_PARAMETERS, isNVOS64 bool) (uintptr, error) { if h.handler == nil { return 0, &errUndefinedHandler } diff --git a/pkg/sentry/devices/nvproxy/nvproxy_test.go b/pkg/sentry/devices/nvproxy/nvproxy_test.go index eaa75d4a9a..c339cab7cd 100644 --- a/pkg/sentry/devices/nvproxy/nvproxy_test.go +++ b/pkg/sentry/devices/nvproxy/nvproxy_test.go @@ -51,25 +51,25 @@ func TestABIStructNamesInSync(t *testing.T) { for version, abiCons := range abis { t.Run(version.String(), func(t *testing.T) { abi := abiCons.cons() - structNames := abi.getStructNames() + structNames := abi.getStructs() for ioctl := range abi.frontendIoctl { - if _, ok := structNames.frontendNames[ioctl]; !ok { + if _, ok := structNames.frontendStructs[ioctl]; !ok { t.Errorf("Frontend ioctl %#x not found in struct names for version %v", ioctl, version.String()) } } for ioctl := range abi.uvmIoctl { - if _, ok := structNames.uvmNames[ioctl]; !ok { + if _, ok := structNames.uvmStructs[ioctl]; !ok { t.Errorf("UVM ioctl %#x not found in struct names for version %v", ioctl, version.String()) } } for ioctl := range abi.controlCmd { - if _, ok := structNames.controlNames[ioctl]; !ok { + if _, ok := structNames.controlStructs[ioctl]; !ok { t.Errorf("Control command %#x not found in struct names for version %v", ioctl, version.String()) } } for ioctl := range abi.allocationClass { - if _, ok := structNames.allocationNames[ioctl]; !ok { + if _, ok := structNames.allocationStructs[ioctl]; !ok { t.Errorf("Alloc class %#x not found in struct names for version %v", ioctl, version.String()) } } @@ -159,14 +159,14 @@ func TestHandlers(t *testing.T) { t.Run("control command", func(t *testing.T) { type controlCmdInput struct { fi *frontendIoctlState - params *nvgpu.NVOS54Parameters + params *nvgpu.NVOS54_PARAMETERS } testHandler( t, func(handler controlCmdHandler, input controlCmdInput) (uintptr, error) { return handler.handle(input.fi, input.params) }, - ctrlHandler(func(*frontendIoctlState, *nvgpu.NVOS54Parameters) (uintptr, error) { + ctrlHandler(func(*frontendIoctlState, *nvgpu.NVOS54_PARAMETERS) (uintptr, error) { return 42, nil }, capCompute), controlCmdInput{fi: capComputeState}, @@ -176,7 +176,7 @@ func TestHandlers(t *testing.T) { t.Run("allocation class", func(t *testing.T) { type allocClassInput struct { fi *frontendIoctlState - ioctlParams *nvgpu.NVOS64Parameters + ioctlParams *nvgpu.NVOS64_PARAMETERS isNVOS64 bool } testHandler( @@ -184,7 +184,7 @@ func TestHandlers(t *testing.T) { func(handler allocationClassHandler, input allocClassInput) (uintptr, error) { return handler.handle(input.fi, input.ioctlParams, input.isNVOS64) }, - allocHandler(func(*frontendIoctlState, *nvgpu.NVOS64Parameters, bool) (uintptr, error) { + allocHandler(func(*frontendIoctlState, *nvgpu.NVOS64_PARAMETERS, bool) (uintptr, error) { return 42, nil }, capCompute), allocClassInput{fi: capComputeState}, diff --git a/pkg/sentry/devices/nvproxy/object.go b/pkg/sentry/devices/nvproxy/object.go index 8a9a1bfd99..014fe0c591 100644 --- a/pkg/sentry/devices/nvproxy/object.go +++ b/pkg/sentry/devices/nvproxy/object.go @@ -282,12 +282,12 @@ func (nvp *nvproxy) enqueueCleanup(f func()) { // +stateify savable type capturedRmAllocParams struct { fd *frontendFD - ioctlParams nvgpu.NVOS64Parameters + ioctlParams nvgpu.NVOS64_PARAMETERS rightsRequested nvgpu.RS_ACCESS_MASK allocParams []byte } -func captureRmAllocParams[Params any](fd *frontendFD, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params) capturedRmAllocParams { +func captureRmAllocParams[Params any](fd *frontendFD, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params) capturedRmAllocParams { var allocParamsBuf []byte if allocParams != nil { if allocParamsMarshal, ok := any(allocParams).(marshal.Marshallable); ok { @@ -316,7 +316,7 @@ type rmAllocObject struct { params capturedRmAllocParams } -func newRmAllocObject[Params any](fd *frontendFD, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params) *rmAllocObject { +func newRmAllocObject[Params any](fd *frontendFD, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *Params) *rmAllocObject { return &rmAllocObject{ params: captureRmAllocParams(fd, ioctlParams, rightsRequested, allocParams), } @@ -351,7 +351,7 @@ type rootClient struct { params capturedRmAllocParams } -func newRootClient(fd *frontendFD, ioctlParams *nvgpu.NVOS64Parameters, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.Handle) *rootClient { +func newRootClient(fd *frontendFD, ioctlParams *nvgpu.NVOS64_PARAMETERS, rightsRequested nvgpu.RS_ACCESS_MASK, allocParams *nvgpu.Handle) *rootClient { return &rootClient{ resources: make(map[nvgpu.Handle]*object), params: captureRmAllocParams(fd, ioctlParams, rightsRequested, allocParams), diff --git a/pkg/sentry/devices/nvproxy/version.go b/pkg/sentry/devices/nvproxy/version.go index a8c3f70bcb..2194ac2898 100644 --- a/pkg/sentry/devices/nvproxy/version.go +++ b/pkg/sentry/devices/nvproxy/version.go @@ -100,9 +100,9 @@ func (v DriverVersion) isGreaterThan(other DriverVersion) bool { // This indirection exists to avoid memory usage from unused driver ABIs. type driverABIFunc func() *driverABI -// driverStructNamesFunc returns a mapping of struct names used by an ABI version. +// driverABIStructsFunc returns a mapping of struct names used by an ABI version. // This indirection exists to avoid the memory usage from struct name maps if they are not used. -type driverStructNamesFunc func() *driverStructNames +type driverABIStructsFunc func() *driverABIStructs // abiConAndChecksum couples the driver's abiConstructor to the SHA256 checksum of its linux .run // driver installer file from NVIDIA. @@ -129,17 +129,18 @@ type driverABI struct { controlCmd map[uint32]controlCmdHandler allocationClass map[nvgpu.ClassID]allocationClassHandler - getStructNames driverStructNamesFunc + getStructs driverABIStructsFunc } -// To help with verifying and supporting new driver versions, we want to keep -// track of all the driver structs that we currently support. We do so by mapping ioctl -// numbers to a list of DriverStructs used by that ioctl. -type driverStructNames struct { - frontendNames map[uint32][]DriverStruct - uvmNames map[uint32][]DriverStruct - controlNames map[uint32][]DriverStruct - allocationNames map[nvgpu.ClassID][]DriverStruct +// driverABIStructs defines all the structs used by a driverABI. This is used +// to help with verifying and supporting new driver versions. This helps keep +// track of all the driver structs that we currently support. We do so by +// mapping ioctl numbers to a list of DriverStructs used by that ioctl. +type driverABIStructs struct { + frontendStructs map[uint32][]DriverStruct + uvmStructs map[uint32][]DriverStruct + controlStructs map[uint32][]DriverStruct + allocationStructs map[nvgpu.ClassID][]DriverStruct } // DriverStructName is the name of a struct used by the Nvidia driver. @@ -182,11 +183,11 @@ func Init() { nvgpu.NV_ESC_ATTACH_GPUS_TO_FD: feHandler(frontendIoctlBytes, compUtil), // NvU32 array containing GPU IDs nvgpu.NV_ESC_SYS_PARAMS: feHandler(frontendIoctlSimple[nvgpu.IoctlSysParams], compUtil), nvgpu.NV_ESC_RM_DUP_OBJECT: feHandler(rmDupObject, compUtil), - nvgpu.NV_ESC_RM_SHARE: feHandler(frontendIoctlSimple[nvgpu.NVOS57Parameters], compUtil), - nvgpu.NV_ESC_RM_UNMAP_MEMORY: feHandler(frontendIoctlSimple[nvgpu.NVOS34Parameters], compUtil), - nvgpu.NV_ESC_RM_MAP_MEMORY_DMA: feHandler(frontendIoctlSimple[nvgpu.NVOS46Parameters], nvconf.CapGraphics), - nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA: feHandler(frontendIoctlSimple[nvgpu.NVOS47Parameters], nvconf.CapGraphics), - nvgpu.NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO: feHandler(frontendIoctlSimple[nvgpu.NVOS56Parameters], compUtil), + nvgpu.NV_ESC_RM_SHARE: feHandler(frontendIoctlSimple[nvgpu.NVOS57_PARAMETERS], compUtil), + nvgpu.NV_ESC_RM_UNMAP_MEMORY: feHandler(frontendIoctlSimple[nvgpu.NVOS34_PARAMETERS], compUtil), + nvgpu.NV_ESC_RM_MAP_MEMORY_DMA: feHandler(frontendIoctlSimple[nvgpu.NVOS46_PARAMETERS], nvconf.CapGraphics), + nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA: feHandler(frontendIoctlSimple[nvgpu.NVOS47_PARAMETERS], nvconf.CapGraphics), + nvgpu.NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO: feHandler(frontendIoctlSimple[nvgpu.NVOS56_PARAMETERS], compUtil), nvgpu.NV_ESC_REGISTER_FD: feHandler(frontendRegisterFD, compUtil), nvgpu.NV_ESC_ALLOC_OS_EVENT: feHandler(frontendIoctlHasFD[nvgpu.IoctlAllocOSEvent], compUtil), nvgpu.NV_ESC_FREE_OS_EVENT: feHandler(frontendIoctlHasFD[nvgpu.IoctlFreeOSEvent], compUtil), @@ -415,242 +416,242 @@ func Init() { nvgpu.HOPPER_SEC2_WORK_LAUNCH_A: allocHandler(rmAllocNoParams, compUtil), }, - getStructNames: func() *driverStructNames { - return &driverStructNames{ - frontendNames: map[uint32][]DriverStruct{ - nvgpu.NV_ESC_CARD_INFO: simpleIoctl("nv_ioctl_card_info_t"), - nvgpu.NV_ESC_CHECK_VERSION_STR: getStructName(nvgpu.RMAPIVersion{}), + getStructs: func() *driverABIStructs { + return &driverABIStructs{ + frontendStructs: map[uint32][]DriverStruct{ + nvgpu.NV_ESC_CARD_INFO: simpleDriverStruct("nv_ioctl_card_info_t"), + nvgpu.NV_ESC_CHECK_VERSION_STR: driverStructWithName(nvgpu.RMAPIVersion{}, "nv_ioctl_rm_api_version_t"), nvgpu.NV_ESC_ATTACH_GPUS_TO_FD: nil, // NvU32 array containing GPU IDs - nvgpu.NV_ESC_SYS_PARAMS: getStructName(nvgpu.IoctlSysParams{}), - nvgpu.NV_ESC_RM_DUP_OBJECT: getStructName(nvgpu.NVOS55Parameters{}), - nvgpu.NV_ESC_RM_SHARE: getStructName(nvgpu.NVOS57Parameters{}), - nvgpu.NV_ESC_RM_UNMAP_MEMORY: getStructName(nvgpu.NVOS34Parameters{}), - nvgpu.NV_ESC_RM_ALLOC_CONTEXT_DMA2: getStructName(nvgpu.NVOS39Parameters{}), - nvgpu.NV_ESC_RM_MAP_MEMORY_DMA: getStructName(nvgpu.NVOS46Parameters{}), - nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA: getStructName(nvgpu.NVOS47Parameters{}), - nvgpu.NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO: getStructName(nvgpu.NVOS56Parameters{}), - nvgpu.NV_ESC_REGISTER_FD: getStructName(nvgpu.IoctlRegisterFD{}), - nvgpu.NV_ESC_ALLOC_OS_EVENT: getStructName(nvgpu.IoctlAllocOSEvent{}), - nvgpu.NV_ESC_FREE_OS_EVENT: getStructName(nvgpu.IoctlFreeOSEvent{}), + nvgpu.NV_ESC_SYS_PARAMS: driverStructWithName(nvgpu.IoctlSysParams{}, "nv_ioctl_sys_params_t"), + nvgpu.NV_ESC_RM_DUP_OBJECT: driverStructs(nvgpu.NVOS55_PARAMETERS{}), + nvgpu.NV_ESC_RM_SHARE: driverStructs(nvgpu.NVOS57_PARAMETERS{}), + nvgpu.NV_ESC_RM_UNMAP_MEMORY: driverStructs(nvgpu.NVOS34_PARAMETERS{}), + nvgpu.NV_ESC_RM_ALLOC_CONTEXT_DMA2: driverStructs(nvgpu.NVOS39_PARAMETERS{}), + nvgpu.NV_ESC_RM_MAP_MEMORY_DMA: driverStructs(nvgpu.NVOS46_PARAMETERS{}), + nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA: driverStructs(nvgpu.NVOS47_PARAMETERS{}), + nvgpu.NV_ESC_RM_UPDATE_DEVICE_MAPPING_INFO: driverStructs(nvgpu.NVOS56_PARAMETERS{}), + nvgpu.NV_ESC_REGISTER_FD: driverStructWithName(nvgpu.IoctlRegisterFD{}, "nv_ioctl_register_fd_t"), + nvgpu.NV_ESC_ALLOC_OS_EVENT: driverStructWithName(nvgpu.IoctlAllocOSEvent{}, "nv_ioctl_alloc_os_event_t"), + nvgpu.NV_ESC_FREE_OS_EVENT: driverStructWithName(nvgpu.IoctlFreeOSEvent{}, "nv_ioctl_free_os_event_t"), nvgpu.NV_ESC_NUMA_INFO: nil, // nvproxy ignores this ioctl - nvgpu.NV_ESC_RM_ALLOC_MEMORY: getStructName(nvgpu.IoctlNVOS02ParametersWithFD{}), - nvgpu.NV_ESC_RM_FREE: getStructName(nvgpu.NVOS00Parameters{}), - nvgpu.NV_ESC_RM_CONTROL: getStructName(nvgpu.NVOS54Parameters{}), - nvgpu.NV_ESC_RM_ALLOC: append(getStructName(nvgpu.NVOS21Parameters{}), getStructName(nvgpu.NVOS64Parameters{})...), - nvgpu.NV_ESC_RM_IDLE_CHANNELS: getStructName(nvgpu.NVOS30Parameters{}), - nvgpu.NV_ESC_RM_VID_HEAP_CONTROL: getStructName(nvgpu.NVOS32Parameters{}), - nvgpu.NV_ESC_RM_MAP_MEMORY: getStructName(nvgpu.IoctlNVOS33ParametersWithFD{}), + nvgpu.NV_ESC_RM_ALLOC_MEMORY: driverStructWithName(nvgpu.IoctlNVOS02ParametersWithFD{}, "nv_ioctl_nvos02_parameters_with_fd"), + nvgpu.NV_ESC_RM_FREE: driverStructs(nvgpu.NVOS00_PARAMETERS{}), + nvgpu.NV_ESC_RM_CONTROL: driverStructs(nvgpu.NVOS54_PARAMETERS{}), + nvgpu.NV_ESC_RM_ALLOC: driverStructs(nvgpu.NVOS21_PARAMETERS{}, nvgpu.NVOS64_PARAMETERS{}), + nvgpu.NV_ESC_RM_IDLE_CHANNELS: driverStructs(nvgpu.NVOS30_PARAMETERS{}), + nvgpu.NV_ESC_RM_VID_HEAP_CONTROL: driverStructs(nvgpu.NVOS32_PARAMETERS{}), + nvgpu.NV_ESC_RM_MAP_MEMORY: driverStructWithName(nvgpu.IoctlNVOS33ParametersWithFD{}, "nv_ioctl_nvos33_parameters_with_fd"), }, - uvmNames: map[uint32][]DriverStruct{ - nvgpu.UVM_INITIALIZE: getStructName(nvgpu.UVM_INITIALIZE_PARAMS{}), + uvmStructs: map[uint32][]DriverStruct{ + nvgpu.UVM_INITIALIZE: driverStructs(nvgpu.UVM_INITIALIZE_PARAMS{}), nvgpu.UVM_DEINITIALIZE: nil, // Doesn't have any params - nvgpu.UVM_CREATE_RANGE_GROUP: getStructName(nvgpu.UVM_CREATE_RANGE_GROUP_PARAMS{}), - nvgpu.UVM_DESTROY_RANGE_GROUP: getStructName(nvgpu.UVM_DESTROY_RANGE_GROUP_PARAMS{}), - nvgpu.UVM_REGISTER_GPU_VASPACE: getStructName(nvgpu.UVM_REGISTER_GPU_VASPACE_PARAMS{}), - nvgpu.UVM_UNREGISTER_GPU_VASPACE: getStructName(nvgpu.UVM_UNREGISTER_GPU_VASPACE_PARAMS{}), - nvgpu.UVM_REGISTER_CHANNEL: getStructName(nvgpu.UVM_REGISTER_CHANNEL_PARAMS{}), - nvgpu.UVM_UNREGISTER_CHANNEL: getStructName(nvgpu.UVM_UNREGISTER_CHANNEL_PARAMS{}), - nvgpu.UVM_ENABLE_PEER_ACCESS: getStructName(nvgpu.UVM_ENABLE_PEER_ACCESS_PARAMS{}), - nvgpu.UVM_DISABLE_PEER_ACCESS: getStructName(nvgpu.UVM_DISABLE_PEER_ACCESS_PARAMS{}), - nvgpu.UVM_SET_RANGE_GROUP: getStructName(nvgpu.UVM_SET_RANGE_GROUP_PARAMS{}), - nvgpu.UVM_MAP_EXTERNAL_ALLOCATION: getStructName(nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS{}), - nvgpu.UVM_FREE: getStructName(nvgpu.UVM_FREE_PARAMS{}), - nvgpu.UVM_REGISTER_GPU: getStructName(nvgpu.UVM_REGISTER_GPU_PARAMS{}), - nvgpu.UVM_UNREGISTER_GPU: getStructName(nvgpu.UVM_UNREGISTER_GPU_PARAMS{}), - nvgpu.UVM_PAGEABLE_MEM_ACCESS: getStructName(nvgpu.UVM_PAGEABLE_MEM_ACCESS_PARAMS{}), - nvgpu.UVM_SET_PREFERRED_LOCATION: getStructName(nvgpu.UVM_SET_PREFERRED_LOCATION_PARAMS{}), - nvgpu.UVM_UNSET_PREFERRED_LOCATION: getStructName(nvgpu.UVM_UNSET_PREFERRED_LOCATION_PARAMS{}), - nvgpu.UVM_DISABLE_READ_DUPLICATION: getStructName(nvgpu.UVM_DISABLE_READ_DUPLICATION_PARAMS{}), - nvgpu.UVM_UNSET_ACCESSED_BY: getStructName(nvgpu.UVM_UNSET_ACCESSED_BY_PARAMS{}), - nvgpu.UVM_MIGRATE: getStructName(nvgpu.UVM_MIGRATE_PARAMS{}), - nvgpu.UVM_MIGRATE_RANGE_GROUP: getStructName(nvgpu.UVM_MIGRATE_RANGE_GROUP_PARAMS{}), - nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION: getStructName(nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS{}), - nvgpu.UVM_UNMAP_EXTERNAL: getStructName(nvgpu.UVM_UNMAP_EXTERNAL_PARAMS{}), - nvgpu.UVM_ALLOC_SEMAPHORE_POOL: getStructName(nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS{}), - nvgpu.UVM_VALIDATE_VA_RANGE: getStructName(nvgpu.UVM_VALIDATE_VA_RANGE_PARAMS{}), - nvgpu.UVM_CREATE_EXTERNAL_RANGE: getStructName(nvgpu.UVM_CREATE_EXTERNAL_RANGE_PARAMS{}), - nvgpu.UVM_MM_INITIALIZE: getStructName(nvgpu.UVM_MM_INITIALIZE_PARAMS{}), + nvgpu.UVM_CREATE_RANGE_GROUP: driverStructs(nvgpu.UVM_CREATE_RANGE_GROUP_PARAMS{}), + nvgpu.UVM_DESTROY_RANGE_GROUP: driverStructs(nvgpu.UVM_DESTROY_RANGE_GROUP_PARAMS{}), + nvgpu.UVM_REGISTER_GPU_VASPACE: driverStructs(nvgpu.UVM_REGISTER_GPU_VASPACE_PARAMS{}), + nvgpu.UVM_UNREGISTER_GPU_VASPACE: driverStructs(nvgpu.UVM_UNREGISTER_GPU_VASPACE_PARAMS{}), + nvgpu.UVM_REGISTER_CHANNEL: driverStructs(nvgpu.UVM_REGISTER_CHANNEL_PARAMS{}), + nvgpu.UVM_UNREGISTER_CHANNEL: driverStructs(nvgpu.UVM_UNREGISTER_CHANNEL_PARAMS{}), + nvgpu.UVM_ENABLE_PEER_ACCESS: driverStructs(nvgpu.UVM_ENABLE_PEER_ACCESS_PARAMS{}), + nvgpu.UVM_DISABLE_PEER_ACCESS: driverStructs(nvgpu.UVM_DISABLE_PEER_ACCESS_PARAMS{}), + nvgpu.UVM_SET_RANGE_GROUP: driverStructs(nvgpu.UVM_SET_RANGE_GROUP_PARAMS{}), + nvgpu.UVM_MAP_EXTERNAL_ALLOCATION: driverStructs(nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS{}), + nvgpu.UVM_FREE: driverStructs(nvgpu.UVM_FREE_PARAMS{}), + nvgpu.UVM_REGISTER_GPU: driverStructs(nvgpu.UVM_REGISTER_GPU_PARAMS{}), + nvgpu.UVM_UNREGISTER_GPU: driverStructs(nvgpu.UVM_UNREGISTER_GPU_PARAMS{}), + nvgpu.UVM_PAGEABLE_MEM_ACCESS: driverStructs(nvgpu.UVM_PAGEABLE_MEM_ACCESS_PARAMS{}), + nvgpu.UVM_SET_PREFERRED_LOCATION: driverStructs(nvgpu.UVM_SET_PREFERRED_LOCATION_PARAMS{}), + nvgpu.UVM_UNSET_PREFERRED_LOCATION: driverStructs(nvgpu.UVM_UNSET_PREFERRED_LOCATION_PARAMS{}), + nvgpu.UVM_DISABLE_READ_DUPLICATION: driverStructs(nvgpu.UVM_DISABLE_READ_DUPLICATION_PARAMS{}), + nvgpu.UVM_UNSET_ACCESSED_BY: driverStructs(nvgpu.UVM_UNSET_ACCESSED_BY_PARAMS{}), + nvgpu.UVM_MIGRATE: driverStructs(nvgpu.UVM_MIGRATE_PARAMS{}), + nvgpu.UVM_MIGRATE_RANGE_GROUP: driverStructs(nvgpu.UVM_MIGRATE_RANGE_GROUP_PARAMS{}), + nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION: driverStructs(nvgpu.UVM_MAP_DYNAMIC_PARALLELISM_REGION_PARAMS{}), + nvgpu.UVM_UNMAP_EXTERNAL: driverStructs(nvgpu.UVM_UNMAP_EXTERNAL_PARAMS{}), + nvgpu.UVM_ALLOC_SEMAPHORE_POOL: driverStructs(nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS{}), + nvgpu.UVM_VALIDATE_VA_RANGE: driverStructs(nvgpu.UVM_VALIDATE_VA_RANGE_PARAMS{}), + nvgpu.UVM_CREATE_EXTERNAL_RANGE: driverStructs(nvgpu.UVM_CREATE_EXTERNAL_RANGE_PARAMS{}), + nvgpu.UVM_MM_INITIALIZE: driverStructs(nvgpu.UVM_MM_INITIALIZE_PARAMS{}), }, - controlNames: map[uint32][]DriverStruct{ - nvgpu.NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE: simpleIoctl("NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS"), - nvgpu.NV0000_CTRL_CMD_CLIENT_SET_INHERITED_SHARE_POLICY: simpleIoctl("NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_ATTACHED_IDS: simpleIoctl("NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_DEVICE_IDS: simpleIoctl("NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2: simpleIoctl("NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_PROBED_IDS: simpleIoctl("NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_ATTACH_IDS: simpleIoctl("NV0000_CTRL_GPU_ATTACH_IDS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_DETACH_IDS: simpleIoctl("NV0000_CTRL_GPU_DETACH_IDS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_PCI_INFO: simpleIoctl("NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_UUID_FROM_GPU_ID: simpleIoctl("NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE: simpleIoctl("NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE: simpleIoctl("NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GSYNC_GET_ATTACHED_IDS: simpleIoctl("NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_SYNC_GPU_BOOST_GROUP_INFO: simpleIoctl("NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS"), - nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_CPU_INFO: simpleIoctl("NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS"), - nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_V2: simpleIoctl("NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS"), - nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS: simpleIoctl("NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX: simpleIoctl("NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS"), - nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FEATURES: simpleIoctl("NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS"), - nvgpu.NV0080_CTRL_CMD_DMA_ADV_SCHED_GET_VA_CAPS: simpleIoctl("NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS"), - nvgpu.NV0080_CTRL_CMD_DMA_GET_CAPS: simpleIoctl("NV0080_CTRL_DMA_GET_CAPS_PARAMS"), - nvgpu.NV0080_CTRL_CMD_FB_GET_CAPS_V2: simpleIoctl("NV0080_CTRL_FB_GET_CAPS_V2_PARAMS"), - nvgpu.NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES: simpleIoctl("NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS"), - nvgpu.NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE: simpleIoctl("NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS"), - nvgpu.NV0080_CTRL_CMD_GPU_GET_VIRTUALIZATION_MODE: simpleIoctl("NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS"), + controlStructs: map[uint32][]DriverStruct{ + nvgpu.NV0000_CTRL_CMD_CLIENT_GET_ADDR_SPACE_TYPE: simpleDriverStruct("NV0000_CTRL_CLIENT_GET_ADDR_SPACE_TYPE_PARAMS"), + nvgpu.NV0000_CTRL_CMD_CLIENT_SET_INHERITED_SHARE_POLICY: simpleDriverStruct("NV0000_CTRL_CLIENT_SET_INHERITED_SHARE_POLICY_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_ATTACHED_IDS: simpleDriverStruct("NV0000_CTRL_GPU_GET_ATTACHED_IDS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_DEVICE_IDS: simpleDriverStruct("NV0000_CTRL_GPU_GET_DEVICE_IDS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO_V2: simpleDriverStruct("NV0000_CTRL_GPU_GET_ID_INFO_V2_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_PROBED_IDS: simpleDriverStruct("NV0000_CTRL_GPU_GET_PROBED_IDS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_ATTACH_IDS: simpleDriverStruct("NV0000_CTRL_GPU_ATTACH_IDS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_DETACH_IDS: simpleDriverStruct("NV0000_CTRL_GPU_DETACH_IDS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_PCI_INFO: simpleDriverStruct("NV0000_CTRL_GPU_GET_PCI_INFO_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_UUID_FROM_GPU_ID: simpleDriverStruct("NV0000_CTRL_GPU_GET_UUID_FROM_GPU_ID_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_QUERY_DRAIN_STATE: simpleDriverStruct("NV0000_CTRL_GPU_QUERY_DRAIN_STATE_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_MEMOP_ENABLE: simpleDriverStruct("NV0000_CTRL_GPU_GET_MEMOP_ENABLE_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GSYNC_GET_ATTACHED_IDS: simpleDriverStruct("NV0000_CTRL_GSYNC_GET_ATTACHED_IDS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_SYNC_GPU_BOOST_GROUP_INFO: simpleDriverStruct("NV0000_SYNC_GPU_BOOST_GROUP_INFO_PARAMS"), + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_CPU_INFO: simpleDriverStruct("NV0000_CTRL_SYSTEM_GET_CPU_INFO_PARAMS"), + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_V2: simpleDriverStruct("NV0000_CTRL_SYSTEM_GET_P2P_CAPS_V2_PARAMS"), + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FABRIC_STATUS: simpleDriverStruct("NV0000_CTRL_SYSTEM_GET_FABRIC_STATUS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS_MATRIX: simpleDriverStruct("NV0000_CTRL_SYSTEM_GET_P2P_CAPS_MATRIX_PARAMS"), + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_FEATURES: simpleDriverStruct("NV0000_CTRL_SYSTEM_GET_FEATURES_PARAMS"), + nvgpu.NV0080_CTRL_CMD_DMA_ADV_SCHED_GET_VA_CAPS: simpleDriverStruct("NV0080_CTRL_DMA_ADV_SCHED_GET_VA_CAPS_PARAMS"), + nvgpu.NV0080_CTRL_CMD_DMA_GET_CAPS: simpleDriverStruct("NV0080_CTRL_DMA_GET_CAPS_PARAMS"), + nvgpu.NV0080_CTRL_CMD_FB_GET_CAPS_V2: simpleDriverStruct("NV0080_CTRL_FB_GET_CAPS_V2_PARAMS"), + nvgpu.NV0080_CTRL_CMD_GPU_GET_NUM_SUBDEVICES: simpleDriverStruct("NV0080_CTRL_GPU_GET_NUM_SUBDEVICES_PARAMS"), + nvgpu.NV0080_CTRL_CMD_GPU_QUERY_SW_STATE_PERSISTENCE: simpleDriverStruct("NV0080_CTRL_GPU_QUERY_SW_STATE_PERSISTENCE_PARAMS"), + nvgpu.NV0080_CTRL_CMD_GPU_GET_VIRTUALIZATION_MODE: simpleDriverStruct("NV0080_CTRL_GPU_GET_VIRTUALIZATION_MODE_PARAMS"), 0x80028b: nil, // unknown, paramsSize == 1 - nvgpu.NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2: simpleIoctl("NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS"), - nvgpu.NV0080_CTRL_CMD_HOST_GET_CAPS_V2: simpleIoctl("NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS"), - nvgpu.NV0080_CTRL_CMD_BSP_GET_CAPS_V2: simpleIoctl("NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2"), - nvgpu.NV0080_CTRL_CMD_FIFO_GET_ENGINE_CONTEXT_PROPERTIES: simpleIoctl("NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS"), - nvgpu.NV00F8_CTRL_CMD_ATTACH_MEM: simpleIoctl("NV00F8_CTRL_ATTACH_MEM_PARAMS"), - nvgpu.NV00FD_CTRL_CMD_GET_INFO: simpleIoctl("NV00FD_CTRL_GET_INFO_PARAMS"), - nvgpu.NV00FD_CTRL_CMD_ATTACH_MEM: simpleIoctl("NV00FD_CTRL_ATTACH_MEM_PARAMS"), - nvgpu.NV00FD_CTRL_CMD_DETACH_MEM: simpleIoctl("NV00FD_CTRL_DETACH_MEM_PARAMS"), - nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_INFO: simpleIoctl("NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO: simpleIoctl("NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_BUS_GET_INFO_V2: simpleIoctl("NV2080_CTRL_BUS_GET_INFO_V2_PARAMS"), - nvgpu.NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS: simpleIoctl("NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_BUS_GET_C2C_INFO: simpleIoctl("NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_CE_GET_CE_PCE_MASK: simpleIoctl("NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS"), - nvgpu.NV2080_CTRL_CMD_CE_GET_CAPS_V2: simpleIoctl("NV2080_CTRL_CE_GET_CAPS_V2_PARAMS"), + nvgpu.NV0080_CTRL_CMD_GPU_GET_CLASSLIST_V2: simpleDriverStruct("NV0080_CTRL_GPU_GET_CLASSLIST_V2_PARAMS"), + nvgpu.NV0080_CTRL_CMD_HOST_GET_CAPS_V2: simpleDriverStruct("NV0080_CTRL_HOST_GET_CAPS_V2_PARAMS"), + nvgpu.NV0080_CTRL_CMD_BSP_GET_CAPS_V2: simpleDriverStruct("NV0080_CTRL_BSP_GET_CAPS_PARAMS_V2"), + nvgpu.NV0080_CTRL_CMD_FIFO_GET_ENGINE_CONTEXT_PROPERTIES: simpleDriverStruct("NV0080_CTRL_FIFO_GET_ENGINE_CONTEXT_PROPERTIES_PARAMS"), + nvgpu.NV00F8_CTRL_CMD_ATTACH_MEM: simpleDriverStruct("NV00F8_CTRL_ATTACH_MEM_PARAMS"), + nvgpu.NV00FD_CTRL_CMD_GET_INFO: simpleDriverStruct("NV00FD_CTRL_GET_INFO_PARAMS"), + nvgpu.NV00FD_CTRL_CMD_ATTACH_MEM: simpleDriverStruct("NV00FD_CTRL_ATTACH_MEM_PARAMS"), + nvgpu.NV00FD_CTRL_CMD_DETACH_MEM: simpleDriverStruct("NV00FD_CTRL_DETACH_MEM_PARAMS"), + nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_INFO: simpleDriverStruct("NV2080_CTRL_BUS_GET_PCI_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_BUS_GET_PCI_BAR_INFO: simpleDriverStruct("NV2080_CTRL_BUS_GET_PCI_BAR_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_BUS_GET_INFO_V2: simpleDriverStruct("NV2080_CTRL_BUS_GET_INFO_V2_PARAMS"), + nvgpu.NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS: simpleDriverStruct("NV2080_CTRL_CMD_BUS_GET_PCIE_SUPPORTED_GPU_ATOMICS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_BUS_GET_C2C_INFO: simpleDriverStruct("NV2080_CTRL_CMD_BUS_GET_C2C_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_CE_GET_CE_PCE_MASK: simpleDriverStruct("NV2080_CTRL_CE_GET_CE_PCE_MASK_PARAMS"), + nvgpu.NV2080_CTRL_CMD_CE_GET_CAPS_V2: simpleDriverStruct("NV2080_CTRL_CE_GET_CAPS_V2_PARAMS"), 0x20810107: nil, // unknown, paramsSize == TODO(ayushranjan) - nvgpu.NV2080_CTRL_CMD_CE_GET_ALL_CAPS: simpleIoctl("NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_EVENT_SET_NOTIFICATION: simpleIoctl("NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS"), - nvgpu.NV2080_CTRL_CMD_FB_GET_INFO_V2: simpleIoctl("NV2080_CTRL_FB_GET_INFO_V2_PARAMS"), - nvgpu.NV2080_CTRL_CMD_FB_GET_GPU_CACHE_INFO: simpleIoctl("NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO: simpleIoctl("NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_FB_GET_SEMAPHORE_SURFACE_LAYOUT: simpleIoctl("NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_INFO_V2: simpleIoctl("NV2080_CTRL_GPU_GET_INFO_V2_PARAMS"), - nvgpu.NV2080_CTRL_CMD_FLCN_GET_CTX_BUFFER_SIZE: simpleIoctl("NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_NAME_STRING: simpleIoctl("NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING: simpleIoctl("NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_SIMULATION_INFO: simpleIoctl("NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS: simpleIoctl("NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_QUERY_COMPUTE_MODE_RULES: simpleIoctl("NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_ID: simpleIoctl("NV2080_CTRL_GPU_GET_ID_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_QUERY_ECC_CONFIGURATION: simpleIoctl("NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_OEM_BOARD_INFO: simpleIoctl("NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_CE_GET_ALL_CAPS: simpleDriverStruct("NV2080_CTRL_CE_GET_ALL_CAPS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_EVENT_SET_NOTIFICATION: simpleDriverStruct("NV2080_CTRL_EVENT_SET_NOTIFICATION_PARAMS"), + nvgpu.NV2080_CTRL_CMD_FB_GET_INFO_V2: simpleDriverStruct("NV2080_CTRL_FB_GET_INFO_V2_PARAMS"), + nvgpu.NV2080_CTRL_CMD_FB_GET_GPU_CACHE_INFO: simpleDriverStruct("NV2080_CTRL_FB_GET_GPU_CACHE_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO: simpleDriverStruct("NV2080_CTRL_CMD_FB_GET_FB_REGION_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_FB_GET_SEMAPHORE_SURFACE_LAYOUT: simpleDriverStruct("NV2080_CTRL_FB_GET_SEMAPHORE_SURFACE_LAYOUT_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_INFO_V2: simpleDriverStruct("NV2080_CTRL_GPU_GET_INFO_V2_PARAMS"), + nvgpu.NV2080_CTRL_CMD_FLCN_GET_CTX_BUFFER_SIZE: simpleDriverStruct("NV2080_CTRL_FLCN_GET_CTX_BUFFER_SIZE_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_NAME_STRING: simpleDriverStruct("NV2080_CTRL_GPU_GET_NAME_STRING_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_SHORT_NAME_STRING: simpleDriverStruct("NV2080_CTRL_GPU_GET_SHORT_NAME_STRING_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_SIMULATION_INFO: simpleDriverStruct("NV2080_CTRL_GPU_GET_SIMULATION_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_QUERY_ECC_STATUS: simpleDriverStruct("NV2080_CTRL_GPU_QUERY_ECC_STATUS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_QUERY_COMPUTE_MODE_RULES: simpleDriverStruct("NV2080_CTRL_GPU_QUERY_COMPUTE_MODE_RULES_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_ID: simpleDriverStruct("NV2080_CTRL_GPU_GET_ID_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_QUERY_ECC_CONFIGURATION: simpleDriverStruct("NV2080_CTRL_GPU_QUERY_ECC_CONFIGURATION_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_OEM_BOARD_INFO: simpleDriverStruct("NV2080_CTRL_GPU_GET_OEM_BOARD_INFO_PARAMS"), nvgpu.NV2080_CTRL_CMD_GPU_ACQUIRE_COMPUTE_MODE_RESERVATION: nil, // undocumented; paramSize == 0 nvgpu.NV2080_CTRL_CMD_GPU_RELEASE_COMPUTE_MODE_RESERVATION: nil, // undocumented; paramSize == 0 - nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINE_PARTNERLIST: simpleIoctl("NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_GID_INFO: simpleIoctl("NV2080_CTRL_GPU_GET_GID_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_INFOROM_OBJECT_VERSION: simpleIoctl("NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_INFOROM_IMAGE_VERSION: simpleIoctl("NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINE_PARTNERLIST: simpleDriverStruct("NV2080_CTRL_GPU_GET_ENGINE_PARTNERLIST_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_GID_INFO: simpleDriverStruct("NV2080_CTRL_GPU_GET_GID_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_INFOROM_OBJECT_VERSION: simpleDriverStruct("NV2080_CTRL_GPU_GET_INFOROM_OBJECT_VERSION_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_INFOROM_IMAGE_VERSION: simpleDriverStruct("NV2080_CTRL_GPU_GET_INFOROM_IMAGE_VERSION_PARAMS"), nvgpu.NV2080_CTRL_CMD_GPU_QUERY_INFOROM_ECC_SUPPORT: nil, // No params. - nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINES_V2: simpleIoctl("NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS: simpleIoctl("NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_PIDS: simpleIoctl("NV2080_CTRL_GPU_GET_PIDS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_PID_INFO: simpleIoctl("NV2080_CTRL_GPU_GET_PID_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GPU_GET_COMPUTE_POLICY_CONFIG: simpleIoctl("NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO: simpleIoctl("NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_GET_ZCULL_INFO: simpleIoctl("NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_CTXSW_ZCULL_BIND: simpleIoctl("NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_SET_CTXSW_PREEMPTION_MODE: simpleIoctl("NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_GET_CTX_BUFFER_SIZE: simpleIoctl("NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER: simpleIoctl("NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_GET_CAPS_V2: simpleIoctl("NV2080_CTRL_GR_GET_CAPS_V2_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_GET_GPC_MASK: simpleIoctl("NV2080_CTRL_GR_GET_GPC_MASK_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_GET_TPC_MASK: simpleIoctl("NV2080_CTRL_GR_GET_TPC_MASK_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GR_GET_SM_ISSUE_RATE_MODIFIER: simpleIoctl("NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GRMGR_GET_GR_FS_INFO: simpleIoctl("NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_GSP_GET_FEATURES: simpleIoctl("NV2080_CTRL_GSP_GET_FEATURES_PARAMS"), - nvgpu.NV2080_CTRL_CMD_MC_GET_ARCH_INFO: simpleIoctl("NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_MC_SERVICE_INTERRUPTS: simpleIoctl("NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS: simpleIoctl("NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS: simpleIoctl("NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS"), - nvgpu.NV2080_CTRL_CMD_PERF_BOOST: simpleIoctl("NV2080_CTRL_PERF_BOOST_PARAMS"), - nvgpu.NV2080_CTRL_CMD_RC_GET_WATCHDOG_INFO: simpleIoctl("NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINES_V2: simpleDriverStruct("NV2080_CTRL_GPU_GET_ENGINES_V2_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_ACTIVE_PARTITION_IDS: simpleDriverStruct("NV2080_CTRL_GPU_GET_ACTIVE_PARTITION_IDS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_PIDS: simpleDriverStruct("NV2080_CTRL_GPU_GET_PIDS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_PID_INFO: simpleDriverStruct("NV2080_CTRL_GPU_GET_PID_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GPU_GET_COMPUTE_POLICY_CONFIG: simpleDriverStruct("NV2080_CTRL_GPU_GET_COMPUTE_POLICY_CONFIG_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO: simpleDriverStruct("NV2080_CTRL_CMD_GET_GPU_FABRIC_PROBE_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_GET_ZCULL_INFO: simpleDriverStruct("NV2080_CTRL_GR_GET_ZCULL_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_CTXSW_ZCULL_BIND: simpleDriverStruct("NV2080_CTRL_GR_CTXSW_ZCULL_BIND_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_SET_CTXSW_PREEMPTION_MODE: simpleDriverStruct("NV2080_CTRL_GR_SET_CTXSW_PREEMPTION_MODE_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_GET_CTX_BUFFER_SIZE: simpleDriverStruct("NV2080_CTRL_GR_GET_CTX_BUFFER_SIZE_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_GET_GLOBAL_SM_ORDER: simpleDriverStruct("NV2080_CTRL_GR_GET_GLOBAL_SM_ORDER_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_GET_CAPS_V2: simpleDriverStruct("NV2080_CTRL_GR_GET_CAPS_V2_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_GET_GPC_MASK: simpleDriverStruct("NV2080_CTRL_GR_GET_GPC_MASK_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_GET_TPC_MASK: simpleDriverStruct("NV2080_CTRL_GR_GET_TPC_MASK_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GR_GET_SM_ISSUE_RATE_MODIFIER: simpleDriverStruct("NV2080_CTRL_GR_GET_SM_ISSUE_RATE_MODIFIER_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GRMGR_GET_GR_FS_INFO: simpleDriverStruct("NV2080_CTRL_GRMGR_GET_GR_FS_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_GSP_GET_FEATURES: simpleDriverStruct("NV2080_CTRL_GSP_GET_FEATURES_PARAMS"), + nvgpu.NV2080_CTRL_CMD_MC_GET_ARCH_INFO: simpleDriverStruct("NV2080_CTRL_MC_GET_ARCH_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_MC_SERVICE_INTERRUPTS: simpleDriverStruct("NV2080_CTRL_MC_SERVICE_INTERRUPTS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS: simpleDriverStruct("NV2080_CTRL_CMD_NVLINK_GET_NVLINK_CAPS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS: simpleDriverStruct("NV2080_CTRL_CMD_NVLINK_GET_NVLINK_STATUS_PARAMS"), + nvgpu.NV2080_CTRL_CMD_PERF_BOOST: simpleDriverStruct("NV2080_CTRL_PERF_BOOST_PARAMS"), + nvgpu.NV2080_CTRL_CMD_RC_GET_WATCHDOG_INFO: simpleDriverStruct("NV2080_CTRL_RC_GET_WATCHDOG_INFO_PARAMS"), nvgpu.NV2080_CTRL_CMD_RC_RELEASE_WATCHDOG_REQUESTS: nil, // No params. nvgpu.NV2080_CTRL_CMD_RC_SOFT_DISABLE_WATCHDOG: nil, // No params. - nvgpu.NV2080_CTRL_CMD_TIMER_GET_TIME: simpleIoctl("NV2080_CTRL_TIMER_GET_TIME_PARAMS"), - nvgpu.NV2080_CTRL_CMD_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO: simpleIoctl("NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ: simpleIoctl("NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS"), - nvgpu.NV503C_CTRL_CMD_REGISTER_VIDMEM: simpleIoctl("NV503C_CTRL_REGISTER_VIDMEM_PARAMS"), - nvgpu.NV503C_CTRL_CMD_UNREGISTER_VIDMEM: simpleIoctl("NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS"), - nvgpu.NV83DE_CTRL_CMD_DEBUG_SET_EXCEPTION_MASK: simpleIoctl("NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS"), - nvgpu.NV83DE_CTRL_CMD_DEBUG_READ_ALL_SM_ERROR_STATES: simpleIoctl("NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS"), - nvgpu.NV83DE_CTRL_CMD_DEBUG_CLEAR_ALL_SM_ERROR_STATES: simpleIoctl("NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS"), - nvgpu.NV906F_CTRL_GET_CLASS_ENGINEID: simpleIoctl("NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS"), - nvgpu.NV906F_CTRL_CMD_RESET_CHANNEL: simpleIoctl("NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS"), - nvgpu.NV9096_CTRL_CMD_GET_ZBC_CLEAR_TABLE_SIZE: simpleIoctl("NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS"), - nvgpu.NV9096_CTRL_CMD_GET_ZBC_CLEAR_TABLE_ENTRY: simpleIoctl("NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS"), - nvgpu.NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK: simpleIoctl("NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS"), - nvgpu.NVC36F_CTRL_GET_CLASS_ENGINEID: simpleIoctl("NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS"), - nvgpu.NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN: simpleIoctl("NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS"), - nvgpu.NVC36F_CTRL_CMD_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX: simpleIoctl("NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS"), - nvgpu.NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES: simpleIoctl("NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS"), - nvgpu.NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE: simpleIoctl("NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS"), - nvgpu.NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS: simpleIoctl("NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS"), - nvgpu.NVA06C_CTRL_CMD_GPFIFO_SCHEDULE: simpleIoctl("NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS"), - nvgpu.NVA06C_CTRL_CMD_SET_TIMESLICE: simpleIoctl("NVA06C_CTRL_SET_TIMESLICE_PARAMS"), - nvgpu.NVA06C_CTRL_CMD_PREEMPT: simpleIoctl("NVA06C_CTRL_PREEMPT_PARAMS"), - nvgpu.NVA06F_CTRL_CMD_GPFIFO_SCHEDULE: simpleIoctl("NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS"), - nvgpu.NVA06F_CTRL_CMD_BIND: simpleIoctl("NVA06F_CTRL_BIND_PARAMS"), - nvgpu.NVC56F_CTRL_CMD_GET_KMB: simpleIoctl("NVC56F_CTRL_CMD_GET_KMB_PARAMS"), - nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO: getStructName(nvgpu.NV0000_CTRL_GPU_GET_ID_INFO_PARAMS{}), - nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION: getStructName(nvgpu.NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS{}), - nvgpu.NV0080_CTRL_CMD_GPU_GET_CLASSLIST: driverStructWith(nvgpu.RmapiParamNvU32List{}, "NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS"), - nvgpu.NV0080_CTRL_CMD_GR_GET_CAPS: driverStructWith(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_GR_GET_CAPS_PARAMS"), - nvgpu.NV0080_CTRL_CMD_GR_GET_INFO: driverStructWith(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV0080_CTRL_GR_GET_INFO_PARAMS"), - nvgpu.NV0080_CTRL_CMD_FB_GET_CAPS: driverStructWith(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_FB_GET_CAPS_PARAMS"), - nvgpu.NV0080_CTRL_CMD_FIFO_GET_CAPS: driverStructWith(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_FIFO_GET_CAPS_PARAMS"), - nvgpu.NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST: getStructName(nvgpu.NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS{}), - nvgpu.NV0080_CTRL_CMD_MSENC_GET_CAPS: driverStructWith(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_MSENC_GET_CAPS_PARAMS"), - nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS: getStructName(nvgpu.NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS{}), - nvgpu.NV0000_CTRL_CMD_OS_UNIX_EXPORT_OBJECT_TO_FD: getStructName(nvgpu.NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS{}), - nvgpu.NV0000_CTRL_CMD_OS_UNIX_IMPORT_OBJECT_FROM_FD: getStructName(nvgpu.NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS{}), - nvgpu.NV0000_CTRL_CMD_OS_UNIX_GET_EXPORT_OBJECT_INFO: getStructName(nvgpu.NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS{}), - nvgpu.NV0041_CTRL_CMD_GET_SURFACE_INFO: driverStructWith(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV0041_CTRL_GET_SURFACE_INFO_PARAMS"), - nvgpu.NV00FD_CTRL_CMD_ATTACH_GPU: getStructName(nvgpu.NV00FD_CTRL_ATTACH_GPU_PARAMS{}), - nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINES: driverStructWith(nvgpu.RmapiParamNvU32List{}, "NV2080_CTRL_GPU_GET_ENGINES_PARAMS"), - nvgpu.NV2080_CTRL_CMD_BIOS_GET_INFO: driverStructWith(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV2080_CTRL_BIOS_GET_INFO_PARAMS"), - nvgpu.NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS: getStructName(nvgpu.NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS{}), - nvgpu.NV2080_CTRL_CMD_GR_GET_INFO: getStructName(nvgpu.NV2080_CTRL_GR_GET_INFO_PARAMS{}), - nvgpu.NV2080_CTRL_CMD_FB_GET_INFO: driverStructWith(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV2080_CTRL_FB_GET_INFO_PARAMS"), - nvgpu.NV503C_CTRL_CMD_REGISTER_VA_SPACE: getStructName(nvgpu.NV503C_CTRL_REGISTER_VA_SPACE_PARAMS{}), + nvgpu.NV2080_CTRL_CMD_TIMER_GET_TIME: simpleDriverStruct("NV2080_CTRL_TIMER_GET_TIME_PARAMS"), + nvgpu.NV2080_CTRL_CMD_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO: simpleDriverStruct("NV2080_CTRL_TIMER_GET_GPU_CPU_TIME_CORRELATION_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ: simpleDriverStruct("NV2080_CTRL_CMD_TIMER_SET_GR_TICK_FREQ_PARAMS"), + nvgpu.NV503C_CTRL_CMD_REGISTER_VIDMEM: simpleDriverStruct("NV503C_CTRL_REGISTER_VIDMEM_PARAMS"), + nvgpu.NV503C_CTRL_CMD_UNREGISTER_VIDMEM: simpleDriverStruct("NV503C_CTRL_UNREGISTER_VIDMEM_PARAMS"), + nvgpu.NV83DE_CTRL_CMD_DEBUG_SET_EXCEPTION_MASK: simpleDriverStruct("NV83DE_CTRL_DEBUG_SET_EXCEPTION_MASK_PARAMS"), + nvgpu.NV83DE_CTRL_CMD_DEBUG_READ_ALL_SM_ERROR_STATES: simpleDriverStruct("NV83DE_CTRL_DEBUG_READ_ALL_SM_ERROR_STATES_PARAMS"), + nvgpu.NV83DE_CTRL_CMD_DEBUG_CLEAR_ALL_SM_ERROR_STATES: simpleDriverStruct("NV83DE_CTRL_DEBUG_CLEAR_ALL_SM_ERROR_STATES_PARAMS"), + nvgpu.NV906F_CTRL_GET_CLASS_ENGINEID: simpleDriverStruct("NV906F_CTRL_GET_CLASS_ENGINEID_PARAMS"), + nvgpu.NV906F_CTRL_CMD_RESET_CHANNEL: simpleDriverStruct("NV906F_CTRL_CMD_RESET_CHANNEL_PARAMS"), + nvgpu.NV9096_CTRL_CMD_GET_ZBC_CLEAR_TABLE_SIZE: simpleDriverStruct("NV9096_CTRL_GET_ZBC_CLEAR_TABLE_SIZE_PARAMS"), + nvgpu.NV9096_CTRL_CMD_GET_ZBC_CLEAR_TABLE_ENTRY: simpleDriverStruct("NV9096_CTRL_GET_ZBC_CLEAR_TABLE_ENTRY_PARAMS"), + nvgpu.NV90E6_CTRL_CMD_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK: simpleDriverStruct("NV90E6_CTRL_MASTER_GET_VIRTUAL_FUNCTION_ERROR_CONT_INTR_MASK_PARAMS"), + nvgpu.NVC36F_CTRL_GET_CLASS_ENGINEID: simpleDriverStruct("NVC36F_CTRL_GET_CLASS_ENGINEID_PARAMS"), + nvgpu.NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN: simpleDriverStruct("NVC36F_CTRL_CMD_GPFIFO_GET_WORK_SUBMIT_TOKEN_PARAMS"), + nvgpu.NVC36F_CTRL_CMD_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX: simpleDriverStruct("NVC36F_CTRL_GPFIFO_SET_WORK_SUBMIT_TOKEN_NOTIF_INDEX_PARAMS"), + nvgpu.NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES: simpleDriverStruct("NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_CAPABILITIES_PARAMS"), + nvgpu.NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE: simpleDriverStruct("NV_CONF_COMPUTE_CTRL_CMD_SYSTEM_GET_GPUS_STATE_PARAMS"), + nvgpu.NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS: simpleDriverStruct("NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_NUM_SECURE_CHANNELS_PARAMS"), + nvgpu.NVA06C_CTRL_CMD_GPFIFO_SCHEDULE: simpleDriverStruct("NVA06C_CTRL_GPFIFO_SCHEDULE_PARAMS"), + nvgpu.NVA06C_CTRL_CMD_SET_TIMESLICE: simpleDriverStruct("NVA06C_CTRL_SET_TIMESLICE_PARAMS"), + nvgpu.NVA06C_CTRL_CMD_PREEMPT: simpleDriverStruct("NVA06C_CTRL_PREEMPT_PARAMS"), + nvgpu.NVA06F_CTRL_CMD_GPFIFO_SCHEDULE: simpleDriverStruct("NVA06F_CTRL_GPFIFO_SCHEDULE_PARAMS"), + nvgpu.NVA06F_CTRL_CMD_BIND: simpleDriverStruct("NVA06F_CTRL_BIND_PARAMS"), + nvgpu.NVC56F_CTRL_CMD_GET_KMB: simpleDriverStruct("NVC56F_CTRL_CMD_GET_KMB_PARAMS"), + nvgpu.NV0000_CTRL_CMD_GPU_GET_ID_INFO: driverStructs(nvgpu.NV0000_CTRL_GPU_GET_ID_INFO_PARAMS{}), + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_BUILD_VERSION: driverStructs(nvgpu.NV0000_CTRL_SYSTEM_GET_BUILD_VERSION_PARAMS{}), + nvgpu.NV0080_CTRL_CMD_GPU_GET_CLASSLIST: driverStructWithName(nvgpu.RmapiParamNvU32List{}, "NV0080_CTRL_GPU_GET_CLASSLIST_PARAMS"), + nvgpu.NV0080_CTRL_CMD_GR_GET_CAPS: driverStructWithName(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_GR_GET_CAPS_PARAMS"), + nvgpu.NV0080_CTRL_CMD_GR_GET_INFO: driverStructWithName(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV0080_CTRL_GR_GET_INFO_PARAMS"), + nvgpu.NV0080_CTRL_CMD_FB_GET_CAPS: driverStructWithName(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_FB_GET_CAPS_PARAMS"), + nvgpu.NV0080_CTRL_CMD_FIFO_GET_CAPS: driverStructWithName(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_FIFO_GET_CAPS_PARAMS"), + nvgpu.NV0080_CTRL_CMD_FIFO_GET_CHANNELLIST: driverStructs(nvgpu.NV0080_CTRL_FIFO_GET_CHANNELLIST_PARAMS{}), + nvgpu.NV0080_CTRL_CMD_MSENC_GET_CAPS: driverStructWithName(nvgpu.NV0080_CTRL_GET_CAPS_PARAMS{}, "NV0080_CTRL_MSENC_GET_CAPS_PARAMS"), + nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS: driverStructs(nvgpu.NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS{}), + nvgpu.NV0000_CTRL_CMD_OS_UNIX_EXPORT_OBJECT_TO_FD: driverStructs(nvgpu.NV0000_CTRL_OS_UNIX_EXPORT_OBJECT_TO_FD_PARAMS{}), + nvgpu.NV0000_CTRL_CMD_OS_UNIX_IMPORT_OBJECT_FROM_FD: driverStructs(nvgpu.NV0000_CTRL_OS_UNIX_IMPORT_OBJECT_FROM_FD_PARAMS{}), + nvgpu.NV0000_CTRL_CMD_OS_UNIX_GET_EXPORT_OBJECT_INFO: driverStructs(nvgpu.NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS{}), + nvgpu.NV0041_CTRL_CMD_GET_SURFACE_INFO: driverStructWithName(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV0041_CTRL_GET_SURFACE_INFO_PARAMS"), + nvgpu.NV00FD_CTRL_CMD_ATTACH_GPU: driverStructs(nvgpu.NV00FD_CTRL_ATTACH_GPU_PARAMS{}), + nvgpu.NV2080_CTRL_CMD_GPU_GET_ENGINES: driverStructWithName(nvgpu.RmapiParamNvU32List{}, "NV2080_CTRL_GPU_GET_ENGINES_PARAMS"), + nvgpu.NV2080_CTRL_CMD_BIOS_GET_INFO: driverStructWithName(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV2080_CTRL_BIOS_GET_INFO_PARAMS"), + nvgpu.NV2080_CTRL_CMD_FIFO_DISABLE_CHANNELS: driverStructs(nvgpu.NV2080_CTRL_FIFO_DISABLE_CHANNELS_PARAMS{}), + nvgpu.NV2080_CTRL_CMD_GR_GET_INFO: driverStructs(nvgpu.NV2080_CTRL_GR_GET_INFO_PARAMS{}), + nvgpu.NV2080_CTRL_CMD_FB_GET_INFO: driverStructWithName(nvgpu.NvxxxCtrlXxxGetInfoParams{}, "NV2080_CTRL_FB_GET_INFO_PARAMS"), + nvgpu.NV503C_CTRL_CMD_REGISTER_VA_SPACE: driverStructs(nvgpu.NV503C_CTRL_REGISTER_VA_SPACE_PARAMS{}), }, - allocationNames: map[nvgpu.ClassID][]DriverStruct{ - nvgpu.NV01_ROOT: getStructName(nvgpu.Handle{}), - nvgpu.NV01_ROOT_NON_PRIV: getStructName(nvgpu.Handle{}), - nvgpu.NV01_MEMORY_SYSTEM: getStructName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS{}), - nvgpu.NV01_MEMORY_LOCAL_USER: getStructName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS{}), - nvgpu.NV01_ROOT_CLIENT: getStructName(nvgpu.Handle{}), - nvgpu.NV01_EVENT_OS_EVENT: getStructName(nvgpu.NV0005_ALLOC_PARAMETERS{}), - nvgpu.NV01_MEMORY_VIRTUAL: getStructName(nvgpu.NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS{}), - nvgpu.NV01_DEVICE_0: getStructName(nvgpu.NV0080_ALLOC_PARAMETERS{}), - nvgpu.RM_USER_SHARED_DATA: getStructName(nvgpu.NV00DE_ALLOC_PARAMETERS{}), - nvgpu.NV_MEMORY_FABRIC: getStructName(nvgpu.NV00F8_ALLOCATION_PARAMETERS{}), - nvgpu.NV_MEMORY_MULTICAST_FABRIC: getStructName(nvgpu.NV00FD_ALLOCATION_PARAMETERS{}), - nvgpu.NV20_SUBDEVICE_0: getStructName(nvgpu.NV2080_ALLOC_PARAMETERS{}), - nvgpu.NV2081_BINAPI: getStructName(nvgpu.NV2081_ALLOC_PARAMETERS{}), - nvgpu.NV50_MEMORY_VIRTUAL: getStructName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS{}), - nvgpu.NV50_P2P: getStructName(nvgpu.NV503B_ALLOC_PARAMETERS{}), - nvgpu.NV50_THIRD_PARTY_P2P: getStructName(nvgpu.NV503C_ALLOC_PARAMETERS{}), - nvgpu.GT200_DEBUGGER: getStructName(nvgpu.NV83DE_ALLOC_PARAMETERS{}), + allocationStructs: map[nvgpu.ClassID][]DriverStruct{ + nvgpu.NV01_ROOT: driverStructWithName(nvgpu.Handle{}, "NvHandle"), + nvgpu.NV01_ROOT_NON_PRIV: driverStructWithName(nvgpu.Handle{}, "NvHandle"), + nvgpu.NV01_MEMORY_SYSTEM: driverStructs(nvgpu.NV_MEMORY_ALLOCATION_PARAMS{}), + nvgpu.NV01_MEMORY_LOCAL_USER: driverStructs(nvgpu.NV_MEMORY_ALLOCATION_PARAMS{}), + nvgpu.NV01_ROOT_CLIENT: driverStructWithName(nvgpu.Handle{}, "NvHandle"), + nvgpu.NV01_EVENT_OS_EVENT: driverStructs(nvgpu.NV0005_ALLOC_PARAMETERS{}), + nvgpu.NV01_MEMORY_VIRTUAL: driverStructs(nvgpu.NV_MEMORY_VIRTUAL_ALLOCATION_PARAMS{}), + nvgpu.NV01_DEVICE_0: driverStructs(nvgpu.NV0080_ALLOC_PARAMETERS{}), + nvgpu.RM_USER_SHARED_DATA: driverStructs(nvgpu.NV00DE_ALLOC_PARAMETERS{}), + nvgpu.NV_MEMORY_FABRIC: driverStructs(nvgpu.NV00F8_ALLOCATION_PARAMETERS{}), + nvgpu.NV_MEMORY_MULTICAST_FABRIC: driverStructs(nvgpu.NV00FD_ALLOCATION_PARAMETERS{}), + nvgpu.NV20_SUBDEVICE_0: driverStructs(nvgpu.NV2080_ALLOC_PARAMETERS{}), + nvgpu.NV2081_BINAPI: driverStructs(nvgpu.NV2081_ALLOC_PARAMETERS{}), + nvgpu.NV50_MEMORY_VIRTUAL: driverStructs(nvgpu.NV_MEMORY_ALLOCATION_PARAMS{}), + nvgpu.NV50_P2P: driverStructs(nvgpu.NV503B_ALLOC_PARAMETERS{}), + nvgpu.NV50_THIRD_PARTY_P2P: driverStructs(nvgpu.NV503C_ALLOC_PARAMETERS{}), + nvgpu.GT200_DEBUGGER: driverStructs(nvgpu.NV83DE_ALLOC_PARAMETERS{}), nvgpu.GF100_PROFILER: nil, // No params - nvgpu.FERMI_TWOD_A: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), - nvgpu.FERMI_CONTEXT_SHARE_A: getStructName(nvgpu.NV_CTXSHARE_ALLOCATION_PARAMETERS{}), - nvgpu.GF100_DISP_SW: getStructName(nvgpu.NV9072_ALLOCATION_PARAMETERS{}), + nvgpu.FERMI_TWOD_A: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.FERMI_CONTEXT_SHARE_A: driverStructs(nvgpu.NV_CTXSHARE_ALLOCATION_PARAMETERS{}), + nvgpu.GF100_DISP_SW: driverStructs(nvgpu.NV9072_ALLOCATION_PARAMETERS{}), nvgpu.GF100_ZBC_CLEAR: nil, // No params - nvgpu.FERMI_VASPACE_A: getStructName(nvgpu.NV_VASPACE_ALLOCATION_PARAMETERS{}), - nvgpu.KEPLER_CHANNEL_GROUP_A: getStructName(nvgpu.NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS{}), - nvgpu.KEPLER_INLINE_TO_MEMORY_B: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.FERMI_VASPACE_A: driverStructs(nvgpu.NV_VASPACE_ALLOCATION_PARAMETERS{}), + nvgpu.KEPLER_CHANNEL_GROUP_A: driverStructs(nvgpu.NV_CHANNEL_GROUP_ALLOCATION_PARAMETERS{}), + nvgpu.KEPLER_INLINE_TO_MEMORY_B: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), nvgpu.VOLTA_USERMODE_A: nil, // No params - nvgpu.TURING_CHANNEL_GPFIFO_A: getStructName(nvgpu.NV_CHANNEL_ALLOC_PARAMS{}), - nvgpu.AMPERE_CHANNEL_GPFIFO_A: getStructName(nvgpu.NV_CHANNEL_ALLOC_PARAMS{}), - nvgpu.HOPPER_CHANNEL_GPFIFO_A: getStructName(nvgpu.NV_CHANNEL_ALLOC_PARAMS{}), - nvgpu.TURING_A: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), - nvgpu.TURING_DMA_COPY_A: getStructName(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), - nvgpu.AMPERE_DMA_COPY_A: getStructName(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), - nvgpu.AMPERE_DMA_COPY_B: getStructName(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), - nvgpu.HOPPER_DMA_COPY_A: getStructName(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), - nvgpu.TURING_COMPUTE_A: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), - nvgpu.AMPERE_COMPUTE_A: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), - nvgpu.AMPERE_COMPUTE_B: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), - nvgpu.ADA_COMPUTE_A: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), - nvgpu.NV_CONFIDENTIAL_COMPUTE: getStructName(nvgpu.NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS{}), - nvgpu.HOPPER_COMPUTE_A: getStructName(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), - nvgpu.HOPPER_USERMODE_A: getStructName(nvgpu.NV_HOPPER_USERMODE_A_PARAMS{}), + nvgpu.TURING_CHANNEL_GPFIFO_A: driverStructs(nvgpu.NV_CHANNEL_ALLOC_PARAMS{}), + nvgpu.AMPERE_CHANNEL_GPFIFO_A: driverStructs(nvgpu.NV_CHANNEL_ALLOC_PARAMS{}), + nvgpu.HOPPER_CHANNEL_GPFIFO_A: driverStructs(nvgpu.NV_CHANNEL_ALLOC_PARAMS{}), + nvgpu.TURING_A: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.TURING_DMA_COPY_A: driverStructs(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), + nvgpu.AMPERE_DMA_COPY_A: driverStructs(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), + nvgpu.AMPERE_DMA_COPY_B: driverStructs(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), + nvgpu.HOPPER_DMA_COPY_A: driverStructs(nvgpu.NVB0B5_ALLOCATION_PARAMETERS{}), + nvgpu.TURING_COMPUTE_A: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.AMPERE_COMPUTE_A: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.AMPERE_COMPUTE_B: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.ADA_COMPUTE_A: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.NV_CONFIDENTIAL_COMPUTE: driverStructs(nvgpu.NV_CONFIDENTIAL_COMPUTE_ALLOC_PARAMS{}), + nvgpu.HOPPER_COMPUTE_A: driverStructs(nvgpu.NV_GR_ALLOCATION_PARAMETERS{}), + nvgpu.HOPPER_USERMODE_A: driverStructs(nvgpu.NV_HOPPER_USERMODE_A_PARAMS{}), nvgpu.GF100_SUBDEVICE_MASTER: nil, // No params nvgpu.TURING_USERMODE_A: nil, // No params nvgpu.HOPPER_SEC2_WORK_LAUNCH_A: nil, // No params @@ -679,17 +680,16 @@ func Init() { abi.allocationClass[nvgpu.NV01_MEMORY_LOCAL_USER] = allocHandler(rmAllocSimple[nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545], compUtil) abi.allocationClass[nvgpu.NV50_MEMORY_VIRTUAL] = allocHandler(rmAllocSimple[nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545], compUtil) - prevNames := abi.getStructNames - abi.getStructNames = func() *driverStructNames { - names := prevNames() - names.controlNames[nvgpu.NV0000_CTRL_CMD_OS_UNIX_GET_EXPORT_OBJECT_INFO] = getStructName(nvgpu.NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS_V545{}) - names.allocationNames[nvgpu.RM_USER_SHARED_DATA] = getStructName(nvgpu.NV00DE_ALLOC_PARAMETERS_V545{}) - names.allocationNames[nvgpu.NV_MEMORY_MULTICAST_FABRIC] = getStructName(nvgpu.NV00FD_ALLOCATION_PARAMETERS_V545{}) - names.allocationNames[nvgpu.NV01_MEMORY_SYSTEM] = getStructName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545{}) - names.allocationNames[nvgpu.NV01_MEMORY_LOCAL_USER] = getStructName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545{}) - names.allocationNames[nvgpu.NV50_MEMORY_VIRTUAL] = getStructName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545{}) - - return names + prevStructs := abi.getStructs + abi.getStructs = func() *driverABIStructs { + structs := prevStructs() + structs.controlStructs[nvgpu.NV0000_CTRL_CMD_OS_UNIX_GET_EXPORT_OBJECT_INFO] = driverStructWithName(nvgpu.NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS_V545{}, "NV0000_CTRL_OS_UNIX_GET_EXPORT_OBJECT_INFO_PARAMS") + structs.allocationStructs[nvgpu.RM_USER_SHARED_DATA] = driverStructWithName(nvgpu.NV00DE_ALLOC_PARAMETERS_V545{}, "NV00DE_ALLOC_PARAMETERS") + structs.allocationStructs[nvgpu.NV_MEMORY_MULTICAST_FABRIC] = driverStructWithName(nvgpu.NV00FD_ALLOCATION_PARAMETERS_V545{}, "NV00FD_ALLOCATION_PARAMETERS") + structs.allocationStructs[nvgpu.NV01_MEMORY_SYSTEM] = driverStructWithName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545{}, "NV_MEMORY_ALLOCATION_PARAMS") + structs.allocationStructs[nvgpu.NV01_MEMORY_LOCAL_USER] = driverStructWithName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545{}, "NV_MEMORY_ALLOCATION_PARAMS") + structs.allocationStructs[nvgpu.NV50_MEMORY_VIRTUAL] = driverStructWithName(nvgpu.NV_MEMORY_ALLOCATION_PARAMS_V545{}, "NV_MEMORY_ALLOCATION_PARAMS") + return structs } return abi @@ -699,6 +699,7 @@ func Init() { v550_40_07 := func() *driverABI { abi := v545_23_06() abi.frontendIoctl[nvgpu.NV_ESC_WAIT_OPEN_COMPLETE] = feHandler(frontendIoctlSimple[nvgpu.IoctlWaitOpenComplete], compUtil) + abi.frontendIoctl[nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA] = feHandler(frontendIoctlSimple[nvgpu.NVOS47_PARAMETERS_V550], nvconf.CapGraphics) abi.controlCmd[nvgpu.NV0000_CTRL_CMD_GPU_ASYNC_ATTACH_ID] = ctrlHandler(rmControlSimple, compUtil) abi.controlCmd[nvgpu.NV0000_CTRL_CMD_GPU_WAIT_ATTACH_ID] = ctrlHandler(rmControlSimple, compUtil) abi.controlCmd[nvgpu.NV0080_CTRL_CMD_PERF_CUDA_LIMIT_SET_CONTROL] = ctrlHandler(rmControlSimple, compUtil) // NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS @@ -710,24 +711,23 @@ func Init() { abi.uvmIoctl[nvgpu.UVM_SET_PREFERRED_LOCATION] = uvmHandler(uvmIoctlSimple[nvgpu.UVM_SET_PREFERRED_LOCATION_PARAMS_V550], compUtil) abi.uvmIoctl[nvgpu.UVM_MIGRATE] = uvmHandler(uvmIoctlSimple[nvgpu.UVM_MIGRATE_PARAMS_V550], compUtil) - prevNames := abi.getStructNames - abi.getStructNames = func() *driverStructNames { - names := prevNames() - names.frontendNames[nvgpu.NV_ESC_WAIT_OPEN_COMPLETE] = getStructName(nvgpu.IoctlWaitOpenComplete{}) - names.frontendNames[nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA] = getStructName(nvgpu.NVOS47ParametersV550{}) - names.controlNames[nvgpu.NV0000_CTRL_CMD_GPU_ASYNC_ATTACH_ID] = simpleIoctl("NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS") - names.controlNames[nvgpu.NV0000_CTRL_CMD_GPU_WAIT_ATTACH_ID] = simpleIoctl("NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS") - names.controlNames[nvgpu.NV0080_CTRL_CMD_PERF_CUDA_LIMIT_SET_CONTROL] = simpleIoctl("NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS") - names.controlNames[nvgpu.NV2080_CTRL_CMD_PERF_GET_CURRENT_PSTATE] = simpleIoctl("NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS") + prevStructs := abi.getStructs + abi.getStructs = func() *driverABIStructs { + structs := prevStructs() + structs.frontendStructs[nvgpu.NV_ESC_WAIT_OPEN_COMPLETE] = driverStructWithName(nvgpu.IoctlWaitOpenComplete{}, "nv_ioctl_wait_open_complete_t") + structs.frontendStructs[nvgpu.NV_ESC_RM_UNMAP_MEMORY_DMA] = driverStructWithName(nvgpu.NVOS47_PARAMETERS_V550{}, "NVOS47_PARAMETERS") + structs.controlStructs[nvgpu.NV0000_CTRL_CMD_GPU_ASYNC_ATTACH_ID] = simpleDriverStruct("NV0000_CTRL_GPU_ASYNC_ATTACH_ID_PARAMS") + structs.controlStructs[nvgpu.NV0000_CTRL_CMD_GPU_WAIT_ATTACH_ID] = simpleDriverStruct("NV0000_CTRL_GPU_WAIT_ATTACH_ID_PARAMS") + structs.controlStructs[nvgpu.NV0080_CTRL_CMD_PERF_CUDA_LIMIT_SET_CONTROL] = simpleDriverStruct("NV0080_CTRL_PERF_CUDA_LIMIT_CONTROL_PARAMS") + structs.controlStructs[nvgpu.NV2080_CTRL_CMD_PERF_GET_CURRENT_PSTATE] = simpleDriverStruct("NV2080_CTRL_PERF_GET_CURRENT_PSTATE_PARAMS") // NV2081_BINAPI forwards all control commands to the GSP in // src/nvidia/src/kernel/rmapi/binary_api.c:binapiControl_IMPL(). // As such, there are no structs defined in the driver for this. - names.controlNames[(nvgpu.NV2081_BINAPI<<16)|0x0108] = nil - names.controlNames[nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS] = getStructName(nvgpu.NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS_V550{}) - names.uvmNames[nvgpu.UVM_SET_PREFERRED_LOCATION] = getStructName(nvgpu.UVM_SET_PREFERRED_LOCATION_PARAMS_V550{}) - names.uvmNames[nvgpu.UVM_MIGRATE] = getStructName(nvgpu.UVM_MIGRATE_PARAMS_V550{}) - - return names + structs.controlStructs[(nvgpu.NV2081_BINAPI<<16)|0x0108] = nil + structs.controlStructs[nvgpu.NV0000_CTRL_CMD_SYSTEM_GET_P2P_CAPS] = driverStructWithName(nvgpu.NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS_V550{}, "NV0000_CTRL_SYSTEM_GET_P2P_CAPS_PARAMS") + structs.uvmStructs[nvgpu.UVM_SET_PREFERRED_LOCATION] = driverStructWithName(nvgpu.UVM_SET_PREFERRED_LOCATION_PARAMS_V550{}, "UVM_SET_PREFERRED_LOCATION_PARAMS") + structs.uvmStructs[nvgpu.UVM_MIGRATE] = driverStructWithName(nvgpu.UVM_MIGRATE_PARAMS_V550{}, "UVM_MIGRATE_PARAMS") + return structs } return abi @@ -738,13 +738,12 @@ func Init() { abi.uvmIoctl[nvgpu.UVM_ALLOC_SEMAPHORE_POOL] = uvmHandler(uvmIoctlSimple[nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550], compUtil) abi.uvmIoctl[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION] = uvmHandler(uvmIoctlHasFrontendFD[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550], compUtil) - prevNames := abi.getStructNames - abi.getStructNames = func() *driverStructNames { - names := prevNames() - names.uvmNames[nvgpu.UVM_ALLOC_SEMAPHORE_POOL] = getStructName(nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550{}) - names.uvmNames[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION] = getStructName(nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550{}) - - return names + prevStructs := abi.getStructs + abi.getStructs = func() *driverABIStructs { + structs := prevStructs() + structs.uvmStructs[nvgpu.UVM_ALLOC_SEMAPHORE_POOL] = driverStructWithName(nvgpu.UVM_ALLOC_SEMAPHORE_POOL_PARAMS_V550{}, "UVM_ALLOC_SEMAPHORE_POOL_PARAMS") + structs.uvmStructs[nvgpu.UVM_MAP_EXTERNAL_ALLOCATION] = driverStructWithName(nvgpu.UVM_MAP_EXTERNAL_ALLOCATION_PARAMS_V550{}, "UVM_MAP_EXTERNAL_ALLOCATION_PARAMS") + return structs } return abi @@ -756,12 +755,11 @@ func Init() { abi := v550_54_15() abi.controlCmd[nvgpu.NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_KEY_ROTATION_STATE] = ctrlHandler(rmControlSimple, compUtil) - prevNames := abi.getStructNames - abi.getStructNames = func() *driverStructNames { - names := prevNames() - names.controlNames[nvgpu.NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_KEY_ROTATION_STATE] = simpleIoctl("NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_KEY_ROTATION_STATE_PARAMS") - - return names + prevStructs := abi.getStructs + abi.getStructs = func() *driverABIStructs { + structs := prevStructs() + structs.controlStructs[nvgpu.NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_KEY_ROTATION_STATE] = simpleDriverStruct("NV_CONF_COMPUTE_CTRL_CMD_GPU_GET_KEY_ROTATION_STATE_PARAMS") + return structs } return abi @@ -783,11 +781,11 @@ func Init() { // NVC36F_CTRL_GET_CLASS_ENGINEID was deleted in 555.42.02: // https://github.com/NVIDIA/open-gpu-kernel-modules/commit/5a1c474040e1c3ed20760267510cc9d9332898f1 delete(abi.controlCmd, nvgpu.NVC36F_CTRL_GET_CLASS_ENGINEID) - prevNames := abi.getStructNames - abi.getStructNames = func() *driverStructNames { - names := prevNames() - delete(names.controlNames, nvgpu.NVC36F_CTRL_GET_CLASS_ENGINEID) - return names + prevStructs := abi.getStructs + abi.getStructs = func() *driverABIStructs { + structs := prevStructs() + delete(structs.controlStructs, nvgpu.NVC36F_CTRL_GET_CLASS_ENGINEID) + return structs } return abi } @@ -796,74 +794,43 @@ func Init() { }) } -// simpleIoctl simply returns a slice containing structName. This is used for ioctls that don't -// have a struct defined in nvproxy, but we know the driver struct name. -func simpleIoctl(structName string) []DriverStruct { - return []DriverStruct{ - { - Name: structName, +// simpleDriverStruct constructs DriverStructs for simple ioctls (for whom +// nvproxy doesn't define a struct). +func simpleDriverStruct(names ...string) []DriverStruct { + res := make([]DriverStruct, 0, len(names)) + for _, name := range names { + res = append(res, DriverStruct{ + Name: name, Type: nil, - }, + }) } + return res } -// getStructName takes an instance of an nvproxy struct and reads the `nvproxy` tag to determine the -// struct name. If the tag is empty, then it returns nil. -func getStructName(params any) []DriverStruct { - paramType := reflect.TypeOf(params) - - // Right now, we only expect parameter structs - if paramType.Kind() != reflect.Struct { - panic(fmt.Sprintf("expected struct, got %v", paramType.Kind())) - } - - // Look through each field for the tag, panicking if there are not exactly one. - tagName, found := "", false - for i := 0; i < paramType.NumField(); i++ { - field := paramType.Field(i) - if name, ok := field.Tag.Lookup("nvproxy"); ok { - if found { - panic(fmt.Sprintf("multiple nvproxy tags for %v", paramType.Name())) - } - tagName = name - found = true - } - } - - if !found { - panic(fmt.Sprintf("missing nvproxy tag for %v", paramType.Name())) - } - var driverName string - switch tagName { - case "": - return nil - case "same": - driverName = paramType.Name() - default: - driverName = tagName - } - - return []DriverStruct{ - { - Name: driverName, - Type: paramType, - }, +// driverStructs takes an instance of an nvproxy struct and initializes a +// DriverStruct using its name. +func driverStructs(params ...any) []DriverStruct { + res := make([]DriverStruct, 0, len(params)) + for _, param := range params { + paramType := reflect.TypeOf(param) + res = append(res, newDriverStruct(paramType, paramType.Name())) } + return res } -func driverStructWith(params any, driverName string) []DriverStruct { - paramType := reflect.TypeOf(params) +func driverStructWithName(param any, name string) []DriverStruct { + paramType := reflect.TypeOf(param) + return []DriverStruct{newDriverStruct(paramType, name)} +} - // Right now, we only expect parameter structs +func newDriverStruct(paramType reflect.Type, name string) DriverStruct { + // Right now, we only expect parameter structs. if paramType.Kind() != reflect.Struct { panic(fmt.Sprintf("expected struct, got %v", paramType.Kind())) } - - return []DriverStruct{ - { - Name: driverName, - Type: paramType, - }, + return DriverStruct{ + Name: name, + Type: paramType, } } @@ -945,7 +912,7 @@ func SupportedStructNames(version DriverVersion) ([]DriverStructName, bool) { return nil, false } abi := namesCons.cons() - names := abi.getStructNames() + names := abi.getStructs() var allNames []DriverStructName addNames := func(names []DriverStruct) { @@ -954,16 +921,16 @@ func SupportedStructNames(version DriverVersion) ([]DriverStructName, bool) { } } - for _, names := range names.frontendNames { + for _, names := range names.frontendStructs { addNames(names) } - for _, names := range names.uvmNames { + for _, names := range names.uvmStructs { addNames(names) } - for _, names := range names.controlNames { + for _, names := range names.controlStructs { addNames(names) } - for _, names := range names.allocationNames { + for _, names := range names.allocationStructs { addNames(names) } @@ -973,26 +940,26 @@ func SupportedStructNames(version DriverVersion) ([]DriverStructName, bool) { // SupportedStructTypes returns the list of struct types supported by the given driver version. // It merges the frontend, uvm, control, and allocation names into one slice. func SupportedStructTypes(version DriverVersion) ([]DriverStruct, bool) { - namesCons, ok := abis[version] + abiCons, ok := abis[version] if !ok { return nil, false } - abi := namesCons.cons() - names := abi.getStructNames() + abi := abiCons.cons() + structs := abi.getStructs() - var allNames []DriverStruct - for _, names := range names.frontendNames { - allNames = append(allNames, names...) + var allStructs []DriverStruct + for _, s := range structs.frontendStructs { + allStructs = append(allStructs, s...) } - for _, names := range names.uvmNames { - allNames = append(allNames, names...) + for _, s := range structs.uvmStructs { + allStructs = append(allStructs, s...) } - for _, names := range names.controlNames { - allNames = append(allNames, names...) + for _, s := range structs.controlStructs { + allStructs = append(allStructs, s...) } - for _, names := range names.allocationNames { - allNames = append(allNames, names...) + for _, s := range structs.allocationStructs { + allStructs = append(allStructs, s...) } - return allNames, true + return allStructs, true } diff --git a/tools/ioctl_sniffer/sniffer/sniffer.go b/tools/ioctl_sniffer/sniffer/sniffer.go index a4c212328c..5f8811b013 100644 --- a/tools/ioctl_sniffer/sniffer/sniffer.go +++ b/tools/ioctl_sniffer/sniffer/sniffer.go @@ -260,7 +260,7 @@ func ParseIoctlOutput(ioctl *pb.Ioctl) (Ioctl, error) { if uint32(len(data)) != nvgpu.SizeofNVOS54Parameters { return parsedIoctl, fmt.Errorf("unexpected number of bytes") } - var ioctlParams nvgpu.NVOS54Parameters + var ioctlParams nvgpu.NVOS54_PARAMETERS ioctlParams.UnmarshalBytes(data) parsedIoctl.class = control