Net names + airwires

[amstan]

Nets should be able to get labeled with the net name.

If a net doesn't go anywhere but one pin, it should make a little stub, long enough to fit its name.

Duplicate of nturley/netlistsvg#36

Right now we can simulate this by uncommenting

pcbdl/pcbdl/netlistsvg.py

Lines 203 to 204 in 0c02c3d

	##if len(pin_net_helper.grouped_connections) > 1:
	#self.attach_net_name_port(pin.net, net_node_number, port_directions[name])

[amstan]

Done some work on this in my netlistsvg fork. It's essentially almost done.

• Chips have pin names inside them (unrelated to this bug)
• netnames passed to json
• netnames show on random lines if they're named and not power
• netnames show even when there's no net there (an airwire gets generated)

[amstan]

3 more problems left:

• Code quality for my netlistsvg changes is a little low
• Sometimes generic parts are still a little thin, especially when there's only one side of the pins. (See U6 in https://google.github.io/pcbdl/examples/servo_micro.power.svg)
• Resistors and other non generics don't have airwires attached to them (see R501 in https://google.github.io/pcbdl/examples/servo_micro.power.svg)

[amstan]

Let's call this working enough for Jim.

[amstan]

Jim noticed no airwires on resistors and thin chips already.