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Verification tasks in SV-COMP
../../sv-benchmarks/c/bitvector/byte_add-2.i
Fix check for shift operation r3 << 24U, see ISO/IEC 9899:2011 6.5.7#4, in that case r3<<24U will exceed INT_MAX
../../sv-benchmarks/c/bitvector/byte_add_1-2.i
Not identified bug root, but we have modeling issues with shift operation
../../sv-benchmarks/c/bitvector/byte_add_2-1.i
The text was updated successfully, but these errors were encountered:
hbgit
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Verification tasks in SV-COMP
../../sv-benchmarks/c/bitvector/byte_add-2.i
../../sv-benchmarks/c/bitvector/byte_add_1-2.i
../../sv-benchmarks/c/bitvector/byte_add_2-1.i
The text was updated successfully, but these errors were encountered: