diff --git a/CHANGELOG.md b/CHANGELOG.md index c2a585b6..05b41178 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -2,6 +2,10 @@ ## [Unreleased] +Add embedded-hal 1 implementations for the following drivers: + +- GPIO + ## [0.5.4] 2023-11-26 Add CCM APIs for configuring FlexIO clocks on 1000 targets. diff --git a/src/common/gpio.rs b/src/common/gpio.rs index 74f61336..071f414b 100644 --- a/src/common/gpio.rs +++ b/src/common/gpio.rs @@ -124,6 +124,7 @@ pub struct Output
{ pin: P, // Logical ownership: // - DR: read only + // - PSR: read only // - DR_SET, DR_CLEAR, DR_TOGGLE: write 1 to set value in DR gpio: &'static ral::gpio::RegisterBlock, offset: u32, @@ -170,6 +171,13 @@ impl
Output
{ ral::read_reg!(ral::gpio, self.gpio, DR) & self.mask() != 0 } + /// Returns `true` if the value of the pad is high. + /// + /// Can differ from [`is_set()`](Self::is_set), especially in an open drain config. + pub fn is_pad_high(&self) -> bool { + ral::read_reg!(ral::gpio, self.gpio, PSR) & self.mask() != 0 + } + /// Release the underlying pin object. pub fn release(self) -> P { self.pin @@ -348,3 +356,59 @@ impl
eh02::digital::v2::InputPin for Input
{ Ok(!self.is_set()) } } + +impl
eh1::digital::ErrorType for Output
{ + type Error = core::convert::Infallible; +} + +impl
eh1::digital::OutputPin for Output
{ + fn set_high(&mut self) -> Result<(), Self::Error> { + Output::set(self); + Ok(()) + } + fn set_low(&mut self) -> Result<(), Self::Error> { + Output::clear(self); + Ok(()) + } +} + +impl
eh1::digital::StatefulOutputPin for Output
{
+ fn is_set_high(&mut self) -> Result eh1::digital::InputPin for Output {
+ fn is_high(&mut self) -> Result eh1::digital::ErrorType for Input {
+ type Error = core::convert::Infallible;
+}
+
+impl eh1::digital::InputPin for Input {
+ fn is_high(&mut self) -> Result