diff --git a/src/Tinyrossa/TRRegisterDependencies.class.st b/src/Tinyrossa/TRRegisterDependencies.class.st
index 24c51eb..5e70cae 100644
--- a/src/Tinyrossa/TRRegisterDependencies.class.st
+++ b/src/Tinyrossa/TRRegisterDependencies.class.st
@@ -55,9 +55,22 @@ Class {
 
 { #category : #'instance creation' }
 TRRegisterDependencies class >> new [
-	"return an initialized instance"
+	^ self pre: TRRegisterDependencyGroup new post: TRRegisterDependencyGroup new
+]
+
+{ #category : #'instance creation' }
+TRRegisterDependencies class >> post: postDependencyGroup [
+	^ self pre: TRRegisterDependencyGroup new post: postDependencyGroup
+]
+
+{ #category : #'instance creation' }
+TRRegisterDependencies class >> pre: preDependencyGroup [
+	^ self pre: preDependencyGroup post: TRRegisterDependencyGroup new
+]
 
-	^ self basicNew initialize.
+{ #category : #'instance creation' }
+TRRegisterDependencies class >> pre: pre post: post [
+	^ self basicNew initializeWithPre: pre post: post.
 ]
 
 { #category : #'adding & removing' }
@@ -77,9 +90,9 @@ TRRegisterDependencies >> addPreDependencyOf: vreg on: rreg [
 ]
 
 { #category : #initialization }
-TRRegisterDependencies >> initialize [
-	pre := TRRegisterDependencyGroup new.
-	post := TRRegisterDependencyGroup new.
+TRRegisterDependencies >> initializeWithPre: preDependencyGroup post: postDependencyGroup [
+	pre := preDependencyGroup.
+	post := postDependencyGroup
 ]
 
 { #category : #testing }
@@ -101,3 +114,10 @@ TRRegisterDependencies >> post [
 TRRegisterDependencies >> pre [
 	^ pre
 ]
+
+{ #category : #utilities }
+TRRegisterDependencies >> replaceVirtualRegistersUsing: replacementMap [
+	^ self class
+		pre: (pre replaceVirtualRegistersUsing: replacementMap)
+		post: (post replaceVirtualRegistersUsing: replacementMap)
+]
diff --git a/src/Tinyrossa/TRRegisterDependencyGroup.class.st b/src/Tinyrossa/TRRegisterDependencyGroup.class.st
index 24eccd8..40124d0 100644
--- a/src/Tinyrossa/TRRegisterDependencyGroup.class.st
+++ b/src/Tinyrossa/TRRegisterDependencyGroup.class.st
@@ -34,3 +34,18 @@ TRRegisterDependencyGroup >> addTrashed: rReg [
 
 	self add: (TRRegisterDependency virtual: nil real: rReg).
 ]
+
+{ #category : #utilities }
+TRRegisterDependencyGroup >> replaceVirtualRegistersUsing: replacementMap [
+	(self anySatisfy: [:dep | dep vreg notNil and:[replacementMap includesKey: dep vreg name] ]) ifTrue: [
+		^ self collect: [ :dep |
+			(dep vreg notNil and:[replacementMap includesKey: dep vreg name]) ifTrue: [
+				TRRegisterDependency virtual: (replacementMap at: dep vreg name) real: dep rreg
+			] ifFalse: [
+				dep
+			].
+		].
+	] ifFalse: [
+		^ self
+	].
+]
diff --git a/src/Tinyrossa/TRReverseLinearScanRegisterAllocator.class.st b/src/Tinyrossa/TRReverseLinearScanRegisterAllocator.class.st
index 67664fe..73d8d13 100644
--- a/src/Tinyrossa/TRReverseLinearScanRegisterAllocator.class.st
+++ b/src/Tinyrossa/TRReverseLinearScanRegisterAllocator.class.st
@@ -469,14 +469,14 @@ TRReverseLinearScanRegisterAllocator >> splitRegister: interval at: insnIndex [
 	"Create new interval representing the first part of original interval
 	 up to current position. While walking definitions and uses,
 	 update instructions to use new virtual registers"
-	regmap := Dictionary new at: interval register name put: before register name; yourself.
+	regmap := Dictionary new at: interval register name put: before register; yourself.
 	interval defdDo: [ :i |
 		before defdAt:i.
-		instructions at: i put: ((instructions at: i) inEnvironment: regmap).
+		instructions at: i put: ((instructions at: i) replaceVirtualRegistersUsing: regmap).
 	].
 	interval usedDo: [:i | i <= insnIndex ifTrue: [
 		before usedAt:i.
-		instructions at: i put: ((instructions at: i) inEnvironment: regmap).
+		instructions at: i put: ((instructions at: i) replaceVirtualRegistersUsing: regmap).
 	]].
 
 	"Allocate spill slot for being-splitted `interval`. Insert reload