Which of the obscure instructions from x86 CPUs are emulated or not?

[Torinde]

Tickbox list of instructions, supported by CPUs which don't have 64-bit mode (based on this and that).

• original 8086/8088 instructions - multiple and also:
  • AAM imm8
  • AAD imm8
  • SALC, SETALC
  • TEST
  • SHL, SAL 8086-type (8086 only)
  • OR/AND/XOR r/m16,imm8
  • Alias of opcode 80h, which provides variants of 8-bit integer instructions (ADD, OR, ADC, SBB, AND, SUB, XOR, CMP) with an 8-bit immediate argument.
  • REPNZ MOVS
  • REPNZ STOS
  • REP RET
  • REP MUL (8086/8088 only)
  • REP IMUL (8086/8088 only)
  • REP IDIV (8086/8088 only)
• added with 8087- multiple and also:
  • FENI / FDISI (8087 only)
• added with 80186/80188- multiple and also:
  • UD0/1/2
  • SHL, SAL (80186 onwards)
  • LFEAT / STFEAT - System Management feature C&T "SuperState R"
  • Innovasic IA186XL only - Enhanced mode: PowerSave control, Dynamic RAM refresh, and an asynchronous Numerics Coprocessor interface
  • VAutomation Turbo86/186 only: included 24 bit addressing mode allowing for up to a 16Mbyte address space (on 86 multiplexed bus?)
• added with NEC V20-V55 - multiple and also: #3853
  • x87 μPD72091 FPU - multiple
  • x87 μPD72191, D9008D FPU - FPOWER X^y = e^(y*logeX)
  • non-x87 FPU NEC 72291
• added with 80286 - multiple and also:
  • SAVEALL, STOREALL (80286 only)
  • LOADALL (80286 only) PLANS/8086 and 286 cputype/TODO
• added with 80287 - multiple and also:
  • FENI8087_NOP / FDISI8087_NOP
  • FSETPM (80287 only)
  • FSBP / FMUL4X4 (IIT 287/387 only)
  • Weitek 1067 (Weitek FPU series)
• added with 80386 - multiple and also:
  • 386 "CPUID" - return Family ID in the reset-value of EDX (3h for 386, 4h for 486, ...?)
  • ICEBP, INT1
  • NOP 67 90
  • RDMSR / WRMSR
  • RSM - System Management Mode Intel
  • SMI / RES3 / RES4 - System Management Mode AMD
  • SCALL-WARFE - System Management feature C&T "SuperState V"
  • LOADALLD, ICERET (80386 only) PLANS/8086 and 286 cputype/TODO
  • UMOV (80386/80486 only)
  • XBTS / IBTS (80386 only)
  • MOV r32,TRx / MOV TRx,r32 (all Cyrix; Intel/others - 80386/80486 only)
  • BRKPM - System Management Mode ALi M6117
  • MOV PWRCR,EAX (ALi M6117 only)
  • VM Technology only:
    • VM32 instruction set VM8600S (ASIP emulating 386 + VM32)
    • VMZ instruction set and modes VM8600SP (CPU supporting instructions from 8086, real mode 286, some of 386, VMZ)
      • 32 32-bit registers (64 when treated as 16-bit registers)
      • Debugging Extensions: built-in register for program debugging, break and single step operation debug support
      • modes: 86, 86 user, VMZ Supervisor, VMZ User
      • instructions: BRVM, BR 866, VMZ, VMZ Supervisor
• added with 80387 - multiple and also:
  • FSETPM287_NOP
  • FRSTPM (287XL only)
  • FNSTDW / FNSTSG (387SL only)
  • FTSTP (all Cyrix)
  • FRINT2 / FRICHOP / FRINEAR (all Cyrix)
  • Weitek 1167, 2167, 3167 (Weitek FPU series)
    • 3167 can be used together with 387
• added with 80486 - multiple and also:
  • CPUID
  • Cyrix SMM - System Management Mode
  • UMC Green 64 D6 - causes EAX to be set to 0xAB6B1B07
• related to 80487:
  • Weitek 4167 (Weitek FPU series)
  • FIDIVRP Floating Point Integer Divide, Reversed, Pop (Cyrix Cx486DX/ZFx86, also mentions FLY2X, FLY2XP1 that look like mnemonic typos for FYL2X, FYL2XP1?)
• added with P5:
  • CMPXCHG8B
  • RDTSC
  • CL1INVMB (SCC only)
  • PATCH2/3
• added with P6:
  • CMOV
  • x87 FCMOV
  • x87 FCOMI
  • NOP / NOPL
  • RDPMC
  • PAE #4185
• MMX
• SYSENTER / SYSEXIT
• x87 FXSAVE / FXRSTOR
• added with Cyrix MediaGX:
  • Display Driver Instructions for its integrated graphics accelerator
  • MOVDB, GP2MEM - Cyrix MediaGX Virtual System Architecture (VSA) - emulates VGA and Sound Blaster (unfortunately specs weren't published; further info)
  • Cyrix reserved opcodes D9 D7 ... DF FC - their actual operation is not known
• added with AMD K6: #3217
  • SYSCALL / SYSRET
  • FEMMS 0F 0E
  • CPUID Easter eggs (for K6/Sempron and mP6)
• added with Cyrix 6x86MX: #3217
  • EMMI Extended Multi-Media Instructions (Cyrix MMX)
  • RDSHR / WRSHR - System Management Mode Cyrix
• 3DNow! - multiple and also: #3217
  • PREFETCHW
  • PSWAPW (K6-2/3 only)
• SSE - multiple
• added with 'Cyrix' Geode GX2:
  • DMINT / RDM - Debug Management Mode
  • custom Manufacturer ID via MSRs - also possible on WinChip/C3/C7/Nano, Transmeta, Vortex86EX2 (DOSbox-X can do that via .conf) and custom Processor Brand String (some Athlon/Geode)
• SSE2 - 143 instructions and also: #4185
  • CLFSH
  • FS: Jcc
  • HWNT / HST branch hints
• SSE3 - 10 instructions and also: #4185
  • MONITOR / MWAIT
  • x87 FISTTP
• SSSE3 - 16 instructions #4185
• MOVBE
• NX bit #4185
• VIA PadLock - multiple:
  • RNG
  • ACE (AES)
  • ACE2
  • PHE (SHA1, SHA256)
  • PMM
• VMX/VT-x - multiple

Jumps to alternative instruction sets:

• BRKEM - NEC 8080 #3853
  • 8080
• x86/8085 and x86/Z80 machines (single-chip or two-chip)
  • 8085
  • Z80 IMFC includes Z80
  • Am9511/Intel 8231 APU (also works with 8086)
  • Am9512/Intel 8232 FPU (also works with 8086)
• opcode 63 - NEC V60
• NXOP / 0F (E0..FB) - NexGen
• JMPE - Itanium
• JMPAI - VIA

Are System Management Mode instructions applicable for DOSbox?

@joncampbell123, can you please tick /untick the boxes above for instructions that are already emulated? I filled in those that I found.

[rderooy]

You may want to cross-reference (and update where necessary): https://dosbox-x.com/wiki/Guide%3ACPU-settings-in-DOSBox%E2%80%90X#_differences_in_emulated_cpu_types

[Torinde]

I see there:

• "386 CPUID" - is this "The i386 processor does not support the CPUID instruction - it does however return Family ID 3h in the reset-value of EDX."?
• RSM, UD2, NOPL - I didn't find those in the code. Are you sure those are implemented - or the table just reflects when those instructions appeared in real hardware?
• RDPMC - I didn't find that in the code. Are you sure it's implemented? Also, it should be enabled on Pentium MMX as well.

[rderooy]

I created that page years ago, so I don't recall specific details about it. But I recall looking at the DOSBox wiki, some threads on Vogons (one of them linked on the above linked page) and browsing the source code.

For the 386 CPU ID, I guess this indeed refers to the Family ID.

[Torinde]

Thanks, so I'll add 386 "CPUID", but I'll wait for the rest until Jon or somebody else confirms they're emulated.

[rderooy]

To prevent confusion, it should perhaps not be called CPUID...

[Torinde]

@rderooy, reading this I think "386ID", "ResetID" or "EDXID" (because it's used also after 386 - the only place giving the CPU revision) may be a better name?

i486DX4:
ID: step level A: DH = 0x04 (family ID), DL = 0x8X (model ID, revision).
CPUID: step level A: family = 0x4, model = 0x8.

Confusingly, some 386 CPUs have different meanings for the bits:

ID: step level A0: DH = 0x43 (model ID, family ID), DL = 0x10 (revision)
ID: step level A: DH = 0x03 (family ID), DL = 0x40 (model ID, revision)

Or even:

ID: AH = 0x03 (Intel i80386 CPU).
ID: step level A (Intel i80386 CPU): DH = 0x00 (model ID, family ID)

Some 486 also have odd result (family 0):
Cx486S - Cyrix M5 CPU. ID: DH = 0x00 (family ID), DL = 0x05 (model ID).

[RBTCHENTPE]

Thanks a lot, From: Robert ***@***.*** Sent: Wednesday, April 17, 2024 5:13 PM To: joncampbell123/dosbox-x Cc: Subscribed Subject: Re: [joncampbell123/dosbox-x] Which of the obscure instructions from x86 CPUs are emulated or not? (Discussion #4967) I created that page years ago, so I don't recall specific details about it. But I recall looking at the DOSBox wiki, some threads on Vogons (one of them linked on the above linked page) and browsing the source code. For the 386 CPU ID, I guess this indeed refers to the Family ID. — Reply to this email directly, view it on GitHub <#4967 (reply in thread)> , or unsubscribe <https://github.com/notifications/unsubscribe-auth/AVABWSFFM63X2RTSY5GXT73Y5Y4KLAVCNFSM6AAAAABGJ64KH6VHI2DSMVQWIX3LMV43SRDJONRXK43TNFXW4Q3PNVWWK3TUHM4TCMZZHE2TI> . You are receiving this because you are subscribed to this thread. <https://github.com/notifications/beacon/AVABWSEWY2W7C63FN3T7WKDY5Y4KLA5CNFSM6AAAAABGJ64KH6WGG33NNVSW45C7OR4XAZNRIRUXGY3VONZWS33OINXW23LFNZ2KUY3PNVWWK3TUL5UWJTQARN3PE.gif> Message ID: ***@***.***>

[joncampbell123]

Why is an Itanium instruction listed? DOSBox-X isn't going to emulate Itanium systems.

I never thought about RDPMC, but I don't think I've seen any DOS or Windows 9x/ME systems use it either.

[Torinde]

JMPE is x86 instruction doing "Jump To Intel Itanium Instruction Set." - that's part of the "IA-32 mode" of early Itanium variants. Of course, I don't expect JMPE to be emulated - I listed it only for completeness, along with the other "Jumps to alternative instruction sets" (most of which also seem unlikely).

@joncampbell123, so RDPMC is not yet emulated (then tickbox empty is OK), but what about the others, especially pre-486 ones - I'm pretty sure you emulate some of those, but I can't be sure just by searching for them in the code...

[Torinde]

RDPMC is also one of the few post-486 instructions that don't have CPUID flag. The others I see are NOPL and RSM (System Management Mode).

[Torinde]

RDPMC is supported also in Pentium MMX, so if you're implementing it please enable it for: pentium_mmx, ppro_slow, pentium_ii, pentium_iii, experimental.