From eb3361dfaa04f1c97566d0ae35d18b7b90429f88 Mon Sep 17 00:00:00 2001
From: Nikita Popov <npopov@redhat.com>
Date: Wed, 2 Oct 2024 14:28:50 +0200
Subject: [PATCH] [InstCombine] Add additional mask merging tests (NFC)

---
 .../Transforms/InstCombine/and-or-icmps.ll    | 90 +++++++++++++++++++
 1 file changed, 90 insertions(+)

diff --git a/llvm/test/Transforms/InstCombine/and-or-icmps.ll b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
index 74ef365db8d225..26f708dc787c7d 100644
--- a/llvm/test/Transforms/InstCombine/and-or-icmps.ll
+++ b/llvm/test/Transforms/InstCombine/and-or-icmps.ll
@@ -3332,3 +3332,93 @@ define i1 @icmp_eq_or_z_or_pow2orz_fail_bad_pred2(i8 %x, i8 %y) {
   %r = or i1 %c0, %cp2
   ret i1 %r
 }
+
+define i1 @and_slt_to_mask(i8 %x) {
+; CHECK-LABEL: @and_slt_to_mask(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[X:%.*]], -124
+; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], 2
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[AND]], 0
+; CHECK-NEXT:    [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]
+; CHECK-NEXT:    ret i1 [[AND2]]
+;
+  %cmp = icmp slt i8 %x, -124
+  %and = and i8 %x, 2
+  %cmp2 = icmp eq i8 %and, 0
+  %and2 = and i1 %cmp, %cmp2
+  ret i1 %and2
+}
+
+define i1 @and_slt_to_mask_off_by_one(i8 %x) {
+; CHECK-LABEL: @and_slt_to_mask_off_by_one(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[X:%.*]], -123
+; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], 2
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[AND]], 0
+; CHECK-NEXT:    [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]
+; CHECK-NEXT:    ret i1 [[AND2]]
+;
+  %cmp = icmp slt i8 %x, -123
+  %and = and i8 %x, 2
+  %cmp2 = icmp eq i8 %and, 0
+  %and2 = and i1 %cmp, %cmp2
+  ret i1 %and2
+}
+
+define i1 @and_sgt_to_mask(i8 %x) {
+; CHECK-LABEL: @and_sgt_to_mask(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], 123
+; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], 2
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[AND]], 0
+; CHECK-NEXT:    [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]
+; CHECK-NEXT:    ret i1 [[AND2]]
+;
+  %cmp = icmp sgt i8 %x, 123
+  %and = and i8 %x, 2
+  %cmp2 = icmp eq i8 %and, 0
+  %and2 = and i1 %cmp, %cmp2
+  ret i1 %and2
+}
+
+define i1 @and_sgt_to_mask_off_by_one(i8 %x) {
+; CHECK-LABEL: @and_sgt_to_mask_off_by_one(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp sgt i8 [[X:%.*]], 124
+; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], 2
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[AND]], 0
+; CHECK-NEXT:    [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]
+; CHECK-NEXT:    ret i1 [[AND2]]
+;
+  %cmp = icmp sgt i8 %x, 124
+  %and = and i8 %x, 2
+  %cmp2 = icmp eq i8 %and, 0
+  %and2 = and i1 %cmp, %cmp2
+  ret i1 %and2
+}
+
+define i1 @and_ugt_to_mask(i8 %x) {
+; CHECK-LABEL: @and_ugt_to_mask(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], -5
+; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], 2
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[AND]], 0
+; CHECK-NEXT:    [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]
+; CHECK-NEXT:    ret i1 [[AND2]]
+;
+  %cmp = icmp ugt i8 %x, -5
+  %and = and i8 %x, 2
+  %cmp2 = icmp eq i8 %and, 0
+  %and2 = and i1 %cmp, %cmp2
+  ret i1 %and2
+}
+
+define i1 @and_ugt_to_mask_off_by_one(i8 %x) {
+; CHECK-LABEL: @and_ugt_to_mask_off_by_one(
+; CHECK-NEXT:    [[CMP:%.*]] = icmp ugt i8 [[X:%.*]], -6
+; CHECK-NEXT:    [[AND:%.*]] = and i8 [[X]], 2
+; CHECK-NEXT:    [[CMP2:%.*]] = icmp eq i8 [[AND]], 0
+; CHECK-NEXT:    [[AND2:%.*]] = and i1 [[CMP]], [[CMP2]]
+; CHECK-NEXT:    ret i1 [[AND2]]
+;
+  %cmp = icmp ugt i8 %x, -6
+  %and = and i8 %x, 2
+  %cmp2 = icmp eq i8 %and, 0
+  %and2 = and i1 %cmp, %cmp2
+  ret i1 %and2
+}