bitstream generation changes net routing

[rs-dhow]

On larger designs, bitstream generation appears to change the routing.

The bits were read back in and the routing tracked. No net ever changed the set of OPINs and IPINs it used.

However, sometimes a path would tap a CHANX/CHANY at a different coordinate, and more seriously, sometimes the set of CHANX/CHANY nodes used was not the same.

This means the .route file read in by OpenFPGA is not a faithful representation of what happens later.

Any of these would be preferable:

1. This re-routing never happens.
2. There is an option to disable this re-routing.
3. OpenFPGA writes out a new .route file to describe what it did.

Due to disk space and other concerns, (1) and (2) are probably better than (3).

Thanks.

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