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Xilinx Block Memory Generator model for Cocotb

This extension a model for the Xilinx Block Memory Generator when set with the following configurations:

  • Interface Type: AXI4
  • Memory Type: Simple Dual Port RAM.

With the above configuration, a second port (Port B) is enabled where you can read from memory.

Signal mappings to model

Refer to the Port B signals here.

Port B signal Model instance attribute
addrb instance.portb.addr
doutb instance.portb.dout
dinb instance.portb.din
enb instance.portb.en
web instance.portb.we