forked from micropython/micropython
-
Notifications
You must be signed in to change notification settings - Fork 0
/
machine_adc.c
541 lines (485 loc) · 18.2 KB
/
machine_adc.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
/*
* This file is part of the MicroPython project, http://micropython.org/
*
* The MIT License (MIT)
*
* Copyright (c) 2019 Damien P. George
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
*/
#include "py/runtime.h"
#include "py/mphal.h"
#include "adc.h"
#if defined(STM32F0) || defined(STM32G0) || defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
#define ADC_V2 (1)
#else
#define ADC_V2 (0)
#endif
#if defined(STM32F4)
#define ADCx_COMMON ADC_COMMON_REGISTER(0)
#elif defined(STM32F7)
#define ADCx_COMMON ADC123_COMMON
#elif defined(STM32L4)
#define ADCx_COMMON __LL_ADC_COMMON_INSTANCE(0)
#endif
#if defined(STM32F0) || defined(STM32G0) || defined(STM32L0) || defined(STM32L1) || defined(STM32WL)
#define ADC_STAB_DELAY_US (1)
#define ADC_TEMPSENSOR_DELAY_US (10)
#elif defined(STM32G4)
#define ADC_STAB_DELAY_US (20)
#elif defined(STM32H5)
#define ADC_STAB_DELAY_US (1) // TODO: Check if this is enough
#elif defined(STM32L4)
#define ADC_STAB_DELAY_US (10)
#elif defined(STM32WB)
#define ADC_STAB_DELAY_US (1)
#endif
#if defined(STM32F0)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_13CYCLES_5
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_239CYCLES_5
#elif defined(STM32F4) || defined(STM32F7)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_15CYCLES
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_480CYCLES
#elif defined(STM32G4) || defined(STM32H5)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_12CYCLES_5
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_247CYCLES_5
#elif defined(STM32H7)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_8CYCLES_5
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_387CYCLES_5
#elif defined(STM32G0) || defined(STM32L0) || defined(STM32WL)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_12CYCLES_5
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_160CYCLES_5
#elif defined(STM32L1)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_384CYCLES
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_384CYCLES
#elif defined(STM32L4) || defined(STM32WB)
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_12CYCLES_5
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_247CYCLES_5
#endif
// Timeout for waiting for end-of-conversion
#define ADC_EOC_TIMEOUT_MS (10)
// This is a synthesised channel representing the maximum ADC reading (useful to scale other channels)
#define ADC_CHANNEL_VREF (0xffff)
static inline void adc_stabilisation_delay_us(uint32_t us) {
mp_hal_delay_us(us + 1);
}
STATIC void adc_wait_eoc(ADC_TypeDef *adc, int32_t timeout_ms) {
uint32_t t0 = mp_hal_ticks_ms();
#if ADC_V2
while (!(adc->ISR & ADC_ISR_EOC))
#else
while (!(adc->SR & ADC_SR_EOC))
#endif
{
if (mp_hal_ticks_ms() - t0 > timeout_ms) {
break; // timeout
}
}
}
#if defined(STM32H7)
STATIC const uint8_t adc_cr_to_bits_table[] = {16, 14, 12, 10, 8, 8, 8, 8};
#else
STATIC const uint8_t adc_cr_to_bits_table[] = {12, 10, 8, 6};
#endif
void adc_config(ADC_TypeDef *adc, uint32_t bits) {
// Configure ADC clock source and enable ADC clock
#if defined(STM32G0) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
__HAL_RCC_ADC_CONFIG(RCC_ADCCLKSOURCE_SYSCLK);
__HAL_RCC_ADC_CLK_ENABLE();
#else
if (adc == ADC1) {
#if defined(STM32H5)
__HAL_RCC_ADC_CLK_ENABLE();
#elif defined(STM32G4) || defined(STM32H7)
__HAL_RCC_ADC12_CLK_ENABLE();
#else
__HAL_RCC_ADC1_CLK_ENABLE();
#endif
}
#if defined(ADC2)
if (adc == ADC2) {
#if defined(STM32H5)
__HAL_RCC_ADC_CLK_ENABLE();
#elif defined(STM32G4) || defined(STM32H7)
__HAL_RCC_ADC12_CLK_ENABLE();
#else
__HAL_RCC_ADC2_CLK_ENABLE();
#endif
}
#endif
#if defined(ADC3)
if (adc == ADC3) {
#if defined(ADC345_COMMON)
__HAL_RCC_ADC345_CLK_ENABLE();
#else
__HAL_RCC_ADC3_CLK_ENABLE();
#endif
}
#endif
#endif
// Configure clock mode
#if defined(STM32F0)
adc->CFGR2 = 2 << ADC_CFGR2_CKMODE_Pos; // PCLK/4 (synchronous clock mode)
#elif defined(STM32F4) || defined(STM32F7) || defined(STM32L4)
ADCx_COMMON->CCR = 0; // ADCPR=PCLK/2
#elif defined(STM32G4)
ADC12_COMMON->CCR = 7 << ADC_CCR_PRESC_Pos; // PCLK/16 (asynchronous clock mode)
#elif defined(STM32H5) || defined(STM32H7A3xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xx) || defined(STM32H7B3xxQ)
ADC12_COMMON->CCR = 3 << ADC_CCR_CKMODE_Pos;
#elif defined(STM32H7)
ADC12_COMMON->CCR = 3 << ADC_CCR_CKMODE_Pos;
ADC3_COMMON->CCR = 3 << ADC_CCR_CKMODE_Pos;
#elif defined(STM32L0)
ADC1_COMMON->CCR = 0; // ADCPR=PCLK/2
#elif defined(STM32WB)
ADC1_COMMON->CCR = 0 << ADC_CCR_PRESC_Pos | 0 << ADC_CCR_CKMODE_Pos; // PRESC=1, MODE=ASYNC
#elif defined(STM32WL)
ADC_COMMON->CCR = 0 << ADC_CCR_PRESC_Pos; // PRESC=1
#endif
#if defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
if (adc->CR & ADC_CR_DEEPPWD) {
adc->CR = 0; // disable deep powerdown
}
#endif
#if defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L0) || defined(STM32L4) || defined(STM32WB) || defined(STM32WL)
if (!(adc->CR & ADC_CR_ADVREGEN)) {
adc->CR = ADC_CR_ADVREGEN; // enable VREG
#if defined(STM32H7)
mp_hal_delay_us(10); // T_ADCVREG_STUP
#elif defined(STM32G4) || defined(STM32L4) || defined(STM32WB)
mp_hal_delay_us(20); // T_ADCVREG_STUP
#endif
}
#endif
#if ADC_V2
if (!(adc->CR & ADC_CR_ADEN)) {
// ADC isn't enabled so calibrate it now
#if defined(STM32F0) || defined(STM32G0) || defined(STM32L0) || defined(STM32WL)
LL_ADC_StartCalibration(adc);
#elif defined(STM32G4) || defined(STM32H5) || defined(STM32L4) || defined(STM32WB)
LL_ADC_StartCalibration(adc, LL_ADC_SINGLE_ENDED);
#else
LL_ADC_StartCalibration(adc, LL_ADC_CALIB_OFFSET_LINEARITY, LL_ADC_SINGLE_ENDED);
#endif
while (LL_ADC_IsCalibrationOnGoing(adc)) {
}
}
if (adc->CR & ADC_CR_ADEN) {
// ADC enabled, need to disable it to change configuration
if (adc->CR & ADC_CR_ADSTART) {
adc->CR |= ADC_CR_ADSTP;
while (adc->CR & ADC_CR_ADSTP) {
}
}
adc->CR |= ADC_CR_ADDIS;
while (adc->CR & ADC_CR_ADDIS) {
}
}
#endif
// Find resolution, defaulting to last element in table
uint32_t res;
for (res = 0; res <= MP_ARRAY_SIZE(adc_cr_to_bits_table); ++res) {
if (adc_cr_to_bits_table[res] == bits) {
break;
}
}
#if defined(STM32F0) || defined(STM32L0)
uint32_t cfgr1_clr = ADC_CFGR1_CONT | ADC_CFGR1_EXTEN | ADC_CFGR1_ALIGN | ADC_CFGR1_RES | ADC_CFGR1_DMAEN;
uint32_t cfgr1 = res << ADC_CFGR1_RES_Pos;
adc->CFGR1 = (adc->CFGR1 & ~cfgr1_clr) | cfgr1;
#elif defined(STM32F4) || defined(STM32F7)
uint32_t cr1_clr = ADC_CR1_RES;
uint32_t cr1 = res << ADC_CR1_RES_Pos;
adc->CR1 = (adc->CR1 & ~cr1_clr) | cr1;
uint32_t cr2_clr = ADC_CR2_EXTEN | ADC_CR2_ALIGN | ADC_CR2_DMA | ADC_CR2_CONT;
uint32_t cr2 = 0;
adc->CR2 = (adc->CR2 & ~cr2_clr) | cr2;
adc->SQR1 = 1 << ADC_SQR1_L_Pos; // 1 conversion in regular sequence
#elif defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
uint32_t cfgr_clr = ADC_CFGR_CONT | ADC_CFGR_EXTEN | ADC_CFGR_RES;
#if defined(STM32H7)
cfgr_clr |= ADC_CFGR_DMNGT;
#else
cfgr_clr |= ADC_CFGR_ALIGN | ADC_CFGR_DMAEN;
#endif
uint32_t cfgr = res << ADC_CFGR_RES_Pos;
adc->CFGR = (adc->CFGR & ~cfgr_clr) | cfgr;
#endif
}
STATIC int adc_get_bits(ADC_TypeDef *adc) {
#if defined(STM32F0) || defined(STM32G0) || defined(STM32L0) || defined(STM32WL)
uint32_t res = (adc->CFGR1 & ADC_CFGR1_RES) >> ADC_CFGR1_RES_Pos;
#elif defined(STM32F4) || defined(STM32F7) || defined(STM32L1)
uint32_t res = (adc->CR1 & ADC_CR1_RES) >> ADC_CR1_RES_Pos;
#elif defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
uint32_t res = (adc->CFGR & ADC_CFGR_RES) >> ADC_CFGR_RES_Pos;
#endif
return adc_cr_to_bits_table[res];
}
STATIC void adc_config_channel(ADC_TypeDef *adc, uint32_t channel, uint32_t sample_time) {
#if ADC_V2
if (!(adc->CR & ADC_CR_ADEN)) {
if (adc->CR & 0x3f) {
// Cannot enable ADC with CR!=0
return;
}
adc->ISR = ADC_ISR_ADRDY; // clear ADRDY
adc->CR |= ADC_CR_ADEN;
adc_stabilisation_delay_us(ADC_STAB_DELAY_US);
while (!(adc->ISR & ADC_ISR_ADRDY)) {
}
}
#else
if (!(adc->CR2 & ADC_CR2_ADON)) {
adc->CR2 |= ADC_CR2_ADON;
adc_stabilisation_delay_us(ADC_STAB_DELAY_US);
}
#endif
#if defined(STM32F0) || defined(STM32G0) || defined(STM32L0)
if (channel == ADC_CHANNEL_VREFINT) {
ADC1_COMMON->CCR |= ADC_CCR_VREFEN;
} else if (channel == ADC_CHANNEL_TEMPSENSOR) {
ADC1_COMMON->CCR |= ADC_CCR_TSEN;
adc_stabilisation_delay_us(ADC_TEMPSENSOR_DELAY_US);
#if defined(ADC_CHANNEL_VBAT)
} else if (channel == ADC_CHANNEL_VBAT) {
ADC1_COMMON->CCR |= ADC_CCR_VBATEN;
#endif
}
#if defined(STM32G0)
adc->SMPR = sample_time << ADC_SMPR_SMP1_Pos; // select sample time from SMP1 (default)
#else
adc->SMPR = sample_time << ADC_SMPR_SMP_Pos; // select sample time
#endif
adc->CHSELR = 1 << channel; // select channel for conversion
#elif defined(STM32F4) || defined(STM32F7)
if (channel == ADC_CHANNEL_VREFINT || channel == ADC_CHANNEL_TEMPSENSOR) {
ADCx_COMMON->CCR = (ADCx_COMMON->CCR & ~ADC_CCR_VBATE) | ADC_CCR_TSVREFE;
if (channel == ADC_CHANNEL_TEMPSENSOR) {
adc_stabilisation_delay_us(ADC_TEMPSENSOR_DELAY_US);
}
} else if (channel == ADC_CHANNEL_VBAT) {
ADCx_COMMON->CCR |= ADC_CCR_VBATE;
}
adc->SQR3 = (channel & 0x1f) << ADC_SQR3_SQ1_Pos; // select channel for first conversion
__IO uint32_t *smpr;
if (channel <= 9) {
smpr = &adc->SMPR2;
} else {
smpr = &adc->SMPR1;
channel -= 10;
}
*smpr = (*smpr & ~(7 << (channel * 3))) | sample_time << (channel * 3); // select sample time
#elif defined(STM32G4) || defined(STM32H5) || defined(STM32H7) || defined(STM32L4) || defined(STM32WB)
#if defined(STM32G4) || defined(STM32H5) || defined(STM32H7A3xx) || defined(STM32H7A3xxQ) || defined(STM32H7B3xx) || defined(STM32H7B3xxQ)
ADC_Common_TypeDef *adc_common = ADC12_COMMON;
#elif defined(STM32H7)
#if defined(ADC_VER_V5_V90)
if (adc != ADC3) {
adc->PCSEL_RES0 |= 1 << channel;
}
#else
adc->PCSEL |= 1 << channel;
#endif
ADC_Common_TypeDef *adc_common = adc == ADC3 ? ADC3_COMMON : ADC12_COMMON;
#elif defined(STM32L4)
ADC_Common_TypeDef *adc_common = ADCx_COMMON;
#elif defined(STM32WB)
ADC_Common_TypeDef *adc_common = ADC1_COMMON;
#endif
if (channel == ADC_CHANNEL_VREFINT) {
adc_common->CCR |= ADC_CCR_VREFEN;
#if defined(STM32G4)
} else if (channel == ADC_CHANNEL_TEMPSENSOR_ADC1) {
adc_common->CCR |= ADC_CCR_VSENSESEL;
#else
} else if (channel == ADC_CHANNEL_TEMPSENSOR) {
adc_common->CCR |= ADC_CCR_TSEN;
#endif
adc_stabilisation_delay_us(ADC_TEMPSENSOR_DELAY_US);
} else if (channel == ADC_CHANNEL_VBAT) {
#if defined(STM32G4)
adc_common->CCR |= ADC_CCR_VBATSEL;
#else
adc_common->CCR |= ADC_CCR_VBATEN;
#endif
}
#if defined(STM32G4)
channel = __LL_ADC_CHANNEL_TO_DECIMAL_NB(channel);
adc->DIFSEL &= ~(1 << channel); // Set channel to Single-ended.
#endif
adc->SQR1 = (channel & 0x1f) << ADC_SQR1_SQ1_Pos | (1 - 1) << ADC_SQR1_L_Pos;
__IO uint32_t *smpr;
if (channel <= 9) {
smpr = &adc->SMPR1;
} else {
smpr = &adc->SMPR2;
channel -= 10;
}
*smpr = (*smpr & ~(7 << (channel * 3))) | sample_time << (channel * 3); // select sample time
#endif
}
STATIC uint32_t adc_read_channel(ADC_TypeDef *adc) {
uint32_t value;
#if defined(STM32G4)
// For STM32G4 there is errata 2.7.7, "Wrong ADC result if conversion done late after
// calibration or previous conversion". According to the errata, this can be avoided
// by performing two consecutive ADC conversions and keeping the second result.
for (uint8_t i = 0; i < 2; i++)
#endif
{
#if ADC_V2
adc->CR |= ADC_CR_ADSTART;
#else
adc->CR2 |= ADC_CR2_SWSTART;
#endif
adc_wait_eoc(adc, ADC_EOC_TIMEOUT_MS);
value = adc->DR;
}
return value;
}
uint32_t adc_config_and_read_u16(ADC_TypeDef *adc, uint32_t channel, uint32_t sample_time) {
if (channel == ADC_CHANNEL_VREF) {
return 0xffff;
}
// Select, configure and read the channel.
adc_config_channel(adc, channel, sample_time);
uint32_t raw = adc_read_channel(adc);
// If VBAT was sampled then deselect it to prevent battery drain.
adc_deselect_vbat(adc, channel);
// Scale raw reading to 16 bit value using a Taylor expansion (for bits <= 16).
uint32_t bits = adc_get_bits(adc);
if (bits < 8) {
// For 6 and 7 bits
return raw << (16 - bits) | raw << (16 - 2 * bits) | raw >> (3 * bits - 16);
}
return raw << (16 - bits) | raw >> (2 * bits - 16);
}
/******************************************************************************/
// MicroPython bindings for machine.ADC
#if !BUILDING_MBOOT
const mp_obj_type_t machine_adc_type;
typedef struct _machine_adc_obj_t {
mp_obj_base_t base;
ADC_TypeDef *adc;
uint32_t channel;
uint32_t sample_time;
} machine_adc_obj_t;
STATIC void machine_adc_print(const mp_print_t *print, mp_obj_t self_in, mp_print_kind_t kind) {
machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
unsigned adc_id = 1;
#if defined(ADC2)
if (self->adc == ADC2) {
adc_id = 2;
}
#endif
#if defined(ADC3)
if (self->adc == ADC3) {
adc_id = 3;
}
#endif
mp_printf(print, "<ADC%u channel=%u>", adc_id, self->channel);
}
// ADC(id)
STATIC mp_obj_t machine_adc_make_new(const mp_obj_type_t *type, size_t n_args, size_t n_kw, const mp_obj_t *all_args) {
// Check number of arguments
mp_arg_check_num(n_args, n_kw, 1, 1, false);
mp_obj_t source = all_args[0];
uint32_t channel;
uint32_t sample_time = ADC_SAMPLETIME_DEFAULT;
ADC_TypeDef *adc;
if (mp_obj_is_int(source)) {
#if defined(STM32WL)
adc = ADC;
#else
adc = ADC1;
#endif
channel = mp_obj_get_int(source);
if (channel == ADC_CHANNEL_VREFINT
#if defined(STM32G4)
|| channel == ADC_CHANNEL_TEMPSENSOR_ADC1
#else
|| channel == ADC_CHANNEL_TEMPSENSOR
#endif
#if defined(ADC_CHANNEL_VBAT)
|| channel == ADC_CHANNEL_VBAT
#endif
) {
sample_time = ADC_SAMPLETIME_DEFAULT_INT;
}
} else {
const pin_obj_t *pin = pin_find(source);
if (pin->adc_num & PIN_ADC1) {
#if defined(STM32WL)
adc = ADC;
#else
adc = ADC1;
#endif
#if defined(ADC2)
} else if (pin->adc_num & PIN_ADC2) {
adc = ADC2;
#endif
#if defined(ADC3)
} else if (pin->adc_num & PIN_ADC3) {
adc = ADC3;
#endif
} else {
// No ADC function on given pin
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT("Pin(%q) does not have ADC capabilities"), pin->name);
}
channel = pin->adc_channel;
// Configure the GPIO pin in ADC mode
mp_hal_pin_config(pin, MP_HAL_PIN_MODE_ADC, MP_HAL_PIN_PULL_NONE, 0);
}
adc_config(adc, 12);
machine_adc_obj_t *o = mp_obj_malloc(machine_adc_obj_t, &machine_adc_type);
o->adc = adc;
o->channel = channel;
o->sample_time = sample_time;
return MP_OBJ_FROM_PTR(o);
}
// read_u16()
STATIC mp_obj_t machine_adc_read_u16(mp_obj_t self_in) {
machine_adc_obj_t *self = MP_OBJ_TO_PTR(self_in);
return MP_OBJ_NEW_SMALL_INT(adc_config_and_read_u16(self->adc, self->channel, self->sample_time));
}
MP_DEFINE_CONST_FUN_OBJ_1(machine_adc_read_u16_obj, machine_adc_read_u16);
STATIC const mp_rom_map_elem_t machine_adc_locals_dict_table[] = {
{ MP_ROM_QSTR(MP_QSTR_read_u16), MP_ROM_PTR(&machine_adc_read_u16_obj) },
{ MP_ROM_QSTR(MP_QSTR_VREF), MP_ROM_INT(ADC_CHANNEL_VREF) },
{ MP_ROM_QSTR(MP_QSTR_CORE_VREF), MP_ROM_INT(ADC_CHANNEL_VREFINT) },
#if defined(STM32G4)
{ MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMPSENSOR_ADC1) },
#else
{ MP_ROM_QSTR(MP_QSTR_CORE_TEMP), MP_ROM_INT(ADC_CHANNEL_TEMPSENSOR) },
#endif
#if defined(ADC_CHANNEL_VBAT)
{ MP_ROM_QSTR(MP_QSTR_CORE_VBAT), MP_ROM_INT(ADC_CHANNEL_VBAT) },
#endif
};
STATIC MP_DEFINE_CONST_DICT(machine_adc_locals_dict, machine_adc_locals_dict_table);
MP_DEFINE_CONST_OBJ_TYPE(
machine_adc_type,
MP_QSTR_ADC,
MP_TYPE_FLAG_NONE,
make_new, machine_adc_make_new,
print, machine_adc_print,
locals_dict, &machine_adc_locals_dict
);
#endif