diff --git a/.devcontainer/Dockerfile.All b/.devcontainer/Dockerfile.All index 24e3eaeca5..69b6263c09 100644 --- a/.devcontainer/Dockerfile.All +++ b/.devcontainer/Dockerfile.All @@ -1 +1 @@ -FROM ghcr.io/nanoframework/dev-container-all:v2.5 \ No newline at end of file +FROM ghcr.io/nanoframework/dev-container-all:v2.9 \ No newline at end of file diff --git a/.devcontainer/Dockerfile.AzureRTOS b/.devcontainer/Dockerfile.AzureRTOS index 750110795f..01ccf2f3c7 100644 --- a/.devcontainer/Dockerfile.AzureRTOS +++ b/.devcontainer/Dockerfile.AzureRTOS @@ -1 +1 @@ -FROM ghcr.io/nanoframework/dev-container-azure-rtos:v1.1 \ No newline at end of file +FROM ghcr.io/nanoframework/dev-container-azure-rtos:v1.2 \ No newline at end of file diff --git a/.devcontainer/Dockerfile.ChibiOS b/.devcontainer/Dockerfile.ChibiOS index afd335d621..7f8f410b8b 100644 --- a/.devcontainer/Dockerfile.ChibiOS +++ b/.devcontainer/Dockerfile.ChibiOS @@ -1 +1 @@ -FROM ghcr.io/nanoframework/dev-container-chibios:v1.3 \ No newline at end of file +FROM ghcr.io/nanoframework/dev-container-chibios:v1.4 \ No newline at end of file diff --git a/.devcontainer/Dockerfile.ESP32 b/.devcontainer/Dockerfile.ESP32 index 9daf1259c5..55fa1f676e 100644 --- a/.devcontainer/Dockerfile.ESP32 +++ b/.devcontainer/Dockerfile.ESP32 @@ -1 +1 @@ -FROM ghcr.io/nanoframework/dev-container-esp32:v2.4 \ No newline at end of file +FROM ghcr.io/nanoframework/dev-container-esp32:v2.7 \ No newline at end of file diff --git a/.devcontainer/Dockerfile.TI b/.devcontainer/Dockerfile.TI index 3f36bdca23..91376d80dd 100644 --- a/.devcontainer/Dockerfile.TI +++ b/.devcontainer/Dockerfile.TI @@ -1 +1 @@ -FROM ghcr.io/nanoframework/dev-container-ti:v1.2 \ No newline at end of file +FROM ghcr.io/nanoframework/dev-container-ti:v1.4 \ No newline at end of file diff --git a/.devcontainer/README.md b/.devcontainer/README.md index ad2eca8059..723c141096 100644 Binary files a/.devcontainer/README.md and b/.devcontainer/README.md differ diff --git a/.devcontainer/sources/Dockerfile.All b/.devcontainer/sources/Dockerfile.All index 724d9c5f5e..9760f5b409 100644 --- a/.devcontainer/sources/Dockerfile.All +++ b/.devcontainer/sources/Dockerfile.All @@ -74,13 +74,13 @@ RUN git clone --branch STABLE-2_0_3_RELEASE https://git.savannah.nongnu.org/git/ ENV GIT_SSL_NO_VERIFY=0 # Clone ESP-IDF -RUN git clone --branch v4.3.2 https://github.com/espressif/esp-idf --depth 1 --recursive ./sources/esp-idf +RUN git clone --branch v4.4 https://github.com/espressif/esp-idf --depth 1 --recursive ./sources/esp-idf # Clone what is needed for TI RUN git clone --branch 4.10.00.07 https://github.com/nanoframework/SimpleLink_CC32xx_SDK.git --depth 1 ./sources/SimpleLinkCC32 \ # you can't use the nanoFramework repository as it's Windows only # && git clone --branch 3.61.00.16 https://github.com/nanoframework/TI_XDCTools.git --depth 1 ./sources/TI_XDCTools \ - && git clone --branch 5.30.01.01 https://github.com/nanoframework/SimpleLink_CC13xx_26xx_SDK.git --depth 1 ./sources/SimpleLinkCC13 \ + && git clone --branch 5.40.00.40 https://github.com/nanoframework/SimpleLink_CC13xx_26xx_SDK.git --depth 1 ./sources/SimpleLinkCC13 \ && git clone --branch 1.10.0 https://github.com/nanoframework/TI_SysConfig.git --depth 1 ./sources/TI_SysConfig \ && chmod +x ./sources/TI_SysConfig/sysconfig_cli.sh @@ -104,7 +104,7 @@ RUN ln -fs /usr/bin/python3 /usr/bin/python \ ENV IDF_PATH=/sources/esp-idf RUN python -m pip install -r $IDF_PATH/requirements.txt RUN $IDF_PATH/install.sh -ENV PATH=$PATH:/$IDF_PATH/components/esptool_py/esptool:/$IDF_PATH/components/espcoredump:/$IDF_PATH/components/partition_table/:/$IDF_PATH/tools/:$IDF_PATH/components/app_update:/root/.espressif/tools/xtensa-esp32-elf/esp-2021r2-8.4.0/xtensa-esp32-elf/bin:/root/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-8.4.0/xtensa-esp32s2-elf/bin:/root/.espressif/tools/riscv32-esp-elf/esp-2021r2-8.4.0/riscv32-esp-elf/bin +ENV PATH=$PATH:$IDF_PATH/components/esptool_py/esptool:$IDF_PATH/components/espcoredump:$IDF_PATH/components/partition_table/:$IDF_PATH/tools/:$IDF_PATH/components/app_update:/root/.espressif/tools/xtensa-esp32-elf/esp-2021r2-8.4.0/xtensa-esp32-elf/bin:/root/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-8.4.0/xtensa-esp32s2-elf/bin:/root/.espressif/tools/riscv32-esp-elf/esp-2021r2-8.4.0/riscv32-esp-elf/bin # Clean up downloaded files RUN apt-get autoremove -y \ diff --git a/.devcontainer/sources/Dockerfile.ESP32 b/.devcontainer/sources/Dockerfile.ESP32 index 97a899156f..c6ab8c5a88 100644 --- a/.devcontainer/sources/Dockerfile.ESP32 +++ b/.devcontainer/sources/Dockerfile.ESP32 @@ -47,13 +47,9 @@ RUN mkdir -p /usr/local/bin/gcc # Clone mbedtls and fatfs RUN git clone --branch mbedtls-2.28.0 https://github.com/ARMmbed/mbedtls.git --depth 1 ./sources/mbedtls \ && git clone --branch R0.14 https://github.com/abbrev/fatfs.git --depth 1 ./sources/fatfs -# Clone FreeRTOS and what is needed for ESP32 -RUN git clone --branch V10.4.1-kernel-only https://github.com/FreeRTOS/FreeRTOS-Kernel.git --depth 1 ./sources/FreeRTOS \ - && git clone --branch 5.5.1 https://github.com/ARM-software/CMSIS_5.git --depth 1 ./sources/CMSIS_5 \ - && git clone --branch nf-build https://github.com/nanoframework/spiffs.git --depth 1 ./sources/spiffs # Clone ESP-IDF -RUN git clone --branch v4.3.2 https://github.com/espressif/esp-idf --depth 1 --recursive ./sources/esp-idf +RUN git clone --branch v4.4 https://github.com/espressif/esp-idf --depth 1 --recursive ./sources/esp-idf # Copy from our other container COPY --from=downloader /tmp/dc-extracted/gcc /usr/local/bin/gcc @@ -68,7 +64,7 @@ RUN ln -fs /usr/bin/python3 /usr/bin/python \ ENV IDF_PATH=/sources/esp-idf RUN python -m pip install -r $IDF_PATH/requirements.txt RUN $IDF_PATH/install.sh -ENV PATH=$PATH:/$IDF_PATH/components/esptool_py/esptool:/$IDF_PATH/components/espcoredump:/$IDF_PATH/components/partition_table/:/$IDF_PATH/tools/:$IDF_PATH/components/app_update:/root/.espressif/tools/xtensa-esp32-elf/esp-2021r2-8.4.0/xtensa-esp32-elf/bin:/root/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-8.4.0/xtensa-esp32s2-elf/bin:/root/.espressif/tools/riscv32-esp-elf/esp-2021r2-8.4.0/riscv32-esp-elf/bin +ENV PATH=$PATH:$IDF_PATH/components/esptool_py/esptool:$IDF_PATH/components/espcoredump:$IDF_PATH/components/partition_table/:$IDF_PATH/tools/:$IDF_PATH/components/app_update:/root/.espressif/tools/xtensa-esp32-elf/esp-2021r2-8.4.0/xtensa-esp32-elf/bin:/root/.espressif/tools/xtensa-esp32s2-elf/esp-2021r2-8.4.0/xtensa-esp32s2-elf/bin:/root/.espressif/tools/riscv32-esp-elf/esp-2021r2-8.4.0/riscv32-esp-elf/bin # Clean up downloaded files RUN apt-get autoremove -y \ diff --git a/.devcontainer/sources/Dockerfile.TI b/.devcontainer/sources/Dockerfile.TI index 15ee8d897c..77eb8fbb62 100644 --- a/.devcontainer/sources/Dockerfile.TI +++ b/.devcontainer/sources/Dockerfile.TI @@ -47,14 +47,11 @@ RUN apt-get update \ RUN mkdir -p /usr/local/bin/gcc \ && mkdir -p /usr/local/bin/titools -# Clone mbedtls and fatfs -RUN git clone --branch mbedtls-2.28.0 https://github.com/ARMmbed/mbedtls.git --depth 1 ./sources/mbedtls \ - && git clone --branch R0.14 https://github.com/abbrev/fatfs.git --depth 1 ./sources/fatfs # Clone what is needed for TI RUN git clone --branch 4.10.00.07 https://github.com/nanoframework/SimpleLink_CC32xx_SDK.git --depth 1 ./sources/SimpleLinkCC32 \ # you can't use the nanoFramework repository as it's Windows only # && git clone --branch 3.61.00.16 https://github.com/nanoframework/TI_XDCTools.git --depth 1 ./sources/TI_XDCTools \ - && git clone --branch 5.30.01.01 https://github.com/nanoframework/SimpleLink_CC13xx_26xx_SDK.git --depth 1 ./sources/SimpleLinkCC13 \ + && git clone --branch 5.40.00.40 https://github.com/nanoframework/SimpleLink_CC13xx_26xx_SDK.git --depth 1 ./sources/SimpleLinkCC13 \ && git clone --branch 1.10.0 https://github.com/nanoframework/TI_SysConfig.git --depth 1 ./sources/TI_SysConfig \ && chmod +x ./sources/TI_SysConfig/sysconfig_cli.sh diff --git a/.github/PULL_REQUEST_TEMPLATE.md b/.github/PULL_REQUEST_TEMPLATE.md new file mode 100644 index 0000000000..126e68b2a7 --- /dev/null +++ b/.github/PULL_REQUEST_TEMPLATE.md @@ -0,0 +1,40 @@ + + + +## Description + + + +## Motivation and Context + + + +- Fixes/Closes/Resolves nanoFramework/Home#NNNN + +## How Has This Been Tested? + + + + +## Screenshots + +## Types of changes + +- [ ] Improvement (non-breaking change that improves a feature, code or algorithm) +- [ ] Bug fix (non-breaking change which fixes an issue with code or algorithm) +- [ ] New feature (non-breaking change which adds functionality to code) +- [ ] Breaking change (fix or feature that would cause existing functionality to change) +- [ ] Config and build (change in the configuration and build system, has no impact on code or features) +- [ ] Dev Containers (changes related with Dev Containers, has no impact on code or features) +- [ ] Dependencies (update dependencies and changes associated, has no impact on code or features) +- [ ] Documentation (changes or updates in the documentation, has no impact on code or features) + +## Checklist + + + +- [ ] My code follows the code style of this project (only if there are changes in source code). +- [ ] My changes require an update to the documentation (there are changes that require the docs website to be updated). +- [ ] I have updated the documentation accordingly (the changes require an update on the docs in this repo). +- [ ] I have read the [CONTRIBUTING](https://github.com/nanoframework/.github/blob/main/CONTRIBUTING.md) document. +- [ ] I have tested everything locally and all new and existing tests passed (only if there are changes in source code). diff --git a/.github/workflows/all.yaml b/.github/workflows/devcontainer-all.yaml similarity index 53% rename from .github/workflows/all.yaml rename to .github/workflows/devcontainer-all.yaml index ad35bb1ceb..3af974fbed 100644 --- a/.github/workflows/all.yaml +++ b/.github/workflows/devcontainer-all.yaml @@ -1,31 +1,37 @@ -name: Build and push image for all RTOS +# Copyright (c) .NET Foundation and Contributors +# See LICENSE file in the project root for full license information. + +name: Build Dev Container for all platforms env: GCR_IMAGE: ghcr.io/nanoframework/dev-container-all - GCR_VERSION: v2.5 GCR_FILE: .devcontainer/sources/Dockerfile.All -# Controls when the action will run. on: - # Triggers the workflow on push or pull request events but only for the main branch push: - branches: [ develop ] - paths: [ .devcontainer/sources/Dockerfile.All ] + branches: + - develop + paths: + - '**Dockerfile.All' - # Allows you to run this workflow manually from the Actions tab workflow_dispatch: -# A workflow run is made up of one or more jobs that can run sequentially or in parallel jobs: - # This workflow contains a single job called "build" build: - # The type of runner that the job will run on runs-on: ubuntu-latest steps: - # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it + - name: Checkout Repository uses: actions/checkout@v2 + - name: Get container version + run: | + $dockerfileContent = Get-Content(".devcontainer/Dockerfile.All") + $dockerfileContent -match '(?<=\:)(?:[v]\d+.\d+)' + $containerVersion = $Matches[0].ToString() + echo "GCR_VERSION=$containerVersion" | Out-File -FilePath $Env:GITHUB_ENV -Encoding utf-8 -Append + shell: pwsh + - name: Login to GitHub Container Registry uses: docker/login-action@v1 with: @@ -40,4 +46,4 @@ jobs: push: true # Will only build if this is not here tags: | ${{ env.GCR_IMAGE }}:${{ env.GCR_VERSION }} - ${{ env.GCR_IMAGE }}:latest \ No newline at end of file + ${{ env.GCR_IMAGE }}:latest diff --git a/.github/workflows/azurertos.yaml b/.github/workflows/devcontainer-azurertos.yaml similarity index 53% rename from .github/workflows/azurertos.yaml rename to .github/workflows/devcontainer-azurertos.yaml index 5f7688105d..c0a0451be0 100644 --- a/.github/workflows/azurertos.yaml +++ b/.github/workflows/devcontainer-azurertos.yaml @@ -1,31 +1,37 @@ -name: Build and push image for Azure RTOS +# Copyright (c) .NET Foundation and Contributors +# See LICENSE file in the project root for full license information. + +name: Build Dev Container for Azure RTOS env: GCR_IMAGE: ghcr.io/nanoframework/dev-container-azure-rtos - GCR_VERSION: v1.1 GCR_FILE: .devcontainer/sources/Dockerfile.AzureRTOS -# Controls when the action will run. on: - # Triggers the workflow on push or pull request events but only for the main branch push: - branches: [ develop ] - paths: [ .devcontainer/sources/Dockerfile.AzureRTOS ] + branches: + - develop + paths: + - '**Dockerfile.AzureRTOS' - # Allows you to run this workflow manually from the Actions tab workflow_dispatch: -# A workflow run is made up of one or more jobs that can run sequentially or in parallel jobs: - # This workflow contains a single job called "build" build: - # The type of runner that the job will run on runs-on: ubuntu-latest steps: - # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it + - name: Checkout Repository uses: actions/checkout@v2 + - name: Get container version + run: | + $dockerfileContent = Get-Content(".devcontainer/Dockerfile.AzureRTOS") + $dockerfileContent -match '(?<=\:)(?:[v]\d+.\d+)' + $containerVersion = $Matches[0].ToString() + echo "GCR_VERSION=$containerVersion" | Out-File -FilePath $Env:GITHUB_ENV -Encoding utf-8 -Append + shell: pwsh + - name: Login to GitHub Container Registry uses: docker/login-action@v1 with: @@ -40,4 +46,5 @@ jobs: push: true # Will only build if this is not here tags: | ${{ env.GCR_IMAGE }}:${{ env.GCR_VERSION }} - ${{ env.GCR_IMAGE }}:latest \ No newline at end of file + ${{ env.GCR_IMAGE }}:latest + \ No newline at end of file diff --git a/.github/workflows/chibios.yaml b/.github/workflows/devcontainer-chibios.yaml similarity index 53% rename from .github/workflows/chibios.yaml rename to .github/workflows/devcontainer-chibios.yaml index 2809adaeb1..ee39c66d43 100644 --- a/.github/workflows/chibios.yaml +++ b/.github/workflows/devcontainer-chibios.yaml @@ -1,31 +1,37 @@ -name: Build and push ChibiOS image +# Copyright (c) .NET Foundation and Contributors +# See LICENSE file in the project root for full license information. + +name: Build Dev Container for ChibiOS env: GCR_IMAGE: ghcr.io/nanoframework/dev-container-chibios - GCR_VERSION: v1.3 GCR_FILE: .devcontainer/sources/Dockerfile.ChibiOS -# Controls when the action will run. on: - # Triggers the workflow on push or pull request events but only for the main branch push: - branches: [ develop ] - paths: [ .devcontainer/sources/Dockerfile.ChibiOS ] + branches: + - develop + paths: + - '**Dockerfile.ChibiOS' - # Allows you to run this workflow manually from the Actions tab workflow_dispatch: -# A workflow run is made up of one or more jobs that can run sequentially or in parallel jobs: - # This workflow contains a single job called "build" build: - # The type of runner that the job will run on runs-on: ubuntu-latest steps: - # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it + - name: Checkout Repository uses: actions/checkout@v2 + - name: Get container version + run: | + $dockerfileContent = Get-Content(".devcontainer/Dockerfile.ChibiOS") + $dockerfileContent -match '(?<=\:)(?:[v]\d+.\d+)' + $containerVersion = $Matches[0].ToString() + echo "GCR_VERSION=$containerVersion" | Out-File -FilePath $Env:GITHUB_ENV -Encoding utf-8 -Append + shell: pwsh + - name: Login to GitHub Container Registry uses: docker/login-action@v1 with: @@ -40,4 +46,4 @@ jobs: push: true # Will only build if this is not here tags: | ${{ env.GCR_IMAGE }}:${{ env.GCR_VERSION }} - ${{ env.GCR_IMAGE }}:latest \ No newline at end of file + ${{ env.GCR_IMAGE }}:latest diff --git a/.github/workflows/esp32.yml b/.github/workflows/devcontainer-esp32.yml similarity index 53% rename from .github/workflows/esp32.yml rename to .github/workflows/devcontainer-esp32.yml index d4b7f2dec6..d62ca26fe3 100644 --- a/.github/workflows/esp32.yml +++ b/.github/workflows/devcontainer-esp32.yml @@ -1,31 +1,37 @@ -name: Build and push ESP32 image +# Copyright (c) .NET Foundation and Contributors +# See LICENSE file in the project root for full license information. + +name: Build Dev Container for ESP32 env: GCR_IMAGE: ghcr.io/nanoframework/dev-container-esp32 - GCR_VERSION: v2.4 GCR_FILE: .devcontainer/sources/Dockerfile.ESP32 -# Controls when the action will run. on: - # Triggers the workflow on push or pull request events but only for the main branch push: - branches: [ develop ] - paths: [ .devcontainer/sources/Dockerfile.ESP32 ] + branches: + - develop + paths: + - '**Dockerfile.ESP32' - # Allows you to run this workflow manually from the Actions tab workflow_dispatch: -# A workflow run is made up of one or more jobs that can run sequentially or in parallel jobs: - # This workflow contains a single job called "build" build: - # The type of runner that the job will run on runs-on: ubuntu-latest steps: - # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it + - name: Checkout Repository uses: actions/checkout@v2 + - name: Get container version + run: | + $dockerfileContent = Get-Content(".devcontainer/Dockerfile.ESP32") + $dockerfileContent -match '(?<=\:)(?:[v]\d+.\d+)' + $containerVersion = $Matches[0].ToString() + echo "GCR_VERSION=$containerVersion" | Out-File -FilePath $Env:GITHUB_ENV -Encoding utf-8 -Append + shell: pwsh + - name: Login to GitHub Container Registry uses: docker/login-action@v1 with: @@ -40,4 +46,4 @@ jobs: push: true # Will only build if this is not here tags: | ${{ env.GCR_IMAGE }}:${{ env.GCR_VERSION }} - ${{ env.GCR_IMAGE }}:latest \ No newline at end of file + ${{ env.GCR_IMAGE }}:latest diff --git a/.github/workflows/ti.yaml b/.github/workflows/devcontainer-ti.yaml similarity index 53% rename from .github/workflows/ti.yaml rename to .github/workflows/devcontainer-ti.yaml index 55012d71ba..a688f32c9a 100644 --- a/.github/workflows/ti.yaml +++ b/.github/workflows/devcontainer-ti.yaml @@ -1,31 +1,37 @@ -name: Build and push image for TI +# Copyright (c) .NET Foundation and Contributors +# See LICENSE file in the project root for full license information. + +name: Build Dev Container for TI env: GCR_IMAGE: ghcr.io/nanoframework/dev-container-ti - GCR_VERSION: v1.2 GCR_FILE: .devcontainer/sources/Dockerfile.TI -# Controls when the action will run. on: - # Triggers the workflow on push or pull request events but only for the main branch push: - branches: [ develop ] - paths: [ .devcontainer/sources/Dockerfile.TI ] + branches: + - develop + paths: + - '**Dockerfile.TI' - # Allows you to run this workflow manually from the Actions tab workflow_dispatch: -# A workflow run is made up of one or more jobs that can run sequentially or in parallel jobs: - # This workflow contains a single job called "build" build: - # The type of runner that the job will run on runs-on: ubuntu-latest steps: - # Checks-out your repository under $GITHUB_WORKSPACE, so your job can access it + - name: Checkout Repository uses: actions/checkout@v2 + - name: Get container version + run: | + $dockerfileContent = Get-Content(".devcontainer/Dockerfile.TI") + $dockerfileContent -match '(?<=\:)(?:[v]\d+.\d+)' + $containerVersion = $Matches[0].ToString() + echo "GCR_VERSION=$containerVersion" | Out-File -FilePath $Env:GITHUB_ENV -Encoding utf-8 -Append + shell: pwsh + - name: Login to GitHub Container Registry uses: docker/login-action@v1 with: @@ -40,4 +46,4 @@ jobs: push: true # Will only build if this is not here tags: | ${{ env.GCR_IMAGE }}:${{ env.GCR_VERSION }} - ${{ env.GCR_IMAGE }}:latest \ No newline at end of file + ${{ env.GCR_IMAGE }}:latest diff --git a/.vscode/cmake-variants-DEVCONTAINER.json b/.vscode/cmake-variants-DEVCONTAINER.json index 039434f91d..1552361d8f 100644 --- a/.vscode/cmake-variants-DEVCONTAINER.json +++ b/.vscode/cmake-variants-DEVCONTAINER.json @@ -91,7 +91,7 @@ "API_System.IO.Ports": "ON", "API_Windows.Devices.Adc": "ON", "API_System.Device.Adc": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Devices.Can": "OFF", "API_nanoFramework.ResourceManager": "ON", "API_nanoFramework.System.Collections": "ON", @@ -142,7 +142,7 @@ "API_System.Device.Adc": "ON", "API_System.Device.Dac": "ON", "API_System.Net": "ON", - "API_nanoFramework.Devices.OneWire": "OFF", + "API_nanoFramework.Device.OneWire": "OFF", "API_nanoFramework.Devices.Can": "OFF", "API_Windows.Storage": "ON", "API_nanoFramework.ResourceManager": "ON", @@ -191,7 +191,7 @@ "API_System.Device.Adc": "ON", "API_System.Device.Dac": "ON", "API_System.Net": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Devices.Can": "ON", "API_Windows.Storage": "ON", "API_nanoFramework.ResourceManager": "ON", @@ -285,7 +285,7 @@ "API_System.Net": "ON", "API_System.Device.WiFi": "ON", "API_Hardware.Esp32": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.ResourceManager": "ON", "API_nanoFramework.System.Collections": "ON", "API_nanoFramework.System.Text": "ON", @@ -332,7 +332,7 @@ "API_System.Net": "ON", "API_System.Device.WiFi": "ON", "API_Hardware.Esp32": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.ResourceManager": "ON", "API_nanoFramework.System.Collections": "ON", "API_nanoFramework.System.Text": "ON", @@ -380,7 +380,7 @@ "API_System.Net": "ON", "API_System.Device.WiFi": "ON", "API_Hardware.Esp32": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.ResourceManager": "ON", "API_nanoFramework.System.Collections": "ON", "API_nanoFramework.System.Text": "ON", @@ -433,7 +433,7 @@ "API_nanoFramework.System.Text": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", "API_Windows.Devices.Adc": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" } @@ -476,7 +476,7 @@ "API_System.Net": "ON", "API_System.Device.WiFi": "ON", "API_Hardware.Esp32": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.ResourceManager": "ON", "API_nanoFramework.System.Collections": "ON", "API_nanoFramework.System.Text": "ON", @@ -533,7 +533,7 @@ "API_nanoFramework.System.Text": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", "API_System.Device.Dac": "ON", - "API_nanoFramework.Devices.OneWire": "OFF", + "API_nanoFramework.Device.OneWire": "OFF", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" } @@ -581,7 +581,7 @@ "API_nanoFramework.Hardware.Esp32.Rmt": "ON", "API_System.Device.Dac": "ON", "API_nanoFramework.Device.Bluetooth": "OFF", - "API_nanoFramework.Devices.OneWire": "OFF", + "API_nanoFramework.Device.OneWire": "OFF", "API_nanoFramework.Graphics": "ON", "GRAPHICS_DISPLAY": "ILI9341_240x320_SPI.cpp", "GRAPHICS_DISPLAY_INTERFACE": "Spi_To_Display.cpp", @@ -679,7 +679,7 @@ "API_nanoFramework.System.Collections": "ON", "API_nanoFramework.System.Text": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_System.Device.Dac": "ON", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" diff --git a/.vscode/cmake-variants.TEMPLATE.json b/.vscode/cmake-variants.TEMPLATE.json index 967bda53da..9c1f390697 100644 --- a/.vscode/cmake-variants.TEMPLATE.json +++ b/.vscode/cmake-variants.TEMPLATE.json @@ -92,7 +92,7 @@ "NF_SECURITY_MBEDTLS": "OFF-default-ON-to-add-network-security-from-mbedTLS", "MBEDTLS_SOURCE": "", "API_nanoFramework.Devices.Can": "OFF-default-ON-to-add-this-API", - "API_nanoFramework.Devices.OneWire": "OFF-default-ON-to-add-this-API", + "API_nanoFramework.Device.OneWire": "OFF-default-ON-to-add-this-API", "API_nanoFramework.ResourceManager": "OFF-default-ON-to-add-this-API", "API_nanoFramework.System.Collections": "OFF-default-ON-to-add-this-API", "API_nanoFramework.System.Text": "OFF-default-ON-to-add-this-API", diff --git a/CMake/Modules/FindESP32_IDF.cmake b/CMake/Modules/FindESP32_IDF.cmake index 90f38f5f43..4b0c8d39d3 100644 --- a/CMake/Modules/FindESP32_IDF.cmake +++ b/CMake/Modules/FindESP32_IDF.cmake @@ -16,7 +16,9 @@ list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/xtensa/${T list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/driver/${TARGET_SERIES_SHORT}/include/driver) list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/hal/${TARGET_SERIES_SHORT}/include) list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/soc/${TARGET_SERIES_SHORT}/include) - +list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/soc/${TARGET_SERIES_SHORT}/include/soc) +list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/esp_hw_support/include/soc) + list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/driver/include) list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/driver/include/driver) list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/esp_common/include) @@ -72,6 +74,8 @@ include(${TARGET_SERIES}_GCC_options) ############ list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/freertos/include) +list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/freertos/include/esp_additions) +list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/freertos/include/esp_additions/freertos) list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/freertos/port/xtensa/include) list(APPEND ESP32_IDF_INCLUDE_DIRS ${esp32_idf_SOURCE_DIR}/components/freertos/port/xtensa/include/freertos) diff --git a/CMake/Modules/FindNF_NativeAssemblies.cmake b/CMake/Modules/FindNF_NativeAssemblies.cmake index 97335282d1..d6f1a3053f 100644 --- a/CMake/Modules/FindNF_NativeAssemblies.cmake +++ b/CMake/Modules/FindNF_NativeAssemblies.cmake @@ -10,7 +10,7 @@ ########################################################################################### option(API_nanoFramework.Devices.Can "option for nanoFramework.Devices.Can") -option(API_nanoFramework.Devices.OneWire "option for nanoFramework.Devices.OneWire") +option(API_nanoFramework.Device.OneWire "option for nanoFramework.Device.OneWire") option(API_nanoFramework.Networking.Sntp "option for nanoFramework.Networking.Sntp") option(API_nanoFramework.Runtime.Events "option for nanoFramework.Runtime.Events API") option(API_nanoFramework.ResourceManager "option for nanoFramework.ResourceManager") @@ -201,10 +201,10 @@ if(API_nanoFramework.Graphics) PerformSettingsForApiEntry("nanoFramework.Graphics") endif() -# nanoFramework.Devices.OneWire -if(API_nanoFramework.Devices.OneWire) +# nanoFramework.Device.OneWire +if(API_nanoFramework.Device.OneWire) ##### API name here (doted name) - PerformSettingsForApiEntry("nanoFramework.Devices.OneWire") + PerformSettingsForApiEntry("nanoFramework.Device.OneWire") endif() # nanoFramework.Networking.Sntp diff --git a/CMake/Modules/FindNF_Network.cmake b/CMake/Modules/FindNF_Network.cmake index 40e3d13050..fac77b2860 100644 --- a/CMake/Modules/FindNF_Network.cmake +++ b/CMake/Modules/FindNF_Network.cmake @@ -3,14 +3,19 @@ # See LICENSE file in the project root for full license information. # +include(FetchContent) +FetchContent_GetProperties(mbedtls) + # set include directories for nanoFramework network list(APPEND NF_Network_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets) list(APPEND NF_Network_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl) list(APPEND NF_Network_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/PAL/Lwip) +list(APPEND NF_Network_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/PAL) list(APPEND NF_Network_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/DeviceInterfaces/Networking.Sntp) if(USE_SECURITY_MBEDTLS_OPTION) list(APPEND NF_Network_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS) + list(APPEND NF_Network_INCLUDE_DIRS ${mbedtls_SOURCE_DIR}/include) endif() if(USE_ENC28J60_DRIVER_OPTION) @@ -181,7 +186,6 @@ macro(nf_add_lib_network) add_library( ${LIB_NAME} STATIC ${NF_Network_SOURCES} - ${mbedTLS_SOURCES} ${NFALN_EXTRA_SOURCES}) target_include_directories( @@ -189,7 +193,6 @@ macro(nf_add_lib_network) PUBLIC ${NF_Network_INCLUDE_DIRS} ${NF_CoreCLR_INCLUDE_DIRS} - ${mbedTLS_INCLUDE_DIRS} ${NFALN_EXTRA_INCLUDES}) # TODO can be removed later diff --git a/CMake/Modules/FindmbedTLS.cmake b/CMake/Modules/FindmbedTLS.cmake index 3e6ec1e5b9..14d6c33e90 100644 --- a/CMake/Modules/FindmbedTLS.cmake +++ b/CMake/Modules/FindmbedTLS.cmake @@ -40,7 +40,6 @@ set(src_crypto asn1parse.c asn1write.c base64.c - bignum.c blowfish.c camellia.c ccm.c @@ -90,12 +89,13 @@ set(src_crypto version.c version_features.c xtea.c - + ) if(NOT RTOS_ESP32_CHECK) # platform implementation of hardware random provider list(APPEND src_crypto mbedtls_entropy_hardware_pool.c) + list(APPEND src_crypto bignum.c) endif() foreach(SRC_FILE ${src_crypto}) @@ -103,7 +103,7 @@ foreach(SRC_FILE ${src_crypto}) set(MBEDTLS_SRC_FILE SRC_FILE -NOTFOUND) find_file(MBEDTLS_SRC_FILE ${SRC_FILE} - PATHS + PATHS ${mbedtls_SOURCE_DIR}/library ${BASE_PATH_FOR_CLASS_LIBRARIES_MODULES}/ @@ -119,6 +119,10 @@ foreach(SRC_FILE ${src_crypto}) endforeach() +if(RTOS_ESP32_CHECK) + list(APPEND mbedTLS_SOURCES ${esp32_idf_SOURCE_DIR}/components/mbedtls/mbedtls/library/bignum.c) +endif() + # unset this warning as error required for this source file SET_SOURCE_FILES_PROPERTIES( ${mbedtls_SOURCE_DIR}/library/hmac_drbg.c PROPERTIES COMPILE_FLAGS -Wno-maybe-uninitialized) SET_SOURCE_FILES_PROPERTIES( ${mbedtls_SOURCE_DIR}/library/x509_crt.c PROPERTIES COMPILE_FLAGS -Wno-maybe-uninitialized) @@ -140,7 +144,7 @@ foreach(SRC_FILE ${src_x509}) set(MBEDTLS_SRC_FILE SRC_FILE -NOTFOUND) find_file(MBEDTLS_SRC_FILE ${SRC_FILE} - PATHS + PATHS ${mbedtls_SOURCE_DIR}/library CMAKE_FIND_ROOT_PATH_BOTH @@ -172,7 +176,7 @@ foreach(SRC_FILE ${src_tls}) set(MBEDTLS_SRC_FILE SRC_FILE -NOTFOUND) find_file(MBEDTLS_SRC_FILE ${SRC_FILE} - PATHS + PATHS ${mbedtls_SOURCE_DIR}/library CMAKE_FIND_ROOT_PATH_BOTH @@ -193,7 +197,6 @@ if(RTOS_ESP32_CHECK) set(src_platform_specific mbedtls_debug.c - esp_hardware.c esp_mem.c esp_timing.c @@ -202,14 +205,45 @@ if(RTOS_ESP32_CHECK) esp_aes_common.c esp_aes.c sha.c - esp_bignum.c - bignum.c esp_sha1.c esp_sha256.c esp_sha512.c esp_md.c ) - + + foreach(SRC_FILE ${src_platform_specific}) + + set(MBEDTLS_SRC_FILE SRC_FILE -NOTFOUND) + + find_file(MBEDTLS_SRC_FILE ${SRC_FILE} + PATHS + + ${esp32_idf_SOURCE_DIR}/components/mbedtls/port + ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/sha/parallel_engine + ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/sha/ + ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/aes + ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/aes/block + + ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/md + + ${CMAKE_SOURCE_DIR}/targets/ESP32/_IDF + + CMAKE_FIND_ROOT_PATH_BOTH + ) + + if (BUILD_VERBOSE) + message("${SRC_FILE} >> ${MBEDTLS_SRC_FILE}") + endif() + + list(APPEND mbedTLS_SOURCES ${MBEDTLS_SRC_FILE}) + + endforeach() + + if(CONFIG_MBEDTLS_HARDWARE_MPI) + list(APPEND mbedTLS_SOURCES ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/esp_bignum.c) + list(APPEND src_platform_specific ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/${TARGET_SERIES_SHORT}/bignum.c) + endif() + else() # other platforms use the official sources @@ -219,23 +253,13 @@ else() net_sockets.c ) -endif() - -foreach(SRC_FILE ${src_platform_specific}) + foreach(SRC_FILE ${src_platform_specific}) set(MBEDTLS_SRC_FILE SRC_FILE -NOTFOUND) find_file(MBEDTLS_SRC_FILE ${SRC_FILE} PATHS - ${esp32_idf_SOURCE_DIR}/components/mbedtls/port - ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/sha/parallel_engine - ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/sha/ - ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/aes - ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/aes/block - ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/${TARGET_SERIES_SHORT} - ${esp32_idf_SOURCE_DIR}/components/mbedtls/port/md - ${mbedtls_SOURCE_DIR}/library CMAKE_FIND_ROOT_PATH_BOTH @@ -247,7 +271,9 @@ foreach(SRC_FILE ${src_platform_specific}) list(APPEND mbedTLS_SOURCES ${MBEDTLS_SRC_FILE}) -endforeach() + endforeach() + +endif() include(FindPackageHandleStandardArgs) diff --git a/CMake/Modules/FindnanoFramework.Device.Bluetooth.cmake b/CMake/Modules/FindnanoFramework.Device.Bluetooth.cmake index a856c2ea78..30acf1bd7c 100644 --- a/CMake/Modules/FindnanoFramework.Device.Bluetooth.cmake +++ b/CMake/Modules/FindnanoFramework.Device.Bluetooth.cmake @@ -28,8 +28,6 @@ list(APPEND nanoFramework.Device.Bluetooth_INCLUDE_DIRS "${NIMBLE_COMPONENT_PATH # source files set(nanoFramework.Device.Bluetooth_SRCS - sys_ble_nimble_chars.c - sys_dev_ble_native.cpp sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider.cpp diff --git a/CMake/Modules/FindnanoFramework.Device.OneWire.cmake b/CMake/Modules/FindnanoFramework.Device.OneWire.cmake new file mode 100644 index 0000000000..fc8754c955 --- /dev/null +++ b/CMake/Modules/FindnanoFramework.Device.OneWire.cmake @@ -0,0 +1,49 @@ +# +# Copyright (c) .NET Foundation and Contributors +# See LICENSE file in the project root for full license information. +# + + +# native code directory +set(BASE_PATH_FOR_THIS_MODULE "${BASE_PATH_FOR_CLASS_LIBRARIES_MODULES}/nanoFramework.Device.OneWire") + + +# set include directories +list(APPEND nanoFramework.Device.OneWire_INCLUDE_DIRS ${BASE_PATH_FOR_THIS_MODULE}) +list(APPEND nanoFramework.Device.OneWire_INCLUDE_DIRS ${TARGET_BASE_LOCATION}) +list(APPEND nanoFramework.Device.OneWire_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/nanoFramework.Device.OneWire) + +# source files +set(nanoFramework.Device.OneWire_SRCS + + nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost.cpp + nf_dev_onewire.cpp + + target_nf_dev_onewire_config.cpp +) + +foreach(SRC_FILE ${nanoFramework.Device.OneWire_SRCS}) + + set(nanoFramework.Device.OneWire_SRC_FILE SRC_FILE-NOTFOUND) + + find_file(nanoFramework.Device.OneWire_SRC_FILE ${SRC_FILE} + PATHS + ${BASE_PATH_FOR_THIS_MODULE} + ${TARGET_BASE_LOCATION} + ${CMAKE_SOURCE_DIR}/src/nanoFramework.Device.OneWire + + CMAKE_FIND_ROOT_PATH_BOTH + ) + + if (BUILD_VERBOSE) + message("${SRC_FILE} >> ${nanoFramework.Device.OneWire_SRC_FILE}") + endif() + + list(APPEND nanoFramework.Device.OneWire_SOURCES ${nanoFramework.Device.OneWire_SRC_FILE}) + +endforeach() + + +include(FindPackageHandleStandardArgs) + +FIND_PACKAGE_HANDLE_STANDARD_ARGS(nanoFramework.Device.OneWire DEFAULT_MSG nanoFramework.Device.OneWire_INCLUDE_DIRS nanoFramework.Device.OneWire_SOURCES) diff --git a/CMake/Modules/FindnanoFramework.Devices.OneWire.cmake b/CMake/Modules/FindnanoFramework.Devices.OneWire.cmake deleted file mode 100644 index c535c9870d..0000000000 --- a/CMake/Modules/FindnanoFramework.Devices.OneWire.cmake +++ /dev/null @@ -1,49 +0,0 @@ -# -# Copyright (c) .NET Foundation and Contributors -# See LICENSE file in the project root for full license information. -# - - -# native code directory -set(BASE_PATH_FOR_THIS_MODULE "${BASE_PATH_FOR_CLASS_LIBRARIES_MODULES}/nanoFramework.Devices.OneWire") - - -# set include directories -list(APPEND nanoFramework.Devices.OneWire_INCLUDE_DIRS ${BASE_PATH_FOR_THIS_MODULE}) -list(APPEND nanoFramework.Devices.OneWire_INCLUDE_DIRS ${TARGET_BASE_LOCATION}) -list(APPEND nanoFramework.Devices.OneWire_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/src/nanoFramework.Devices.OneWire) - -# source files -set(nanoFramework.Devices.OneWire_SRCS - - nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController.cpp - nf_devices_onewire_native.cpp - - target_nf_devices_onewire_config.cpp -) - -foreach(SRC_FILE ${nanoFramework.Devices.OneWire_SRCS}) - - set(nanoFramework.Devices.OneWire_SRC_FILE SRC_FILE-NOTFOUND) - - find_file(nanoFramework.Devices.OneWire_SRC_FILE ${SRC_FILE} - PATHS - ${BASE_PATH_FOR_THIS_MODULE} - ${TARGET_BASE_LOCATION} - ${CMAKE_SOURCE_DIR}/src/nanoFramework.Devices.OneWire - - CMAKE_FIND_ROOT_PATH_BOTH - ) - - if (BUILD_VERBOSE) - message("${SRC_FILE} >> ${nanoFramework.Devices.OneWire_SRC_FILE}") - endif() - - list(APPEND nanoFramework.Devices.OneWire_SOURCES ${nanoFramework.Devices.OneWire_SRC_FILE}) - -endforeach() - - -include(FindPackageHandleStandardArgs) - -FIND_PACKAGE_HANDLE_STANDARD_ARGS(nanoFramework.Devices.OneWire DEFAULT_MSG nanoFramework.Devices.OneWire_INCLUDE_DIRS nanoFramework.Devices.OneWire_SOURCES) diff --git a/CMake/Modules/FindnanoFramework.System.Collections.cmake b/CMake/Modules/FindnanoFramework.System.Collections.cmake index 1731af811b..38452a2af5 100644 --- a/CMake/Modules/FindnanoFramework.System.Collections.cmake +++ b/CMake/Modules/FindnanoFramework.System.Collections.cmake @@ -17,6 +17,8 @@ list(APPEND nanoFramework.System.Collections_INCLUDE_DIRS "${CMAKE_SOURCE_DIR}/s set(nanoFramework.System.Collections_SRCS # source files of the assembly + nf_system_collections_System_Collections_Hashtable.cpp + nf_system_collections_System_Collections_Hashtable__HashtableEnumerator.cpp nf_system_collections_System_Collections_Queue.cpp nf_system_collections_System_Collections_Stack.cpp nf_system_collections.cpp diff --git a/CMake/binutils.ChibiOS.cmake b/CMake/binutils.ChibiOS.cmake index d4872cb375..c21655c5ef 100644 --- a/CMake/binutils.ChibiOS.cmake +++ b/CMake/binutils.ChibiOS.cmake @@ -95,7 +95,7 @@ macro(nf_add_platform_packages) # no packages for booter endif() - # packages specific for nanoCRL + # packages specific for nanoCLR if("${NFAPP_TARGET}" STREQUAL "${NANOCLR_PROJECT_NAME}") if(USE_NETWORKING_OPTION) @@ -103,11 +103,6 @@ macro(nf_add_platform_packages) find_package(NF_Network REQUIRED QUIET) find_package(CHIBIOS_LWIP REQUIRED QUIET) - # security provider is mbedTLS - if(USE_SECURITY_MBEDTLS_OPTION) - find_package(mbedTLS REQUIRED QUIET) - endif() - endif() endif() @@ -120,7 +115,7 @@ macro(nf_add_platform_dependencies target) nf_add_common_dependencies(${target}) - # dependencies specific to nanoCRL + # dependencies specific to nanoCLR if("${target}" STREQUAL "${NANOCLR_PROJECT_NAME}") nf_add_lib_coreclr( @@ -199,7 +194,12 @@ macro(nf_add_platform_dependencies target) ${${TARGET_STM32_CUBE_PACKAGE}_CubePackage_INCLUDE_DIRS} EXTRA_COMPILE_DEFINITIONS -DHAL_USE_MAC=TRUE) - add_dependencies(${target}.elf nano::NF_Network) + add_dependencies(${target}.elf nano::NF_Network) + + # security provider is mbedTLS + if(USE_SECURITY_MBEDTLS_OPTION) + add_dependencies(NF_Network nano::NF_Network) + endif() endif() @@ -235,7 +235,7 @@ macro(nf_add_platform_include_directories target) endif() - # includes specific to nanoCRL + # includes specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) target_include_directories(${target}.elf PUBLIC @@ -244,6 +244,23 @@ macro(nf_add_platform_include_directories target) ${CHIBIOS_FATFS_INCLUDE_DIRS} ) + + if(USE_SECURITY_MBEDTLS_OPTION) + + # need to add extra include directories for mbedTLS + target_include_directories( + mbedcrypto PUBLIC + ${CHIBIOS_HAL_INCLUDE_DIRS} + ${CHIBIOS_INCLUDE_DIRS} + ${ChibiOSnfOverlay_INCLUDE_DIRS} + ${CHIBIOS_CONTRIB_INCLUDE_DIRS} + ${${TARGET_STM32_CUBE_PACKAGE}_CubePackage_INCLUDE_DIRS} + ${TARGET_CHIBIOS_COMMON_INCLUDE_DIRS} + ${CHIBIOS_LWIP_INCLUDE_DIRS} + ) + + endif() + endif() endmacro() @@ -282,7 +299,7 @@ macro(nf_add_platform_sources target) endif() - # sources specific to nanoCRL + # sources specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) configure_file(${CMAKE_CURRENT_SOURCE_DIR}/nanoCLR/target_board.h.in @@ -299,15 +316,17 @@ macro(nf_add_platform_sources target) target_link_libraries(${target}.elf nano::NF_Network ) - endif() - endif() + if(USE_SECURITY_MBEDTLS_OPTION) + target_link_libraries(${target}.elf + mbedtls + ) + + add_dependencies(NF_Network mbedtls) + endif() + + endif() - # mbed TLS requires a config file - if(USE_SECURITY_MBEDTLS_OPTION) - # this seems to be only option to properly set a compiler define through the command line that needs to be a string literal - SET(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DMBEDTLS_CONFIG_FILE=\"<${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h>\"") - SET(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -DMBEDTLS_CONFIG_FILE=\"<${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h>\"") endif() endmacro() diff --git a/CMake/binutils.ESP32.cmake b/CMake/binutils.ESP32.cmake index c870958713..8862332040 100644 --- a/CMake/binutils.ESP32.cmake +++ b/CMake/binutils.ESP32.cmake @@ -95,18 +95,13 @@ macro(nf_add_platform_packages) find_package(ESP32_IDF REQUIRED QUIET) - # packages specific for nanoCRL + # packages specific for nanoCLR if("${NFAPP_TARGET}" STREQUAL "${NANOCLR_PROJECT_NAME}") if(USE_NETWORKING_OPTION) find_package(NF_Network REQUIRED QUIET) - # security provider is mbedTLS - if(USE_SECURITY_MBEDTLS_OPTION) - find_package(mbedTLS REQUIRED QUIET) - endif() - endif() endif() @@ -170,10 +165,15 @@ macro(nf_add_platform_dependencies target) EXTRA_INCLUDES ${ESP32_IDF_INCLUDE_DIRS} ${TARGET_ESP32_IDF_INCLUDES} + ${esp32_idf_SOURCE_DIR}/components/mbedtls/mbedtls/include ) add_dependencies(${target}.elf nano::NF_Network) + # security provider is mbedTLS + if(USE_SECURITY_MBEDTLS_OPTION) + add_dependencies(NF_Network mbedtls) + endif() endif() # if(USE_FILESYSTEM_OPTION) @@ -202,7 +202,7 @@ macro(nf_add_platform_include_directories target) ${NF_CoreCLR_INCLUDE_DIRS} ) - # includes specific to nanoCRL + # includes specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) target_include_directories(${target}.elf PUBLIC @@ -230,7 +230,7 @@ macro(nf_add_platform_sources target) ) - # sources specific to nanoCRL + # sources specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) # add header with target platform definitions @@ -248,11 +248,12 @@ macro(nf_add_platform_sources target) endif() - # mbed TLS requires a config file if(USE_SECURITY_MBEDTLS_OPTION) - # this seems to be only option to properly set a compiler define through the command line that needs to be a string literal - SET(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} -DMBEDTLS_CONFIG_FILE=\"<${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h>\"") - SET(CMAKE_CXX_FLAGS "${CMAKE_CXX_FLAGS} -DMBEDTLS_CONFIG_FILE=\"<${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h>\"") + target_link_libraries(${target}.elf + mbedtls + ) + + add_dependencies(NF_Network mbedtls) endif() endmacro() @@ -607,7 +608,7 @@ macro(nf_add_idf_as_library) # SDKCONFIG ${CMAKE_SOURCE_DIR}/targets/ESP32/_IDF/sdkconfig SDKCONFIG_DEFAULTS ${SDKCONFIG_DEFAULTS_FILE} - PROJECT_NAME "nanoCRL" + PROJECT_NAME "nanoCLR" PROJECT_VER ${BUILD_VERSION} ) @@ -646,7 +647,7 @@ macro(nf_add_idf_as_library) # add nanoCLR include path to lwIP so our lwipots are taken instead of the IDF ones list(INSERT IDF_LWIP_INCLUDE_DIRECTORIES 0 - ${CMAKE_SOURCE_DIR}/targets/ESP32/_Include + ${CMAKE_SOURCE_DIR}/targets/ESP32/_include ${CMAKE_SOURCE_DIR}/targets/ESP32/${TARGET_BOARD} ${CMAKE_SOURCE_DIR}/src/DeviceInterfaces/Networking.Sntp ${CMAKE_SOURCE_DIR}/src/CLR/Include @@ -670,24 +671,6 @@ macro(nf_add_idf_as_library) PROPERTY COMPILE_DEFINITIONS ${IDF_LWIP_COMPILE_DEFINITIONS} ) - message(STATUS "Adding byteorder functions") - - # need to read the supplied SDK CONFIG file and replace the appropriate options - set(ARCH_CC_FILE "${esp32_idf_SOURCE_DIR}/components/lwip/port/esp32/include/arch/cc.h") - file(READ - ${ARCH_CC_FILE} - ARCH_CC_CONTENTS) - - string(REPLACE - "#endif // BYTE_ORDER" - "#endif // __BYTE_ORDER\n\n#define LWIP_DONT_PROVIDE_BYTEORDER_FUNCTIONS\n#define htons(x) __builtin_bswap16(x)\n#define ntohs(x) __builtin_bswap16(x)\n#define htonl(x) __builtin_bswap32(x)\n#define ntohl(x) __builtin_bswap32(x)\n" - ARCH_CC_FINAL_CONTENTS - "${ARCH_CC_CONTENTS}") - - file(WRITE - ${ARCH_CC_FILE} - "${ARCH_CC_FINAL_CONTENTS}") - endif() # need to add include path to find our ffconfig.h and target_platform.h diff --git a/CMake/binutils.FreeRTOS.cmake b/CMake/binutils.FreeRTOS.cmake index 109f59f3d6..95f1259b3c 100644 --- a/CMake/binutils.FreeRTOS.cmake +++ b/CMake/binutils.FreeRTOS.cmake @@ -62,7 +62,7 @@ macro(nf_add_platform_packages) # no packages for booter endif() - # packages specific for nanoCRL + # packages specific for nanoCLR if("${NFAPP_TARGET}" STREQUAL "${NANOCLR_PROJECT_NAME}") if(USE_NETWORKING_OPTION) @@ -70,11 +70,6 @@ macro(nf_add_platform_packages) find_package(NF_Network REQUIRED QUIET) find_package(LWIP REQUIRED QUIET) - # security provider is mbedTLS - if(USE_SECURITY_MBEDTLS_OPTION) - find_package(mbedTLS REQUIRED QUIET) - endif() - endif() endif() @@ -92,7 +87,7 @@ macro(nf_add_platform_dependencies target) # no packages for booter endif() - # dependencies specific to nanoCRL + # dependencies specific to nanoCLR if("${target}" STREQUAL "${NANOCLR_PROJECT_NAME}") nf_add_lib_coreclr( @@ -190,7 +185,7 @@ macro(nf_add_platform_include_directories target) endif() - # includes specific to nanoCRL + # includes specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) target_include_directories(${target}.elf PUBLIC @@ -238,7 +233,7 @@ macro(nf_add_platform_sources target) endif() - # sources specific to nanoCRL + # sources specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) # add header files with common OS definitions and board definitions diff --git a/CMake/binutils.TI_SimpleLink.cmake b/CMake/binutils.TI_SimpleLink.cmake index 1cce9cbb28..ca9210bea7 100644 --- a/CMake/binutils.TI_SimpleLink.cmake +++ b/CMake/binutils.TI_SimpleLink.cmake @@ -89,9 +89,9 @@ macro(nf_add_platform_packages) # no packages for booter endif() - # packages specific for nanoCRL + # packages specific for nanoCLR if("${NFAPP_TARGET}" STREQUAL "${NANOCLR_PROJECT_NAME}") - # no packages for nanoCRL + # no packages for nanoCLR endif() endmacro() @@ -102,7 +102,7 @@ macro(nf_add_platform_dependencies target) nf_add_common_dependencies(${target}) - # dependencies specific to nanoCRL + # dependencies specific to nanoCLR if("${target}" STREQUAL "${NANOCLR_PROJECT_NAME}") nf_add_lib_coreclr( @@ -205,7 +205,7 @@ macro(nf_add_platform_sources target) configure_file(${CMAKE_CURRENT_SOURCE_DIR}/target_common.h.in ${CMAKE_BINARY_DIR}/targets/${RTOS}/${TARGET_BOARD}/target_common.h @ONLY) - # sources specific to nanoCRL + # sources specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) target_sources(${target}.elf PUBLIC @@ -237,6 +237,8 @@ macro(nf_add_platform_sysconfig_steps ti_device ti_device_family) list(FIND TI_DEVICE_FAMILIES_WITH_RADIO_FREQUENCY ${TARGET_SERIES} TI_DEVICE_FAMILY_NAME_INDEX) + string(TOLOWER ${ti_device_family} TI_DEVICE_FAMILY_LOWER_CASE) + if(TI_DEVICE_FAMILY_NAME_INDEX EQUAL -1) # this target series doesn't have/support/care radio frequency option # compose sys config file name @@ -347,12 +349,12 @@ macro(nf_setup_target_build) # add extra libraries for SimpleLink set(CLR_EXTRA_LIBRARIES - ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/display/lib/gcc/m4f/display_cc13x2.a + ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/display/lib/gcc/m4f/display_${TI_DEVICE_FAMILY_LOWER_CASE}.a ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/grlib/lib/gcc/m4f/grlib.a - ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/drivers/rf/lib/rf_multiMode_cc13x2.am4fg - ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/drivers/lib/gcc/m4f/drivers_cc13x2.a + ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/drivers/rf/lib/gcc/m4f/rf_multiMode_${TI_DEVICE_FAMILY_LOWER_CASE}.a + ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/drivers/lib/gcc/m4f/drivers_${TI_DEVICE_FAMILY_LOWER_CASE}.a ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/source/ti/devices/cc13x2_cc26x2/driverlib/bin/gcc/driverlib.lib - ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/kernel/tirtos/packages/ti/dpl/lib/gcc/m4f/dpl_cc13x2.a + ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/kernel/tirtos/packages/ti/dpl/lib/gcc/m4f/dpl_${TI_DEVICE_FAMILY_LOWER_CASE}.a ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/kernel/tirtos/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/thumb/v7e-m/hard/libm.a ${simplelinkcc13xx_26xxsdk_SOURCE_DIR}/kernel/tirtos/packages/gnu/targets/arm/libs/install-native/arm-none-eabi/lib/thumb/v7e-m/hard/libnosys.a diff --git a/CMake/binutils.common.cmake b/CMake/binutils.common.cmake index 8a09eec0f7..b00a20094c 100644 --- a/CMake/binutils.common.cmake +++ b/CMake/binutils.common.cmake @@ -91,7 +91,7 @@ macro(nf_add_common_dependencies target) endif() - # dependencies specific to nanoCRL + # dependencies specific to nanoCLR if("${target}" STREQUAL "${NANOCLR_PROJECT_NAME}") configure_file(${BASE_PATH_FOR_CLASS_LIBRARIES_MODULES}/target_platform.h.in @@ -132,7 +132,7 @@ macro(nf_add_common_include_directories target) endif() - # includes specific to nanoCRL + # includes specific to nanoCLR if(${target} STREQUAL ${NANOCLR_PROJECT_NAME}) target_include_directories(${target}.elf PUBLIC @@ -193,7 +193,7 @@ macro(nf_add_common_sources) endif() - # sources specific to nanoCRL + # sources specific to nanoCLR if(${NFACS_TARGET} STREQUAL ${NANOCLR_PROJECT_NAME}) target_link_libraries(${NFACS_TARGET}.elf @@ -550,6 +550,43 @@ macro(nf_setup_target_build_common) # set compile options nf_set_compile_options(TARGET ${NANOCLR_PROJECT_NAME}.elf EXTRA_COMPILE_OPTIONS ${NFSTBC_CLR_EXTRA_COMPILE_OPTIONS}) + if(USE_SECURITY_MBEDTLS_OPTION AND NOT RTOS_ESP32_CHECK) + + # mbedTLS requires setting a compiler definition in order to pass a config file + target_compile_definitions(mbedcrypto PUBLIC "-DMBEDTLS_CONFIG_FILE=\"${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h\"") + + # need to add extra include directories for mbedTLS + target_include_directories( + mbedcrypto PUBLIC + ${CMAKE_SOURCE_DIR}/src/CLR/Include + ${CMAKE_SOURCE_DIR}/src/HAL/Include + ${CMAKE_SOURCE_DIR}/src/PAL + ${CMAKE_SOURCE_DIR}/src/PAL/Include + ${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets + ${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS + ${CMAKE_SOURCE_DIR}/src/DeviceInterfaces/Networking.Sntp + ${CMAKE_SOURCE_DIR}/targets/${RTOS}/_include + ${TARGET_BASE_LOCATION}/nanoCLR + ${TARGET_BASE_LOCATION} + ) + + # target_sources(mbedcrypto PUBLIC ${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS/ssl_generic.cpp) + # target_sources(mbedcrypto PRIVATE ${CMAKE_SOURCE_DIR}/src/PAL/COM/sockets/ssl/mbedTLS/mbed_network.c) + + if(NOT RTOS_ESP32_CHECK) + # platform implementation of hardware random provider + target_sources(mbedcrypto PRIVATE ${BASE_PATH_FOR_CLASS_LIBRARIES_MODULES}/mbedtls_entropy_hardware_pool.c) + endif() + + nf_set_compile_options(TARGET mbedcrypto BUILD_TARGET ${NANOCLR_PROJECT_NAME}) + nf_set_compile_options(TARGET mbedx509 BUILD_TARGET ${NANOCLR_PROJECT_NAME}) + nf_set_compile_options(TARGET mbedtls BUILD_TARGET ${NANOCLR_PROJECT_NAME}) + nf_set_compile_definitions(TARGET mbedcrypto BUILD_TARGET ${NANOCLR_PROJECT_NAME}) + nf_set_compile_definitions(TARGET mbedx509 BUILD_TARGET ${NANOCLR_PROJECT_NAME}) + nf_set_compile_definitions(TARGET mbedtls BUILD_TARGET ${NANOCLR_PROJECT_NAME}) + + endif() + # set compile definitions nf_set_compile_definitions(TARGET ${NANOCLR_PROJECT_NAME}.elf EXTRA_COMPILE_DEFINITIONS ${NFSTBC_CLR_EXTRA_COMPILE_DEFINITIONS} BUILD_TARGET ${NANOCLR_PROJECT_NAME} ) diff --git a/CMakeLists.txt b/CMakeLists.txt index f631b9f580..5318367681 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -494,14 +494,14 @@ endif() # for some APIs we need to enable the device in the HAL config # and/or manage other APIs that are required -if( API_nanoFramework.Devices.OneWire OR +if( API_nanoFramework.Device.OneWire OR API_Windows.Devices.SerialCommunication OR API_System.IO.Ports) - set(HAL_USE_UART_OPTION TRUE CACHE INTERNAL "HAL OneWire for nanoFramework.Devices.OneWire") + set(HAL_USE_UART_OPTION TRUE CACHE INTERNAL "HAL OneWire for nanoFramework.Device.OneWire") else() - set(HAL_USE_UART_OPTION FALSE CACHE INTERNAL "HAL OneWire for nanoFramework.Devices.OneWire") + set(HAL_USE_UART_OPTION FALSE CACHE INTERNAL "HAL OneWire for nanoFramework.Device.OneWire") endif() if( API_System.Net) @@ -594,10 +594,10 @@ else() endif() -if(API_nanoFramework.Devices.OneWire) - set(HAL_USE_STM32_ONEWIRE_OPTION TRUE CACHE INTERNAL "HAL STM32_ONEWIRE for nanoFramework.Devices.OneWire") +if(API_nanoFramework.Device.OneWire) + set(HAL_USE_STM32_ONEWIRE_OPTION TRUE CACHE INTERNAL "HAL STM32_ONEWIRE for nanoFramework.Device.OneWire") else() - set(HAL_USE_STM32_ONEWIRE_OPTION FALSE CACHE INTERNAL "HAL STM32_ONEWIRE for nanoFramework.Devices.OneWire") + set(HAL_USE_STM32_ONEWIRE_OPTION FALSE CACHE INTERNAL "HAL STM32_ONEWIRE for nanoFramework.Device.OneWire") endif() ################################################################################# @@ -626,7 +626,7 @@ endif() ################################################################# # include nanoFramework.Runtime.Events API -if( API_nanoFramework.Devices.OneWire OR +if( API_nanoFramework.Device.OneWire OR API_System.Net OR API_System.Device.Gpio OR API_Windows.Devices.Gpio OR diff --git a/CMakeSettings.SAMPLE.json b/CMakeSettings.SAMPLE.json index 5de02385a2..166d7ee9ba 100644 --- a/CMakeSettings.SAMPLE.json +++ b/CMakeSettings.SAMPLE.json @@ -164,7 +164,7 @@ "type": "BOOL" }, { - "name": "API_nanoFramework.Devices.OneWire", + "name": "API_nanoFramework.Device.OneWire", "value": "True", "type": "BOOL" }, @@ -449,7 +449,7 @@ "type": "PATH" }, { - "name": "API_nanoFramework.Devices.OneWire", + "name": "API_nanoFramework.Device.OneWire", "value": "True", "type": "BOOL" }, diff --git a/CMakeSettings.json b/CMakeSettings.json index a90f6998c3..b63d41ee26 100644 --- a/CMakeSettings.json +++ b/CMakeSettings.json @@ -164,7 +164,7 @@ "value": "ON" }, { - "name": "API_nanoFramework.Devices.OneWire", + "name": "API_nanoFramework.Device.OneWire", "value": "OFF" }, { @@ -364,7 +364,7 @@ }, // LIBRARIES { - "name": "API_nanoFramework.Devices.OneWire:BOOL", //OFF-default-ON-to-add-this-API + "name": "API_nanoFramework.Device.OneWire:BOOL", //OFF-default-ON-to-add-this-API "value": "ON" }, { diff --git a/README.md b/README.md index 101da22126..98ef74a003 100644 --- a/README.md +++ b/README.md @@ -10,10 +10,10 @@ Document Language: [English](README.md) | [中文简体](README.zh-cn.md) ## Build status -| Component | Stable (branch: main) | Preview (branch: develop) | +| Component | Stable (branch: main) | |:-|---|---| -| nanoBooter + nanoCLR | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=develop)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=develop) | -| Win32 test project | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=develop)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=develop) | +| nanoBooter + nanoCLR | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | +| Win32 test project | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | ## Firmware for reference boards @@ -27,50 +27,52 @@ We also have a [Community Targets](https://github.com/nanoframework/nf-Community ### ESP32 modules and boards -| Target | Stable | Preview | -|:-|---|---| -| ESP32_PSRAM_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PSRAM_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PSRAM_REV0/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_PSRAM_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_PSRAM_REV0/latest/) | -| ESP32_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV0/latest/) | [![Latest Version @ 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Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV3/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_REV3/latest/) | -| ESP32_BLE_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_BLE_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_BLE_REV0/latest/) | [![Latest Version @ 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Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PICO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PICO/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_PICO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_PICO/latest/) | -| ESP32_LILYGO | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_LILYGO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_LILYGO/latest/) | [![Latest Version @ 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Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/KALUGA_1/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/KALUGA_1/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/KALUGA_1/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/KALUGA_1/latest/) | +| Target | Stable | +|:-|---| +| ESP32_PSRAM_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PSRAM_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PSRAM_REV0/latest/) | +| ESP32_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV0/latest/) | +| ESP32_PSRAM_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PSRAM_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PSRAM_REV3/latest/) | +| ESP32_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV3/latest/) | +| ESP32_BLE_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_BLE_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_BLE_REV0/latest/) | +| ESP32_BLE_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_BLE_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_BLE_REV3/latest/) | +| ESP_WROVER_KIT | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP_WROVER_KIT/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP_WROVER_KIT/latest/) | +| ESP32_PICO | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PICO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PICO/latest/) | +| ESP32_LILYGO | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_LILYGO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_LILYGO/latest/) | +| FEATHER_S2 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/FEATHER_S2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/FEATHER_S2/latest/) | +| KALUGA_1 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/KALUGA_1/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/KALUGA_1/latest/) | +| ESP32_OLIMEX | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_OLIMEX/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_OLIMEX/latest/) | ### M5Stack -| Target | Stable | Preview | -|:-|---|---| -| [M5Core](https://docs.m5stack.com/en/core/gray) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5Core/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/M5Core/latest/) | -| [M5StickC](https://docs.m5stack.com/en/core/m5stickc) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickC/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5StickC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/M5StickC/latest/) | -| [M5StickCPlus](https://docs.m5stack.com/en/core/m5stickc_plus) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickCPlus/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickCPlus/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5StickCPlus/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/M5StickCPlus/latest/) | -| [M5Core2](https://docs.m5stack.com/en/core/core2) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core2/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5Core2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages-dev/detail/raw/M5Core2/latest/) | +| Target | Stable | +|:-|---| +| [M5Core](https://docs.m5stack.com/en/core/gray) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core/latest/) | +| [M5StickC](https://docs.m5stack.com/en/core/m5stickc) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickC/latest/) | +| [M5StickCPlus](https://docs.m5stack.com/en/core/m5stickc_plus) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickCPlus/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickCPlus/latest/) | +| [M5Core2](https://docs.m5stack.com/en/core/core2) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core2/latest/) | ### STM32 boards and chip based -| Target | Stable | Preview | -|:-|---|---| -| ST_STM32F429I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F429I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F429I_DISCOVERY/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ST_STM32F429I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ST_STM32F429I_DISCOVERY/latest/) | -| ST_NUCLEO64_F091RC | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_NUCLEO64_F091RC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_NUCLEO64_F091RC/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ST_NUCLEO64_F091RC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ST_NUCLEO64_F091RC/latest/) | -| ST_STM32F769I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F769I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F769I_DISCOVERY/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ST_STM32F769I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ST_STM32F769I_DISCOVERY/latest/) | -| ORGPAL_PALTHREE | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ORGPAL_PALTHREE/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ORGPAL_PALTHREE/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ORGPAL_PALTHREE/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ORGPAL_PALTHREE/latest/) | +| Target | Stable | +|:-|---| +| ST_STM32F429I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F429I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F429I_DISCOVERY/latest/) | +| ST_NUCLEO64_F091RC | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_NUCLEO64_F091RC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_NUCLEO64_F091RC/latest/) | +| ST_STM32F769I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F769I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F769I_DISCOVERY/latest/) | +| ORGPAL_PALTHREE | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ORGPAL_PALTHREE/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ORGPAL_PALTHREE/latest/) | ### NXP boards -| Target | Stable | Preview | -|:-|---|---| -| NXP_MIMXRT1060_EVK | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/NXP_MIMXRT1060_EVK/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/NXP_MIMXRT1060_EVK/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/NXP_MIMXRT1060_EVK/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/NXP_MIMXRT1060_EVK/latest/) | +| Target | Stable | +|:-|---| +| NXP_MIMXRT1060_EVK | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/NXP_MIMXRT1060_EVK/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/NXP_MIMXRT1060_EVK/latest/) | ### TI boards -| Target | Stable | Preview | -|:-|---|---| -| TI_CC1352R1_LAUNCHXL_868 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_868/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_868/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/TI_CC1352R1_LAUNCHXL_868/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/TI_CC1352R1_LAUNCHXL_868/latest/) | -| TI_CC1352R1_LAUNCHXL_915 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_915/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_915/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/TI_CC1352R1_LAUNCHXL_915/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/TI_CC1352R1_LAUNCHXL_915/latest/) | -| TI_CC3220SF_LAUNCHXL | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC3220SF_LAUNCHXL/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC3220SF_LAUNCHXL/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/TI_CC3220SF_LAUNCHXL/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/TI_CC3220SF_LAUNCHXL/latest/) | +| Target | Stable | +|:-|---| +| TI_CC1352R1_LAUNCHXL_868 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_868/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_868/latest/) | +| TI_CC1352R1_LAUNCHXL_915 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_915/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_915/latest/) | +| TI_CC3220SF_LAUNCHXL | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC3220SF_LAUNCHXL/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC3220SF_LAUNCHXL/latest/) | The above firmware builds include support for the class libraries and features marked below. @@ -84,12 +86,13 @@ The above firmware builds include support for the class libraries and features m | ESP32_PSRAM_REV3 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | :heavy_check_mark: | | | ESP32_REV3 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | :heavy_check_mark: | | | ESP32_BLE_REV0 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | | + | ESP32_BLE_REV3 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | | | ESP_WROVER_KIT | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | ESP32_PICO | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | | | | ESP32_LILYGO | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: Wi-Fi + Ethernet | | | | | FEATHER_S2 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | | | | KALUGA_1 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | | :heavy_check_mark: | - | ESP32_OLIMEX_POE | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi + Ethernet | | :heavy_check_mark: | | + | ESP32_OLIMEX | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi + Ethernet | | :heavy_check_mark: | | | M5Core | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi | | :heavy_check_mark: | | | M5StickC | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi | | :heavy_check_mark: | | | M5StickCPlus | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi | | :heavy_check_mark: | | diff --git a/README.zh-cn.md b/README.zh-cn.md index b5009bdab8..112160c5fc 100644 --- a/README.zh-cn.md +++ b/README.zh-cn.md @@ -10,10 +10,10 @@ ## 编译状态 -| 组件 | 编译状态 | 编译状态（开发） | -|:-|---|---| -| nanoBooter + nanoCLR | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=develop)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=develop) | -| Win32 test project | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=develop)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=develop) | +| 组件 | 编译状态 | +|:-|---| +| nanoBooter + nanoCLR | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | +| Win32 test project | [![Build Status](https://dev.azure.com/nanoframework/nf-interpreter/_apis/build/status/nanoframework.nf-interpreter?repoName=nanoframework%2Fnf-interpreter&branchName=main)](https://dev.azure.com/nanoframework/nf-interpreter/_build/latest?definitionId=34&repoName=nanoframework%2Fnf-interpreter&branchName=main) | ## 评估板固件 @@ -24,50 +24,52 @@ ### ESP32 modules and boards -| 目标 | 稳定 | 预览 | -|:-|---|---| -| ESP32_PSRAM_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PSRAM_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PSRAM_REV0/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_PSRAM_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_PSRAM_REV0/latest/) | -| ESP32_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV0/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_REV0/latest/) | -| ESP32_PSRAM_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PSRAM_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PSRAM_REV3/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_PSRAM_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_PSRAM_REV3/latest/) | -| ESP32_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV3/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_REV3/latest/) | -| ESP32_BLE_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_BLE_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_BLE_REV0/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_BLE_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_BLE_REV0/latest/) | -| ESP_WROVER_KIT | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP_WROVER_KIT/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP_WROVER_KIT/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP_WROVER_KIT/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP_WROVER_KIT/latest/) | -| ESP32_PICO | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PICO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PICO/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_PICO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_PICO/latest/) | -| ESP32_LILYGO | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_LILYGO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_LILYGO/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ESP32_LILYGO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ESP32_LILYGO/latest/) | -| FEATHER_S2 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/FEATHER_S2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/FEATHER_S2/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/FEATHER_S2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/FEATHER_S2/latest/) | -| KALUGA_1 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/KALUGA_1/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/KALUGA_1/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/KALUGA_1/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/KALUGA_1/latest/) | +| 目标 | 稳定 | +|:-|---| +| ESP32_PSRAM_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PSRAM_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PSRAM_REV0/latest/) | +| ESP32_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV0/latest/) | +| ESP32_PSRAM_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PSRAM_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PSRAM_REV3/latest/) | +| ESP32_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_REV3/latest/) | +| ESP32_BLE_REV0 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_BLE_REV0/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_BLE_REV0/latest/) | +| ESP32_BLE_REV3 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_BLE_REV3/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_BLE_REV3/latest/) | +| ESP_WROVER_KIT | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP_WROVER_KIT/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP_WROVER_KIT/latest/) | +| ESP32_PICO | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_PICO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_PICO/latest/) | +| ESP32_LILYGO | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_LILYGO/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_LILYGO/latest/) | +| FEATHER_S2 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/FEATHER_S2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/FEATHER_S2/latest/) | +| KALUGA_1 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/KALUGA_1/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/KALUGA_1/latest/) | +| ESP32_OLIMEX | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ESP32_OLIMEX/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ESP32_OLIMEX/latest/) | ### M5Stack -| 目标 | 稳定 | 预览 | -|:-|---|---| -| [M5Core](https://docs.m5stack.com/en/core/gray) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5Core/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/M5Core/latest/) | -| [M5StickC](https://docs.m5stack.com/en/core/m5stickc) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickC/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5StickC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/M5StickC/latest/) | -| [M5StickCPlus](https://docs.m5stack.com/en/core/m5stickc_plus) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickCPlus/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickCPlus/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5StickCPlus/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/M5StickCPlus/latest/) | -| [M5Core2](https://docs.m5stack.com/en/core/core2) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core2/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/M5Core2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages-dev/detail/raw/M5Core2/latest/) | +| 目标 | 稳定 | +|:-|---| +| [M5Core](https://docs.m5stack.com/en/core/gray) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core/latest/) | +| [M5StickC](https://docs.m5stack.com/en/core/m5stickc) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickC/latest/) | +| [M5StickCPlus](https://docs.m5stack.com/en/core/m5stickc_plus) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5StickCPlus/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5StickCPlus/latest/) | +| [M5Core2](https://docs.m5stack.com/en/core/core2) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/M5Core2/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/M5Core2/latest/) | ### STM32 boards and chip based -| 目标 | 稳定 | 预览 | -|:-|---|---| -| ST_STM32F429I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F429I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F429I_DISCOVERY/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ST_STM32F429I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ST_STM32F429I_DISCOVERY/latest/) | -| ST_NUCLEO64_F091RC | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_NUCLEO64_F091RC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_NUCLEO64_F091RC/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ST_NUCLEO64_F091RC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ST_NUCLEO64_F091RC/latest/) | -| ST_STM32F769I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F769I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F769I_DISCOVERY/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ST_STM32F769I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ST_STM32F769I_DISCOVERY/latest/) | -| ORGPAL_PALTHREE | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ORGPAL_PALTHREE/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ORGPAL_PALTHREE/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/ORGPAL_PALTHREE/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/ORGPAL_PALTHREE/latest/) | +| 目标 | 稳定 | +|:-|---| +| ST_STM32F429I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F429I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F429I_DISCOVERY/latest/) | +| ST_NUCLEO64_F091RC | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_NUCLEO64_F091RC/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_NUCLEO64_F091RC/latest/) | +| ST_STM32F769I_DISCOVERY | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ST_STM32F769I_DISCOVERY/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ST_STM32F769I_DISCOVERY/latest/) | +| ORGPAL_PALTHREE | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/ORGPAL_PALTHREE/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/ORGPAL_PALTHREE/latest/) | ### NXP boards -| 目标 | 稳定 | 预览 | -|:-|---|---| -| NXP_MIMXRT1060_EVK | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/NXP_MIMXRT1060_EVK/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/NXP_MIMXRT1060_EVK/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/NXP_MIMXRT1060_EVK/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/NXP_MIMXRT1060_EVK/latest/) | +| 目标 | 稳定 | +|:-|---| +| NXP_MIMXRT1060_EVK | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/NXP_MIMXRT1060_EVK/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/NXP_MIMXRT1060_EVK/latest/) | ### TI boards -| 目标 | 稳定 | 预览 | -|:-|---|---| -| TI_CC1352R1_LAUNCHXL_868 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_868/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_868/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/TI_CC1352R1_LAUNCHXL_868/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/TI_CC1352R1_LAUNCHXL_868/latest/) | -| TI_CC1352R1_LAUNCHXL_915 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_915/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_915/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/TI_CC1352R1_LAUNCHXL_915/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/TI_CC1352R1_LAUNCHXL_915/latest/) | -| TI_CC3220SF_LAUNCHXL | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC3220SF_LAUNCHXL/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC3220SF_LAUNCHXL/latest/) | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images-dev/raw/TI_CC3220SF_LAUNCHXL/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images-dev/packages/detail/raw/TI_CC3220SF_LAUNCHXL/latest/) | +| 目标 | 稳定 | +|:-|---| +| TI_CC1352R1_LAUNCHXL_868 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_868/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_868/latest/) | +| TI_CC1352R1_LAUNCHXL_915 | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC1352R1_LAUNCHXL_915/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC1352R1_LAUNCHXL_915/latest/) | +| TI_CC3220SF_LAUNCHXL | [![Latest Version @ Cloudsmith](https://api-prd.cloudsmith.io/v1/badges/version/net-nanoframework/nanoframework-images/raw/TI_CC3220SF_LAUNCHXL/latest/x/?render=true)](https://cloudsmith.io/~net-nanoframework/repos/nanoframework-images/packages/detail/raw/TI_CC3220SF_LAUNCHXL/latest/) | 以上固件支持以下类库和功能。 @@ -81,12 +83,13 @@ | ESP32_PSRAM_REV3 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | :heavy_check_mark: | | | ESP32_REV3 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | :heavy_check_mark: | | | ESP32_BLE_REV0 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | | + | ESP32_BLE_REV3 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | | | ESP_WROVER_KIT | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: | | ESP32_PICO | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | | | | ESP32_LILYGO | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: Wi-Fi + Ethernet | | | | | FEATHER_S2 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | | | | KALUGA_1 | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | | | :heavy_check_mark: | - | ESP32_OLIMEX_POE | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi + Ethernet | | :heavy_check_mark: | | + | ESP32_OLIMEX | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi + Ethernet | | :heavy_check_mark: | | | M5Core | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi | | :heavy_check_mark: | | | M5StickC | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi | | :heavy_check_mark: | | | M5StickCPlus | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | :heavy_check_mark: | | :heavy_check_mark: | :heavy_check_mark: Wi-Fi | | :heavy_check_mark: | | diff --git a/azure-pipelines-nightly.yml b/azure-pipelines-nightly.yml index bff5bbb590..494992f2f4 100644 --- a/azure-pipelines-nightly.yml +++ b/azure-pipelines-nightly.yml @@ -14,7 +14,7 @@ resources: type: github name: espressif/esp-idf endpoint: nanoframework - ref: refs/tags/v4.3.2 + ref: refs/tags/v4.4 # scheduled build schedules: @@ -303,7 +303,7 @@ jobs: variables: DOTNET_NOLOGO: true # creates a counter and assigns it to the revision variable - REVISION: $[counter('STM32_1_7_3_versioncounter', 0)] + REVISION: $[counter('STM32_1_8_0_versioncounter', 0)] GNU_GCC_TOOLCHAIN_PATH: $(Agent.TempDirectory)\GNU_Tools_ARM_Embedded HelperPackageVersion: $[counter('HelperPackageVersioncounter', 0)] TargetPlatform: 'stm32' @@ -350,6 +350,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -367,7 +368,7 @@ jobs: -DAPI_System.Net=ON -DAPI_System.Device.WiFi=ON -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -385,6 +386,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -402,7 +404,7 @@ jobs: -DAPI_System.Net=ON -DAPI_System.Device.WiFi=ON -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -420,6 +422,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DESP32_XTAL_FREQ_26=ON -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON @@ -438,7 +441,7 @@ jobs: -DAPI_System.Net=ON -DAPI_System.Device.WiFi=ON -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -456,6 +459,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -473,7 +477,7 @@ jobs: -DAPI_System.Net=ON -DAPI_System.Device.WiFi=ON -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -491,6 +495,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DTARGET_SERIAL_BAUDRATE=115200 -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON @@ -525,6 +530,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32_S2 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -562,6 +568,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -584,7 +591,7 @@ jobs: -DAPI_System.Net=ON -DAPI_System.Device.WiFi=ON -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -603,6 +610,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -641,6 +649,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DTARGET_SERIAL_BAUDRATE=115200 -DNF_FEATURE_RTC=ON @@ -682,6 +691,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DTARGET_SERIAL_BAUDRATE=115200 -DNF_FEATURE_RTC=ON @@ -723,6 +733,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -763,6 +774,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -800,7 +812,7 @@ jobs: variables: DOTNET_NOLOGO: true # creates a counter and assigns it to the revision variable - REVISION: $[counter('ESP32_1_7_3_versioncounter', 0)] + REVISION: $[counter('ESP32_1_8_0_versioncounter', 0)] IDF_PATH: 'D:/a/1/s/esp-idf' PIP_CACHE_DIR: $(Pipeline.Workspace)/.pip TargetPlatform: 'esp32' @@ -879,13 +891,13 @@ jobs: -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON -DAPI_nanoFramework.TI.EasyLink=ON -DAPI_nanoFramework.Hardware.TI=ON - + -DAPI_nanoFramework.System.Text=ON GccArm_Version: variables: DOTNET_NOLOGO: true # creates a counter and assigns it to the revision variable - REVISION: $[counter('TI_1_7_3_versioncounter', 0)] + REVISION: $[counter('TI_1_8_0_versioncounter', 0)] GNU_GCC_TOOLCHAIN_PATH: $(Agent.TempDirectory)\GNU_Tools_ARM_Embedded HelperPackageVersion: $[counter('HelperPackageVersioncounter', 0)] TargetPlatform: 'ti_simplelink' diff --git a/azure-pipelines-templates/download-install-esp32-build-components.yml b/azure-pipelines-templates/download-install-esp32-build-components.yml index 7846ee13d0..22b6cbda17 100644 --- a/azure-pipelines-templates/download-install-esp32-build-components.yml +++ b/azure-pipelines-templates/download-install-esp32-build-components.yml @@ -7,8 +7,8 @@ steps: - task: Cache@2 displayName: Cache ESP32 tools inputs: - key: 'esp32_tools | 4_3_2' - restoreKeys: 4_3_2 + key: 'esp32_tools | 4_4' + restoreKeys: 4_4 path: $(UserProfile)\.espressif\tools cacheHitVar: ESP32_TOOLS_CACHE_RESTORED diff --git a/azure-pipelines-templates/nb-gitversioning.yml b/azure-pipelines-templates/nb-gitversioning.yml index 385ce3746f..9998fd0adf 100644 --- a/azure-pipelines-templates/nb-gitversioning.yml +++ b/azure-pipelines-templates/nb-gitversioning.yml @@ -5,14 +5,6 @@ parameters: repoDirectory: '$(Build.SourcesDirectory)' steps: - - task: DotNetCoreCLI@2 - condition: succeeded() - displayName: Install NBGV tool - inputs: - command: custom - custom: tool - arguments: install --tool-path ${{ parameters.repoDirectory }} nbgv - - script: nbgv cloud -a -c -v $(Build.BuildNumber) displayName: Set build number condition: succeeded() diff --git a/azure-pipelines-templates/publish-cloudsmith.yml b/azure-pipelines-templates/publish-cloudsmith.yml index 4afa9af345..a41c498967 100644 --- a/azure-pipelines-templates/publish-cloudsmith.yml +++ b/azure-pipelines-templates/publish-cloudsmith.yml @@ -7,7 +7,16 @@ steps: - task: ArchiveFiles@2 - condition: and( succeeded(), or(eq(variables['ForceUpload'], true), ne(variables['System.PullRequest.PullRequestId'], ''), eq(variables['Build.SourceBranchName'], 'main'), eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') ) ) + condition: >- + and( + succeeded(), + or( + eq(variables['ForceUpload'], true), + ne(variables['System.PullRequest.PullRequestId'], ''), + eq(variables['Build.SourceBranchName'], 'main'), + eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') + ) + ) displayName: Zip binary files (release & PR) inputs: rootFolderOrFile: '$(Build.ArtifactStagingDirectory)\$(TargetPublishName)' @@ -17,7 +26,16 @@ steps: replaceExistingArchive: true - task: CopyFiles@1 - condition: and( succeeded(), or(eq(variables['ForceUpload'], true), ne(variables['System.PullRequest.PullRequestId'], ''), eq(variables['Build.SourceBranchName'], 'main'), eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') ) ) + condition: >- + and( + succeeded(), + or( + eq(variables['ForceUpload'], true), + ne(variables['System.PullRequest.PullRequestId'], ''), + eq(variables['Build.SourceBranchName'], 'main'), + eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') + ) + ) displayName: Collecting deployable artifacts (release & PR) inputs: sourceFolder: $(Agent.TempDirectory) @@ -27,7 +45,16 @@ steps: flattenFolders: true - task: ArchiveFiles@2 - condition: and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), or(eq(variables['ForceUpload'], true), startsWith(variables['Build.SourceBranchName'], 'develop') ) ) + condition: >- + and( + succeeded(), + eq(variables['System.PullRequest.PullRequestId'], ''), + or( + eq(variables['ForceUpload'], true), + startsWith(variables['Build.SourceBranchName'], 'main'), + startsWith(variables['Build.SourceBranchName'], 'develop') + ) + ) displayName: Zip binary files (preview) inputs: rootFolderOrFile: '$(Build.ArtifactStagingDirectory)\$(TargetPublishName)' @@ -37,7 +64,16 @@ steps: replaceExistingArchive: true - task: CopyFiles@1 - condition: and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), or(eq(variables['ForceUpload'], true), startsWith(variables['Build.SourceBranchName'], 'develop') ) ) + condition: >- + and( + succeeded(), + eq(variables['System.PullRequest.PullRequestId'], ''), + or( + eq(variables['ForceUpload'], true), + startsWith(variables['Build.SourceBranchName'], 'main'), + startsWith(variables['Build.SourceBranchName'], 'develop') + ) + ) displayName: Collecting deployable artifacts (preview) inputs: sourceFolder: $(Agent.TempDirectory) @@ -56,7 +92,20 @@ steps: # execute on 'ForceUpload' parameter - task: PowerShell@2 - condition: or( eq(variables['ForceUpload'], true), and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), or( eq(variables['Build.SourceBranchName'], 'develop'), eq(variables['Build.SourceBranchName'], 'main'), contains(variables['Build.SourceBranchName'], 'release'), eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') ) ) ) + condition: >- + or( + eq(variables['ForceUpload'], true), + and( + succeeded(), + eq(variables['System.PullRequest.PullRequestId'], ''), + or( + eq(variables['Build.SourceBranchName'], 'develop'), + eq(variables['Build.SourceBranchName'], 'main'), + contains(variables['Build.SourceBranchName'], 'release'), + eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') + ) + ) + ) displayName: Set Cloudsmith repo path inputs: targetType: 'inline' @@ -103,15 +152,25 @@ steps: failOnStderr: 'true' - task: PowerShell@2 - condition: or( eq(variables['ForceUpload'], true), and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), or( eq(variables['Build.SourceBranchName'], 'develop'), eq(variables['Build.SourceBranchName'], 'main'), contains(variables['Build.SourceBranchName'], 'release'), eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') ) ) ) + condition: >- + or( + eq(variables['ForceUpload'], true), + and( + succeeded(), + eq(variables['System.PullRequest.PullRequestId'], ''), + or( + eq(variables['Build.SourceBranchName'], 'develop'), + eq(variables['Build.SourceBranchName'], 'main'), + contains(variables['Build.SourceBranchName'], 'release'), + eq(variables['Build.Repository.Name'], 'nanoframework/nf-Community-Targets') + ) + ) + ) displayName: Upload package to Cloudsmith inputs: targetType: 'inline' script: | - # update pip (until the build agent image is updated) - python -m pip install --upgrade pip - # install Cloudsmith CLI python -m pip install --upgrade cloudsmith-cli diff --git a/azure-pipelines-templates/publish-win32-nanoclr.yml b/azure-pipelines-templates/publish-win32-nanoclr.yml index a9236502ca..53630ffcb8 100644 --- a/azure-pipelines-templates/publish-win32-nanoclr.yml +++ b/azure-pipelines-templates/publish-win32-nanoclr.yml @@ -8,7 +8,20 @@ steps: # execute on 'ForceUpload' parameter - task: PowerShell@2 - condition: or( eq(variables['ForceUpload'], true), and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), or( eq(variables['Build.SourceBranchName'], 'develop'), eq(variables['Build.SourceBranchName'], ''), contains(variables['Build.SourceBranchName'], 'release') ) ) ) + condition: >- + or( + eq(variables['ForceUpload'], true), + and( + succeeded(), + eq(variables['System.PullRequest.PullRequestId'], ''), + or( + startswith(variables['Build.SourceBranchName'], 'develop'), + eq(variables['Build.SourceBranchName'], 'main'), + eq(variables['Build.SourceBranchName'], ''), + contains(variables['Build.SourceBranchName'], 'release') + ) + ) + ) displayName: Set Cloudsmith repo path inputs: targetType: 'inline' @@ -38,15 +51,25 @@ steps: failOnStderr: 'true' - task: PowerShell@2 - condition: or( eq(variables['ForceUpload'], true), and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), or( eq(variables['Build.SourceBranchName'], 'develop'), eq(variables['Build.SourceBranchName'], ''), contains(variables['Build.SourceBranchName'], 'release') ) ) ) + condition: >- + or( + eq(variables['ForceUpload'], true), + and( + succeeded(), + eq(variables['System.PullRequest.PullRequestId'], ''), + or( + startswith(variables['Build.SourceBranchName'], 'develop'), + eq(variables['Build.SourceBranchName'], 'main'), + eq(variables['Build.SourceBranchName'], ''), + contains(variables['Build.SourceBranchName'], 'release') + ) + ) + ) displayName: Upload WIN32 nanoCLR to Cloudsmith inputs: targetType: 'inline' script: | - # update pip (until the build agent image is updated) - python -m pip install --upgrade pip - # install Cloudsmith CLI python -m pip install --upgrade cloudsmith-cli diff --git a/azure-pipelines.yml b/azure-pipelines.yml index 4b310ba630..0f67695ff2 100644 --- a/azure-pipelines.yml +++ b/azure-pipelines.yml @@ -1,8 +1,37 @@ trigger: branches: - include: ["main", "main", "develop*", "release-*", "refs/tags/*" ] + include: + - main + - develop* + - release-* + - refs/tags/* paths: - exclude: [ "doc", "*.md", ".gitignore", "README.md", "README.zh-cn.md", ".github", ".devcontainer" ] + exclude: + - .clang-format + - .github_changelog_generator + - .gitignore + - .typo-ci.yml + - build.ps1 + - CHANGELOG.md + - CMakeSettings.json + - CMakeSettings.SAMPLE.json + - LICENSE.md + - nf.props + - nfcore.vssettings + - README.md + - README.zh-cn.md + - RunCmd.bat + - sd1.bat + - SetNFRoot.bat + - startocd.bat + - .github/* + - .devcontainer/* + - .vscode/* + - .vs/* + - assets/* + - config/* + - install-scripts/* + - VisualStudioDevelopment/* pr: autoCancel: true @@ -18,7 +47,7 @@ resources: type: github name: espressif/esp-idf endpoint: nanoframework - ref: refs/tags/v4.3.2 + ref: refs/tags/v4.4 jobs: @@ -297,7 +326,7 @@ jobs: -DAPI_Windows.Devices.Pwm=ON -DAPI_System.Device.Pwm=ON -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_System.IO.Ports=ON -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.Devices.Can=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON @@ -328,7 +357,7 @@ jobs: -DAPI_System.Device.Dac=ON -DAPI_System.Net=ON -DNF_SECURITY_MBEDTLS=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.Devices.Can=ON -DAPI_System.IO.FileSystem=ON -DAPI_nanoFramework.ResourceManager=ON @@ -348,7 +377,7 @@ jobs: variables: DOTNET_NOLOGO: true # creates a counter and assigns it to the revision variable - REVISION: $[counter('STM32_1_7_3_versioncounter', 0)] + REVISION: $[counter('STM32_1_8_0_versioncounter', 0)] GNU_GCC_TOOLCHAIN_PATH: $(Agent.TempDirectory)\GNU_Tools_ARM_Embedded HelperPackageVersion: $[counter('HelperPackageVersioncounter', 0)] TargetPlatform: 'stm32' @@ -394,6 +423,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -411,7 +441,7 @@ jobs: -DAPI_System.Net=ON -DAPI_System.Device.WiFi=ON -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -429,6 +459,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -451,7 +482,7 @@ jobs: -DAPI_System.Net=ON -DAPI_System.Device.WiFi=ON -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON + -DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -468,36 +499,37 @@ jobs: TargetBoard: ESP32 TargetSeries: 'esp32' BuildOptions: >- - -DTARGET_SERIES=ESP32 - -DRTOS=ESP32 - -DNF_FEATURE_DEBUGGER=ON - -DNF_FEATURE_RTC=ON - -DNF_FEATURE_HAS_CONFIG_BLOCK=ON - -DNF_SECURITY_MBEDTLS=ON - -DSUPPORT_ANY_BASE_CONVERSION=ON - -DNF_FEATURE_HAS_SDCARD=ON - -DAPI_System.IO.FileSystem=ON - -DAPI_System.Math=ON - -DAPI_Windows.Devices.Gpio=ON -DAPI_System.Device.Gpio=ON - -DAPI_Windows.Devices.Spi=ON -DAPI_System.Device.Spi=ON - -DAPI_Windows.Devices.I2c=ON -DAPI_System.Device.I2c=ON - -DAPI_Windows.Devices.Pwm=ON -DAPI_System.Device.Pwm=ON - -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_System.IO.Ports=ON - -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON - -DAPI_System.Net=ON - -DAPI_System.Device.WiFi=ON - -DAPI_Hardware.Esp32=ON - -DAPI_nanoFramework.Devices.OneWire=ON - -DAPI_nanoFramework.ResourceManager=ON - -DAPI_nanoFramework.System.Collections=ON - -DAPI_nanoFramework.System.Text=ON - -DAPI_nanoFramework.Hardware.Esp32.Rmt=ON - -DAPI_nanoFramework.Graphics=ON - -DGRAPHICS_DISPLAY="ILI9341_240x320_SPI.cpp" - -DTOUCHPANEL_DEVICE="XPT2046.cpp" - -DGRAPHICS_DISPLAY_INTERFACE="Spi_To_Display.cpp" - -DTOUCHPANEL_INTERFACE="Spi_To_TouchPanel.cpp" - -DAPI_System.Device.Dac=ON + -DTARGET_SERIES=ESP32 + -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF + -DNF_FEATURE_DEBUGGER=ON + -DNF_FEATURE_RTC=ON + -DNF_FEATURE_HAS_CONFIG_BLOCK=ON + -DNF_SECURITY_MBEDTLS=ON + -DSUPPORT_ANY_BASE_CONVERSION=ON + -DNF_FEATURE_HAS_SDCARD=ON + -DAPI_System.IO.FileSystem=ON + -DAPI_System.Math=ON + -DAPI_Windows.Devices.Gpio=ON -DAPI_System.Device.Gpio=ON + -DAPI_Windows.Devices.Spi=ON -DAPI_System.Device.Spi=ON + -DAPI_Windows.Devices.I2c=ON -DAPI_System.Device.I2c=ON + -DAPI_Windows.Devices.Pwm=ON -DAPI_System.Device.Pwm=ON + -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_System.IO.Ports=ON + -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON + -DAPI_System.Net=ON + -DAPI_System.Device.WiFi=ON + -DAPI_Hardware.Esp32=ON + -DAPI_nanoFramework.Device.OneWire=ON + -DAPI_nanoFramework.ResourceManager=ON + -DAPI_nanoFramework.System.Collections=ON + -DAPI_nanoFramework.System.Text=ON + -DAPI_nanoFramework.Hardware.Esp32.Rmt=ON + -DAPI_nanoFramework.Graphics=ON + -DGRAPHICS_DISPLAY="ILI9341_240x320_SPI.cpp" + -DTOUCHPANEL_DEVICE="XPT2046.cpp" + -DGRAPHICS_DISPLAY_INTERFACE="Spi_To_Display.cpp" + -DTOUCHPANEL_INTERFACE="Spi_To_TouchPanel.cpp" + -DAPI_System.Device.Dac=ON ToolchainFile: toolchain.xtensa-esp32-elf.cmake SDK_config: @@ -510,6 +542,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON -DNF_FEATURE_HAS_CONFIG_BLOCK=ON @@ -546,6 +579,7 @@ jobs: BuildOptions: >- -DTARGET_SERIES=ESP32_S2 -DRTOS=ESP32 + -DNF_TARGET_HAS_NANOBOOTER=OFF -DESP32_USB_CDC=ON -DNF_FEATURE_DEBUGGER=ON -DNF_FEATURE_RTC=ON @@ -577,7 +611,7 @@ jobs: variables: DOTNET_NOLOGO: true # creates a counter and assigns it to the revision variable - REVISION: $[counter('ESP32_1_7_3_versioncounter', 0)] + REVISION: $[counter('ESP32_1_8_0_versioncounter', 0)] IDF_PATH: 'D:/a/1/s/esp-idf' PIP_CACHE_DIR: $(Pipeline.Workspace)/.pip TargetPlatform: 'esp32' @@ -658,7 +692,7 @@ jobs: variables: DOTNET_NOLOGO: true # creates a counter and assigns it to the revision variable - REVISION: $[counter('NXP_1_7_3_versioncounter', 0)] + REVISION: $[counter('NXP_1_8_0_versioncounter', 0)] GNU_GCC_TOOLCHAIN_PATH: $(Agent.TempDirectory)\GNU_Tools_ARM_Embedded GIT_LFS_SKIP_SMUDGE: 1 TargetPlatform: 'freertos' @@ -743,13 +777,13 @@ jobs: -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON -DAPI_nanoFramework.TI.EasyLink=ON -DAPI_nanoFramework.Hardware.TI=ON - + -DAPI_nanoFramework.System.Text=ON GccArm_Version: variables: DOTNET_NOLOGO: true # creates a counter and assigns it to the revision variable - REVISION: $[counter('TI_1_7_3_versioncounter', 0)] + REVISION: $[counter('TI_1_8_0_versioncounter', 0)] GNU_GCC_TOOLCHAIN_PATH: $(Agent.TempDirectory)\GNU_Tools_ARM_Embedded HelperPackageVersion: $[counter('HelperPackageVersioncounter', 0)] TargetPlatform: 'ti_simplelink' @@ -788,7 +822,7 @@ jobs: DOTNET_NOLOGO: true TargetPublishName: WIN32_nanoCLR # creates a counter and assigns it to the revision variable - REVISION: $[counter('WIN32_1_7_3_versioncounter', 0)] + REVISION: $[counter('WIN32_1_8_0_versioncounter', 0)] steps: - template: azure-pipelines-templates/nb-gitversioning.yml @@ -948,40 +982,35 @@ jobs: - task: UseRubyVersion@0 condition: succeeded() inputs: - versionSpec: '= 2.7' + versionSpec: '= 3.0' addToPath: true - # generate change log including future version - - powershell: | - gem install github_changelog_generator --quiet --no-document - # need to call it passing both cache options with full path otherwise it won't work - github_changelog_generator --token $(GitHubToken) --cache-log $env:AGENT_TEMPDIRECTORY\github-changelog-logger.log --cache-file $env:AGENT_TEMPDIRECTORY\github-changelog-http-cache --pr-wo-labels --future-release "v$env:NBGV_AssemblyVersion" + # Cache change log cache files + - task: Cache@2 + displayName: Cache change log cache files condition: >- and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), - or( - eq(variables['Build.SourceBranchName'], 'main'), - startsWith(variables['Build.SourceBranch'], 'refs/tags/v') - ) + startsWith(variables['Build.SourceBranch'], 'refs/tags/v') ) - displayName: Generate change log + inputs: + key: 'changeLogCacheFiles' + restoreKeys: 1_0 + path: | + $env:AGENT_TEMPDIRECTORY/github-changelog-logger.log + $env:AGENT_TEMPDIRECTORY/github-changelog-http-cache - # generate change log without future version + # generate change log including future version - powershell: | gem install github_changelog_generator --quiet --no-document # need to call it passing both cache options with full path otherwise it won't work - github_changelog_generator --token $(GitHubToken) --cache-log $env:AGENT_TEMPDIRECTORY\github-changelog-logger.log --cache-file $env:AGENT_TEMPDIRECTORY\github-changelog-http-cache --pr-wo-labels + github_changelog_generator --token $(GitHubToken) --cache-log $env:AGENT_TEMPDIRECTORY\github-changelog-logger.log --cache-file $env:AGENT_TEMPDIRECTORY\github-changelog-http-cache --pr-wo-labels --future-release "v$env:NBGV_AssemblyVersion" condition: >- and( succeeded(), eq(variables['System.PullRequest.PullRequestId'], ''), - not( - or( - eq(variables['Build.SourceBranchName'], 'main'), - startsWith(variables['Build.SourceBranch'], 'refs/tags/v') - ) - ) + startsWith(variables['Build.SourceBranch'], 'refs/tags/v') ) displayName: Generate change log diff --git a/build.ps1 b/build.ps1 index 52541c865a..b2279c942c 100644 --- a/build.ps1 +++ b/build.ps1 @@ -90,7 +90,7 @@ If ($TargetBoard -eq "ORGPAL_PALTHREE" -or -DAPI_Windows.Devices.Pwm=ON -DAPI_System.Device.Pwm=ON -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_System.IO.Ports=ON -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.Devices.Can=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON @@ -119,7 +119,7 @@ If ($TargetBoard -eq "ORGPAL_PALTHREE" -or -DAPI_System.Device.Dac=ON -DAPI_System.Net=ON -DNF_SECURITY_MBEDTLS=ON --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.Devices.Can=ON -DAPI_System.IO.FileSystem=ON -DAPI_nanoFramework.ResourceManager=ON @@ -175,7 +175,7 @@ elseif ($TargetBoard -eq "ESP32_WROOM_32") { -DNF_SECURITY_MBEDTLS=ON -DAPI_Hardware.Esp32=ON -DSUPPORT_ANY_BASE_CONVERSION=ON --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -291,7 +291,7 @@ elseif ($TargetBoard -eq "GHI_FEZ_CERB40_NF" -or -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_System.IO.Ports=ON -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON -DAPI_System.Device.Dac=OFF --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.System.Text=ON @@ -342,7 +342,7 @@ elseif ($TargetBoard -eq "GHI_FEZ_CERB40_NF" -or -DAPI_Windows.Devices.Pwm=ON -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_Windows.Devices.Adc=ON --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON "@ } elseif ($TargetBoard -eq "ST_NUCLEO64_F411RE_NF") { @@ -418,7 +418,7 @@ elseif ($TargetBoard -eq "GHI_FEZ_CERB40_NF" -or -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON -DAPI_System.Net=ON -DNF_SECURITY_MBEDTLS=ON --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.System.Collections=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Text=ON @@ -440,7 +440,7 @@ elseif ($TargetBoard -eq "GHI_FEZ_CERB40_NF" -or -DAPI_Windows.Devices.Pwm=ON -DAPI_System.Device.Pwm=ON -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_System.IO.Ports=ON -DAPI_Windows.Devices.Adc=ON -DAPI_System.Device.Adc=ON --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON -DAPI_nanoFramework.Devices.Can=ON "@ } @@ -480,7 +480,7 @@ elseif ($TargetBoard -eq "GHI_FEZ_CERB40_NF" -or -DAPI_Windows.Devices.I2c=ON -DAPI_System.Device.I2c=ON -DAPI_Windows.Devices.Pwm=ON -DAPI_System.Device.Pwm=ON -DAPI_Windows.Devices.SerialCommunication=ON -DAPI_System.IO.Ports=ON --DAPI_nanoFramework.Devices.OneWire=ON +-DAPI_nanoFramework.Device.OneWire=ON -DAPI_Windows.Storage=ON -DAPI_nanoFramework.ResourceManager=ON -DAPI_nanoFramework.System.Collections=ON diff --git a/install-scripts/install-openocd.ps1 b/install-scripts/install-openocd.ps1 index 3793255080..87c8134f8e 100644 --- a/install-scripts/install-openocd.ps1 +++ b/install-scripts/install-openocd.ps1 @@ -24,7 +24,7 @@ if ([string]::IsNullOrEmpty($Path) -or $force) { } else { # use default - $Path = E:\stm32_tools#"C:\nftools" + $Path = 'C:\nftools' } # append the tool path @@ -60,7 +60,7 @@ If ($openOCDPathExists -eq $False -or $force) { Expand-Archive -Path $output -DestinationPath "$Path\temp" # move to final location - Get-ChildItem -Path "$Path\temp\xPack\OpenOCD\xpack-openocd-0.11.0-1" -Recurse | Move-Item -Destination "$Path" + Get-ChildItem -Path "$Path\temp\xpack-openocd-0.11.0-1" -Recurse | Move-Item -Destination "$Path" # remove temp directory Remove-Item $Path\temp -Recurse -Force diff --git a/src/CLR/CorLib/corlib_native.cpp b/src/CLR/CorLib/corlib_native.cpp index 4cb578e0bc..21148dcf0c 100644 --- a/src/CLR/CorLib/corlib_native.cpp +++ b/src/CLR/CorLib/corlib_native.cpp @@ -595,29 +595,6 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, Library_corlib_native_System_MathInternal::Abs___STATIC__I4__I4, Library_corlib_native_System_MathInternal::Min___STATIC__I4__I4__I4, Library_corlib_native_System_MathInternal::Max___STATIC__I4__I4__I4, @@ -642,6 +619,7 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + NULL, Library_corlib_native_System_Random::Next___I4, Library_corlib_native_System_Random::Next___I4__I4, Library_corlib_native_System_Random::NextDouble___R8, @@ -1339,29 +1317,6 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, Library_corlib_native_System_MathInternal::Abs___STATIC__I4__I4, Library_corlib_native_System_MathInternal::Min___STATIC__I4__I4__I4, Library_corlib_native_System_MathInternal::Max___STATIC__I4__I4__I4, @@ -1386,6 +1341,7 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + NULL, Library_corlib_native_System_Random::Next___I4, Library_corlib_native_System_Random::Next___I4__I4, Library_corlib_native_System_Random::NextDouble___R8, @@ -1525,18 +1481,18 @@ const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_mscorlib = #if (NANOCLR_REFLECTION == TRUE) - 0xE7505F22, + 0x004CF1CE, #elif (NANOCLR_REFLECTION == FALSE) - 0xEFFF17F8, + 0x3F4EB772, #else #error "NANOCLR_REFLECTION has to be define either TRUE or FALSE. Check the build options." #endif method_lookup, - { 100, 5, 0, 16 } + { 100, 5, 0, 17 } }; // clang-format on diff --git a/src/CLR/CorLib/corlib_native_System_RuntimeType.cpp b/src/CLR/CorLib/corlib_native_System_RuntimeType.cpp index 8262087117..73f6f4c0f7 100644 --- a/src/CLR/CorLib/corlib_native_System_RuntimeType.cpp +++ b/src/CLR/CorLib/corlib_native_System_RuntimeType.cpp @@ -5,124 +5,132 @@ // #include "CorLib.h" - -HRESULT Library_corlib_native_System_RuntimeType::get_Assembly___SystemReflectionAssembly( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType::get_Assembly___SystemReflectionAssembly(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); CLR_RT_TypeDef_Instance td; - CLR_RT_HeapBlock* hbType = stack.Arg0().Dereference(); - - NANOCLR_CHECK_HRESULT(GetTypeDescriptor( *hbType, td, NULL )); + CLR_RT_HeapBlock *hbType = stack.Arg0().Dereference(); + + NANOCLR_CHECK_HRESULT(GetTypeDescriptor(*hbType, td, NULL)); { - CLR_RT_Assembly_Index idx; idx.Set( td.Assembly() ); - CLR_RT_HeapBlock& top = stack.PushValue(); - CLR_RT_HeapBlock* hbObj; - + CLR_RT_Assembly_Index idx; + idx.Set(td.Assembly()); + CLR_RT_HeapBlock &top = stack.PushValue(); + CLR_RT_HeapBlock *hbObj; + NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(top, g_CLR_RT_WellKnownTypes.m_Assembly)); hbObj = top.Dereference(); - hbObj->SetReflection( idx ); + hbObj->SetReflection(idx); } - + NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::get_Name___STRING( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType::get_Name___STRING(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); - CLR_RT_HeapBlock* hbType = stack.Arg0().Dereference(); + CLR_RT_HeapBlock *hbType = stack.Arg0().Dereference(); + + NANOCLR_CHECK_HRESULT(GetName(*hbType, false, stack.PushValueAndClear())); - NANOCLR_CHECK_HRESULT(GetName( *hbType, false, stack.PushValueAndClear() )); - NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::get_FullName___STRING( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType::get_FullName___STRING(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); - CLR_RT_HeapBlock* hbType = stack.Arg0().Dereference(); + CLR_RT_HeapBlock *hbType = stack.Arg0().Dereference(); + + NANOCLR_CHECK_HRESULT(GetName(*hbType, true, stack.PushValueAndClear())); - NANOCLR_CHECK_HRESULT(GetName( *hbType, true, stack.PushValueAndClear() )); - NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::get_BaseType___SystemType( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType::get_BaseType___SystemType(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); CLR_RT_TypeDef_Instance td; - CLR_UINT32 levels; - CLR_RT_HeapBlock& top = stack.PushValueAndClear(); - CLR_RT_HeapBlock* hbType = stack.Arg0().Dereference(); + CLR_UINT32 levels; + CLR_RT_HeapBlock &top = stack.PushValueAndClear(); + CLR_RT_HeapBlock *hbType = stack.Arg0().Dereference(); + + NANOCLR_CHECK_HRESULT(GetTypeDescriptor(*hbType, td, &levels)); - NANOCLR_CHECK_HRESULT(GetTypeDescriptor( *hbType, td, &levels )); - - if(levels > 0) + if (levels > 0) { - CLR_RT_HeapBlock* hbObj; - + CLR_RT_HeapBlock *hbObj; + NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(top, g_CLR_RT_WellKnownTypes.m_TypeStatic)); hbObj = top.Dereference(); - hbObj->SetReflection( g_CLR_RT_WellKnownTypes.m_Array ); + hbObj->SetReflection(g_CLR_RT_WellKnownTypes.m_Array); } - else if(td.SwitchToParent()) + else if (td.SwitchToParent()) { - CLR_RT_HeapBlock* hbObj; - + CLR_RT_HeapBlock *hbObj; + NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(top, g_CLR_RT_WellKnownTypes.m_TypeStatic)); hbObj = top.Dereference(); - hbObj->SetReflection( td ); + hbObj->SetReflection(td); } NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::GetMethods___SZARRAY_SystemReflectionMethodInfo__SystemReflectionBindingFlags( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType:: + GetMethods___SZARRAY_SystemReflectionMethodInfo__SystemReflectionBindingFlags(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); - return Library_corlib_native_System_Type::GetMethods( stack, NULL, stack.Arg1().NumericByRef().s4, NULL, 0, true ); + return Library_corlib_native_System_Type::GetMethods(stack, NULL, stack.Arg1().NumericByRef().s4, NULL, 0, true); } -HRESULT Library_corlib_native_System_RuntimeType::GetField___SystemReflectionFieldInfo__STRING__SystemReflectionBindingFlags( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType:: + GetField___SystemReflectionFieldInfo__STRING__SystemReflectionBindingFlags(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); - return Library_corlib_native_System_Type::GetFields( stack, stack.Arg1().RecoverString(), stack.Arg2().NumericByRef().s4, false ); + return Library_corlib_native_System_Type::GetFields( + stack, + stack.Arg1().RecoverString(), + stack.Arg2().NumericByRef().s4, + false); } -HRESULT Library_corlib_native_System_RuntimeType::GetFields___SZARRAY_SystemReflectionFieldInfo__SystemReflectionBindingFlags( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType:: + GetFields___SZARRAY_SystemReflectionFieldInfo__SystemReflectionBindingFlags(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); - return Library_corlib_native_System_Type::GetFields( stack, NULL, stack.Arg1().NumericByRef().s4, true ); + return Library_corlib_native_System_Type::GetFields(stack, NULL, stack.Arg1().NumericByRef().s4, true); } -HRESULT Library_corlib_native_System_RuntimeType::GetInterfaces___SZARRAY_SystemType( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType::GetInterfaces___SZARRAY_SystemType(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); - CLR_RT_TypeDef_Instance td; - CLR_RT_HeapBlock& top = stack.PushValueAndClear(); - CLR_RT_HeapBlock* ptr = NULL; - CLR_RT_HeapBlock* hbType = stack.Arg0().Dereference(); + CLR_RT_TypeDef_Instance td; + CLR_RT_HeapBlock &top = stack.PushValueAndClear(); + CLR_RT_HeapBlock *ptr = NULL; + CLR_RT_HeapBlock *hbType = stack.Arg0().Dereference(); int count = 0; // 2-pass algorithm. 1. count the interfaces; 2. store the interfaces in an array for (int pass = 1; pass <= 2; pass++) { - NANOCLR_CHECK_HRESULT(GetTypeDescriptor( *hbType, td )); + NANOCLR_CHECK_HRESULT(GetTypeDescriptor(*hbType, td)); do { // Scan the list of interfaces. - CLR_RT_SignatureParser parser; parser.Initialize_Interfaces( td.m_assm, td.m_target ); + CLR_RT_SignatureParser parser; + parser.Initialize_Interfaces(td.m_assm, td.m_target); CLR_RT_SignatureParser::Element res; - + // 1. pass count if (pass == 1) { @@ -131,15 +139,16 @@ HRESULT Library_corlib_native_System_RuntimeType::GetInterfaces___SZARRAY_System else { // 2. pass fill the data into the array - while(parser.Available() > 0) + while (parser.Available() > 0) { - CLR_RT_HeapBlock* hbObj; + CLR_RT_HeapBlock *hbObj; - NANOCLR_CHECK_HRESULT(parser.Advance( res )); + NANOCLR_CHECK_HRESULT(parser.Advance(res)); - NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(*ptr, g_CLR_RT_WellKnownTypes.m_TypeStatic)); + NANOCLR_CHECK_HRESULT( + g_CLR_RT_ExecutionEngine.NewObjectFromIndex(*ptr, g_CLR_RT_WellKnownTypes.m_TypeStatic)); hbObj = ptr->Dereference(); - hbObj->SetReflection( res.m_cls ); + hbObj->SetReflection(res.m_cls); ptr++; count--; @@ -151,116 +160,125 @@ HRESULT Library_corlib_native_System_RuntimeType::GetInterfaces___SZARRAY_System break; } } - } - while(td.SwitchToParent()); - + } while (td.SwitchToParent()); + if (pass == 1) { // create the result array - NANOCLR_CHECK_HRESULT(CLR_RT_HeapBlock_Array::CreateInstance( top, count, g_CLR_RT_WellKnownTypes.m_TypeStatic )); + NANOCLR_CHECK_HRESULT( + CLR_RT_HeapBlock_Array::CreateInstance(top, count, g_CLR_RT_WellKnownTypes.m_TypeStatic)); // don't need the second pass if nothing found - if (count == 0) break; + if (count == 0) + break; // get the pointer to the first element - ptr = (CLR_RT_HeapBlock*)top.DereferenceArray()->GetFirstElement(); + ptr = (CLR_RT_HeapBlock *)top.DereferenceArray()->GetFirstElement(); } } - + NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::GetElementType___SystemType( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType::GetElementType___SystemType(CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); - - CLR_RT_TypeDescriptor desc; - CLR_RT_TypeDescriptor descSub; - CLR_RT_HeapBlock& top = stack.PushValueAndClear(); - CLR_RT_HeapBlock* hbType = stack.Arg0().Dereference(); - NANOCLR_CHECK_HRESULT(desc.InitializeFromReflection( hbType->ReflectionDataConst() )); + CLR_RT_TypeDescriptor desc; + CLR_RT_TypeDescriptor descSub; + CLR_RT_HeapBlock &top = stack.PushValueAndClear(); + CLR_RT_HeapBlock *hbType = stack.Arg0().Dereference(); + + NANOCLR_CHECK_HRESULT(desc.InitializeFromReflection(hbType->ReflectionDataConst())); - if(desc.GetElementType( descSub )) + if (desc.GetElementType(descSub)) { - CLR_RT_HeapBlock* hbObj; + CLR_RT_HeapBlock *hbObj; NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(top, g_CLR_RT_WellKnownTypes.m_TypeStatic)); hbObj = top.Dereference(); - hbObj->SetReflection( descSub.m_reflex ); + hbObj->SetReflection(descSub.m_reflex); } - + NANOCLR_NOCLEANUP(); } //--// -HRESULT Library_corlib_native_System_RuntimeType::GetTypeDescriptor( CLR_RT_HeapBlock& arg, CLR_RT_TypeDef_Instance& inst, CLR_UINT32* levels ) +HRESULT Library_corlib_native_System_RuntimeType::GetTypeDescriptor( + CLR_RT_HeapBlock &arg, + CLR_RT_TypeDef_Instance &inst, + CLR_UINT32 *levels) { NATIVE_PROFILE_CLR_CORE(); - return CLR_RT_ReflectionDef_Index::Convert( arg, inst, levels ) ? S_OK : CLR_E_NULL_REFERENCE; + return CLR_RT_ReflectionDef_Index::Convert(arg, inst, levels) ? S_OK : CLR_E_NULL_REFERENCE; } -HRESULT Library_corlib_native_System_RuntimeType::GetTypeDescriptor( CLR_RT_HeapBlock& arg, CLR_RT_TypeDef_Instance& inst ) +HRESULT Library_corlib_native_System_RuntimeType::GetTypeDescriptor( + CLR_RT_HeapBlock &arg, + CLR_RT_TypeDef_Instance &inst) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); CLR_UINT32 levels; - NANOCLR_CHECK_HRESULT(GetTypeDescriptor( arg, inst, &levels )); + NANOCLR_CHECK_HRESULT(GetTypeDescriptor(arg, inst, &levels)); - if(levels > 0) + if (levels > 0) { - inst.InitializeFromIndex( g_CLR_RT_WellKnownTypes.m_Array ); + inst.InitializeFromIndex(g_CLR_RT_WellKnownTypes.m_Array); } - NANOCLR_NOCLEANUP(); + NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::GetName( CLR_RT_HeapBlock& arg, bool fFullName, CLR_RT_HeapBlock& res ) +HRESULT Library_corlib_native_System_RuntimeType::GetName(CLR_RT_HeapBlock &arg, bool fFullName, CLR_RT_HeapBlock &res) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); CLR_RT_TypeDef_Instance td; - CLR_UINT32 levels; - char rgBuffer[ 256 ]; - char* szBuffer; - size_t iBuffer; + CLR_UINT32 levels; + char rgBuffer[256]; + char *szBuffer; + size_t iBuffer; + + NANOCLR_CHECK_HRESULT(GetTypeDescriptor(arg, td, &levels)); - NANOCLR_CHECK_HRESULT(GetTypeDescriptor( arg, td, &levels )); - szBuffer = rgBuffer; - iBuffer = MAXSTRLEN(rgBuffer); + iBuffer = MAXSTRLEN(rgBuffer); - NANOCLR_CHECK_HRESULT(g_CLR_RT_TypeSystem.BuildTypeName( td, szBuffer, iBuffer, fFullName ? CLR_RT_TypeSystem::TYPENAME_FLAGS_FULL : 0, levels )); + NANOCLR_CHECK_HRESULT( + g_CLR_RT_TypeSystem + .BuildTypeName(td, szBuffer, iBuffer, fFullName ? CLR_RT_TypeSystem::TYPENAME_FLAGS_FULL : 0, levels)); - NANOCLR_SET_AND_LEAVE(CLR_RT_HeapBlock_String::CreateInstance( res, rgBuffer )); + NANOCLR_SET_AND_LEAVE(CLR_RT_HeapBlock_String::CreateInstance(res, rgBuffer)); NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributesNative___SZARRAY_OBJECT__BOOLEAN( CLR_RT_StackFrame& stack ) +HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributesNative___SZARRAY_OBJECT__BOOLEAN( + CLR_RT_StackFrame &stack) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); - CLR_RT_HeapBlock* returnArray = NULL; - CLR_RT_HeapBlock* callerType = NULL; + CLR_RT_HeapBlock *returnArray = NULL; + CLR_RT_HeapBlock *callerType = NULL; CLR_RT_TypeDef_Instance typeDefinition; int count = 0; // put the return array on the stack - CLR_RT_HeapBlock& top = stack.PushValueAndClear(); + CLR_RT_HeapBlock &top = stack.PushValueAndClear(); // get the caller type callerType = stack.Arg0().Dereference(); - NANOCLR_CHECK_HRESULT(GetTypeDescriptor( *callerType, typeDefinition )); + NANOCLR_CHECK_HRESULT(GetTypeDescriptor(*callerType, typeDefinition)); // setup attribute enumerator CLR_RT_AttributeEnumerator attributeEnumerator; - attributeEnumerator.Initialize( typeDefinition ); + attributeEnumerator.Initialize(typeDefinition); // the return array has two positions for each attribute: // 1st: the attribute type @@ -270,7 +288,7 @@ HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributesNative___SZ do { // move to the next attribute in the collection, if any - if(attributeEnumerator.Advance()) + if (attributeEnumerator.Advance()) { count++; } @@ -280,7 +298,8 @@ HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributesNative___SZ // create the result array // (2 positions for each attribute) - NANOCLR_CHECK_HRESULT(CLR_RT_HeapBlock_Array::CreateInstance( top, ( count * 2 ), g_CLR_RT_WellKnownTypes.m_Object )); + NANOCLR_CHECK_HRESULT( + CLR_RT_HeapBlock_Array::CreateInstance(top, (count * 2), g_CLR_RT_WellKnownTypes.m_Object)); // use this to skip the 2nd pass if no attribute was found if (count == 0) @@ -289,56 +308,58 @@ HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributesNative___SZ } // get the pointer to the first element - returnArray = (CLR_RT_HeapBlock*)top.DereferenceArray()->GetFirstElement(); + returnArray = (CLR_RT_HeapBlock *)top.DereferenceArray()->GetFirstElement(); // reset attribute enumerator - attributeEnumerator.Initialize( typeDefinition ); + attributeEnumerator.Initialize(typeDefinition); break; } - } - while(true); + } while (true); // 2nd pass: fill the array with the attributes types, if any - NANOCLR_CHECK_HRESULT( GetCustomAttributes( attributeEnumerator, returnArray, count ) ); + NANOCLR_CHECK_HRESULT(GetCustomAttributes(attributeEnumerator, returnArray, count)); NANOCLR_NOCLEANUP(); } -HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributes( CLR_RT_AttributeEnumerator attributeEnumerator, CLR_RT_HeapBlock* &returnArray, int count ) +HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributes( + CLR_RT_AttributeEnumerator attributeEnumerator, + CLR_RT_HeapBlock *&returnArray, + int count) { NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); - while(count > 0) + while (count > 0) { // move to the next attribute in the collection, if there is another - if(attributeEnumerator.Advance()) + if (attributeEnumerator.Advance()) { CLR_RT_TypeDef_Instance instanceTypeDef; - + // get the type def for the current attribute attributeEnumerator.GetCurrent(&instanceTypeDef); // setup attribute parser CLR_RT_AttributeParser parser; - NANOCLR_CHECK_HRESULT(parser.Initialize( attributeEnumerator )); + NANOCLR_CHECK_HRESULT(parser.Initialize(attributeEnumerator)); - while(true) + while (true) { - CLR_RT_AttributeParser::Value* val; + CLR_RT_AttributeParser::Value *val; // parse next attribute, if there is another - NANOCLR_CHECK_HRESULT(parser.Next( val )); + NANOCLR_CHECK_HRESULT(parser.Next(val)); - if(val == NULL) + if (val == NULL) { break; } else { // check if this attribute has a default constructor or one with argument - if(val->m_mode == CLR_RT_AttributeParser::Value::c_DefaultConstructor) + if (val->m_mode == CLR_RT_AttributeParser::Value::c_DefaultConstructor) { // default constructor here @@ -349,19 +370,22 @@ HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributes( CLR_RT_At returnArray++; // set next position to NULL - returnArray->SetObjectReference( NULL ); + returnArray->SetObjectReference(NULL); } - else if(val->m_mode == CLR_RT_AttributeParser::Value::c_ConstructorArgument) + else if (val->m_mode == CLR_RT_AttributeParser::Value::c_ConstructorArgument) { // constructor with argument - // get the type for the class object + // get the type for the class object // the assembly has to be the instance type - CLR_RT_MethodDef_Index md ; md.Set( instanceTypeDef.m_assm->m_idx, parser.m_mdIdx.Method() ); - CLR_RT_MethodDef_Instance mdInst; mdInst.InitializeFromIndex( md ); + CLR_RT_MethodDef_Index md; + md.Set(instanceTypeDef.m_assm->m_idx, parser.m_mdIdx.Method()); + CLR_RT_MethodDef_Instance mdInst; + mdInst.InitializeFromIndex(md); - CLR_RT_TypeDef_Instance cls; - if(cls.InitializeFromMethod( mdInst ) == false) NANOCLR_SET_AND_LEAVE(CLR_E_WRONG_TYPE); + CLR_RT_TypeDef_Instance cls; + if (cls.InitializeFromMethod(mdInst) == false) + NANOCLR_SET_AND_LEAVE(CLR_E_WRONG_TYPE); // create a new object for the attribute type and put it on the return array NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObject(*returnArray, cls)); @@ -370,7 +394,6 @@ HRESULT Library_corlib_native_System_RuntimeType::GetCustomAttributes( CLR_RT_At returnArray++; // load the constructor parameter - // TODO: improve this to be able to handle constuctors with multiple parameters returnArray->LoadFromReference(val->m_value); } } diff --git a/src/CLR/Core/CLR_RT_HeapBlock.cpp b/src/CLR/Core/CLR_RT_HeapBlock.cpp index 1f036212b6..2271b2644e 100644 --- a/src/CLR/Core/CLR_RT_HeapBlock.cpp +++ b/src/CLR/Core/CLR_RT_HeapBlock.cpp @@ -1064,24 +1064,94 @@ CLR_UINT32 CLR_RT_HeapBlock::GetHashCode(CLR_RT_HeapBlock *ptr, bool fRecurse, C } break; + case DATATYPE_BOOLEAN: + crc = ptr->NumericByRef().u1 == 0 ? 0 : 1; + break; + + case DATATYPE_I1: + crc = (CLR_UINT32)ptr->NumericByRef().s1; + break; + + case DATATYPE_U1: + crc = (CLR_UINT32)ptr->NumericByRef().u1; + break; + + case DATATYPE_CHAR: + crc = (CLR_UINT32)(ptr->NumericByRef().u2 | ptr->NumericByRef().u2 << 16); + break; + + case DATATYPE_U2: + crc = (CLR_UINT32)ptr->NumericByRef().u2; + break; + + case DATATYPE_I2: + crc = (CLR_UINT32)(ptr->NumericByRef().s2 | ptr->NumericByRef().s2 << 16); + break; + + case DATATYPE_I4: + crc = (CLR_UINT32)ptr->NumericByRef().s4; + break; + + case DATATYPE_U4: + crc = ptr->NumericByRef().u4; + break; + + case DATATYPE_R4: + crc = (CLR_INT32)ptr->NumericByRef().u8.LL; + break; + + case DATATYPE_U8: + crc = ((CLR_INT32)ptr->NumericByRef().u8.LL ^ (CLR_INT32)ptr->NumericByRef().u8.HH); + break; + + case DATATYPE_I8: + crc = ((CLR_INT32)ptr->NumericByRef().s8.LL ^ (CLR_INT32)ptr->NumericByRef().s8.HH); + break; + + case DATATYPE_R8: + crc = ((CLR_INT32)ptr->NumericByRef().r8.LL ^ (CLR_INT32)ptr->NumericByRef().r8.HH); + break; + case DATATYPE_CLASS: case DATATYPE_VALUETYPE: { - // always starts with the pointer to the object to fully disambiguate - crc = SUPPORT_ComputeCRC(&ptr, sizeof(ptr), crc); - - if (fRecurse) + CLR_RT_TypeDef_Instance cls; + cls.InitializeFromIndex(ptr->ObjectCls()); + + // check if this is any of the following types + // DATATYPE_BOOLEAN + // DATATYPE_I1 + // DATATYPE_U1 + // DATATYPE_CHAR + // DATATYPE_I2 + // DATATYPE_U2 + // DATATYPE_I4 + // DATATYPE_U4 + // DATATYPE_R4 + // DATATYPE_I8 + // DATATYPE_U8 + // DATATYPE_R8 + if (fRecurse && cls.m_target->dataType <= DATATYPE_R8) + { + // pass the 1st field which is the one holding the actual value + crc = GetHashCode(&ptr[CLR_RT_HeapBlock::HB_Object_Fields_Offset], false, crc); + } + else { - CLR_RT_TypeDef_Instance cls; - cls.InitializeFromIndex(ptr->ObjectCls()); - int totFields = cls.CrossReference().m_totalFields; + // always starts with the pointer to the object to fully disambiguate + crc = SUPPORT_ComputeCRC(&ptr, sizeof(ptr), crc); - if (totFields > 0) + if (fRecurse) { - do + int totFields = cls.CrossReference().m_totalFields; + + if (totFields > 0) { - crc = GetHashCode(&ptr[totFields + CLR_RT_HeapBlock::HB_Object_Fields_Offset], false, crc); - } while (--totFields > 0); + do + { + crc = GetHashCode(&ptr[totFields + CLR_RT_HeapBlock::HB_Object_Fields_Offset], false, crc); + } while (--totFields > 0); + } } } } @@ -1245,6 +1315,10 @@ bool CLR_RT_HeapBlock::ObjectsEqual( } break; + case DATATYPE_STRING: + return Compare_Values(pArgLeft, pArgRight, false) == 0; + break; + default: if (fSameReference == false) { diff --git a/src/CLR/Core/Hardware/Hardware.cpp b/src/CLR/Core/Hardware/Hardware.cpp index d1da5d5258..ce78baaa1e 100644 --- a/src/CLR/Core/Hardware/Hardware.cpp +++ b/src/CLR/Core/Hardware/Hardware.cpp @@ -160,7 +160,7 @@ void CLR_HW_Hardware::ProcessActivity() if (events & SYSTEM_EVENT_FLAG_ONEWIRE_MASTER) { - eventsCLR |= Event_OneWireMaster; + eventsCLR |= Event_OneWireHost; } if (events & SYSTEM_EVENT_FLAG_STORAGE_IO) diff --git a/src/CLR/Core/TypeSystem.cpp b/src/CLR/Core/TypeSystem.cpp index a8734eea76..f1cdc27b91 100644 --- a/src/CLR/Core/TypeSystem.cpp +++ b/src/CLR/Core/TypeSystem.cpp @@ -4641,49 +4641,100 @@ HRESULT CLR_RT_AttributeParser::Next(Value *&res) } else if ((m_currentPos < m_fixed_Count) && !m_constructorParsed) { - // Attribute class has a constructor + // Attribute class has a constructor with parameter(s) m_lastValue.m_mode = Value::c_ConstructorArgument; m_lastValue.m_name = NULL; - //////////////////////////////////////////////// - // need to read the arguments from the blob - + // get type NANOCLR_CHECK_HRESULT(m_parser.Advance(m_res)); - // - // Skip value info. - // - m_blob += sizeof(CLR_UINT8); - const CLR_RT_DataTypeLookup &dtl = c_CLR_RT_DataTypeLookup[m_res.m_dt]; + CLR_RT_DataTypeLookup dtl = c_CLR_RT_DataTypeLookup[m_res.m_dt]; - if (dtl.m_flags & CLR_RT_DataTypeLookup::c_Numeric) + //////////////////////////////////////////////// + // now read the arguments from the blob + + if ((m_res.m_dt == DATATYPE_OBJECT && m_res.m_levels == 1) || m_fixed_Count > 1) { - // size of value - CLR_UINT32 size = dtl.m_sizeInBytes; + // this is either an array of objects or a constructor with multiple parameters - NANOCLR_CHECK_HRESULT( - g_CLR_RT_ExecutionEngine.NewObjectFromIndex(m_lastValue.m_value, g_CLR_RT_WellKnownTypes.m_TypeStatic)); + uint8_t paramCount; - // need to setup reflection and data type Id to properly setup the object - m_lastValue.m_value.SetReflection(*dtl.m_cls); + if (m_res.m_dt == DATATYPE_OBJECT && m_res.m_levels == 1) + { + // get element count of array (from blob) + NANOCLR_READ_UNALIGNED_UINT8(paramCount, m_blob); + } + else + { + // load parameter count from constructor info because this is not an array of objects + paramCount = m_fixed_Count; + } - m_lastValue.m_value.SetDataId(CLR_RT_HEAPBLOCK_RAW_ID(m_res.m_dt, 0, 1)); + // instantiate array to hold parameters values + NANOCLR_CHECK_HRESULT(CLR_RT_HeapBlock_Array::CreateInstance( + m_lastValue.m_value, + paramCount, + g_CLR_RT_WellKnownTypes.m_Object)); - // because this is a numeric object, performa a raw copy of the numeric value data from the blob to the - // return value - memcpy((CLR_UINT8 *)&m_lastValue.m_value.NumericByRef(), m_blob, size); - m_blob += size; + // get a pointer to the first element + CLR_RT_HeapBlock *currentParam = + (CLR_RT_HeapBlock *)m_lastValue.m_value.DereferenceArray()->GetFirstElement(); + + do + { + // read element type + uint8_t elementType; + NANOCLR_READ_UNALIGNED_UINT8(elementType, m_blob); + + CLR_DataType dt = CLR_RT_TypeSystem::MapElementTypeToDataType(elementType); + + dtl = c_CLR_RT_DataTypeLookup[dt]; + + if (dtl.m_flags & CLR_RT_DataTypeLookup::c_Numeric) + { + CLR_UINT32 size = dtl.m_sizeInBytes; + + NANOCLR_CHECK_HRESULT(ReadNumericValue(currentParam, dt, dtl.m_cls, size)); + } + else if (dt == DATATYPE_STRING) + { + NANOCLR_CHECK_HRESULT(ReadString(currentParam)); + } + else + { + NANOCLR_SET_AND_LEAVE(CLR_E_WRONG_TYPE); + } + + // move pointer to next array element + currentParam++; + + } while (--paramCount > 0); + } + else if (dtl.m_flags & CLR_RT_DataTypeLookup::c_Numeric) + { + // single parameter of numeric type + // OK to skip element type + m_blob += sizeof(CLR_UINT8); + + // size of value + CLR_UINT32 size = dtl.m_sizeInBytes; + + CLR_RT_HeapBlock *currentParam = &m_lastValue.m_value; + NANOCLR_CHECK_HRESULT(ReadNumericValue(currentParam, m_res.m_dt, dtl.m_cls, size)); } else if (m_res.m_dt == DATATYPE_STRING) { - CLR_UINT32 tk; - NANOCLR_READ_UNALIGNED_UINT16(tk, m_blob); + // single parameter of string type + // OK to skip element type + m_blob += sizeof(CLR_UINT8); - CLR_RT_HeapBlock_String::CreateInstance(m_lastValue.m_value, CLR_TkFromType(TBL_Strings, tk), m_assm); + CLR_RT_HeapBlock *currentParam = &m_lastValue.m_value; + NANOCLR_CHECK_HRESULT(ReadString(currentParam)); } else { + // whatever this parameter is we don't have support for it NANOCLR_SET_AND_LEAVE(CLR_E_WRONG_TYPE); } @@ -4761,22 +4812,15 @@ HRESULT CLR_RT_AttributeParser::Next(Value *&res) if (dtl.m_flags & CLR_RT_DataTypeLookup::c_Numeric) { - // need to setup reflection and data type Id to properly setup the object - m_lastValue.m_value.SetReflection(m_res.m_cls); - - m_lastValue.m_value.SetDataId(CLR_RT_HEAPBLOCK_RAW_ID(m_res.m_dt, 0, 1)); - CLR_UINT32 size = dtl.m_sizeInBytes; - memcpy(&m_lastValue.m_value.NumericByRef(), m_blob, size); - m_blob += size; + CLR_RT_HeapBlock *currentParam = &m_lastValue.m_value; + NANOCLR_CHECK_HRESULT(ReadNumericValue(currentParam, m_res.m_dt, dtl.m_cls, size)); } else if (m_res.m_dt == DATATYPE_STRING) { - CLR_UINT32 tk; - NANOCLR_READ_UNALIGNED_UINT16(tk, m_blob); - - CLR_RT_HeapBlock_String::CreateInstance(m_lastValue.m_value, CLR_TkFromType(TBL_Strings, tk), m_assm); + CLR_RT_HeapBlock *currentParam = &m_lastValue.m_value; + NANOCLR_CHECK_HRESULT(ReadString(currentParam)); } else { @@ -4789,6 +4833,54 @@ HRESULT CLR_RT_AttributeParser::Next(Value *&res) NANOCLR_NOCLEANUP(); } +HRESULT CLR_RT_AttributeParser::ReadString(CLR_RT_HeapBlock *&value) +{ + NANOCLR_HEADER(); + + CLR_UINT32 tk; + NANOCLR_READ_UNALIGNED_UINT16(tk, m_blob); + + NANOCLR_CHECK_HRESULT(CLR_RT_HeapBlock_String::CreateInstance(*value, CLR_TkFromType(TBL_Strings, tk), m_assm)); + + NANOCLR_NOCLEANUP(); +} + +HRESULT CLR_RT_AttributeParser::ReadNumericValue( + CLR_RT_HeapBlock *&value, + const CLR_DataType dt, + const CLR_RT_TypeDef_Index *m_cls, + const CLR_UINT32 size) +{ + NANOCLR_HEADER(); + + NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(*value, g_CLR_RT_WellKnownTypes.m_TypeStatic)); + + // need to setup reflection and data type Id to properly setup the object + value->SetReflection(*m_cls); + + value->SetDataId(CLR_RT_HEAPBLOCK_RAW_ID(dt, 0, 1)); + + if (dt == DATATYPE_BOOLEAN) + { + uint8_t boolValue; + NANOCLR_READ_UNALIGNED_UINT8(boolValue, m_blob); + + value->SetBoolean((bool)boolValue); + // this is a bool so need to box it + value->PerformBoxingIfNeeded(); + } + else + { + // because this is a numeric object, perform a a raw copy of the numeric value data from the + // blob to the return value + memcpy((CLR_UINT8 *)&value->NumericByRef(), m_blob, size); + + m_blob += size; + } + + NANOCLR_NOCLEANUP(); +} + const char *CLR_RT_AttributeParser::GetString() { NATIVE_PROFILE_CLR_CORE(); diff --git a/src/CLR/Debugger/Debugger.cpp b/src/CLR/Debugger/Debugger.cpp index 5ee7a7f394..cbebd27aae 100644 --- a/src/CLR/Debugger/Debugger.cpp +++ b/src/CLR/Debugger/Debugger.cpp @@ -1263,8 +1263,6 @@ bool CLR_DBG_Debugger::Monitor_UpdateConfiguration(WP_Message *message) { NATIVE_PROFILE_CLR_DEBUGGER(); - bool success = false; - // include handling of configuration block only if feature is available #if (HAS_CONFIG_BLOCK == TRUE) @@ -1287,7 +1285,6 @@ bool CLR_DBG_Debugger::Monitor_UpdateConfiguration(WP_Message *message) cmd->Done) == true) { cmdReply.ErrorCode = 0; - success = true; } else { @@ -1299,15 +1296,16 @@ bool CLR_DBG_Debugger::Monitor_UpdateConfiguration(WP_Message *message) cmdReply.ErrorCode = 10; } - WP_ReplyToCommand(message, success, false, &cmdReply, sizeof(cmdReply)); + WP_ReplyToCommand(message, true, false, (uint8_t *)&cmdReply, sizeof(Monitor_UpdateConfiguration_Reply)); + + return true; #else (void)message; + return false; -#endif // (HAS_CONFIG_BLOCK == TRUE) - - return success; +#endif } //--// @@ -1555,6 +1553,12 @@ bool CLR_DBG_Debugger::Debugging_Execution_QueryCLRCapabilities(WP_Message *msg) CLR_DBG_Commands::Debugging_Execution_QueryCLRCapabilities::c_CapabilityFlags_HasNanoBooter; } + if (::Target_CanChangeMacAddress()) + { + reply.u_capsFlags |= + CLR_DBG_Commands::Debugging_Execution_QueryCLRCapabilities::c_CapabilityFlags_CanChangeMacAddress; + } + reply.u_capsFlags |= (::GetPlatformCapabilities() & CLR_DBG_Commands::Debugging_Execution_QueryCLRCapabilities::c_CapabilityFlags_PlatformCapabiliy_Mask); diff --git a/src/CLR/Include/nanoCLR_Debugging.h b/src/CLR/Include/nanoCLR_Debugging.h index 7aa7bbb5f3..bc1b4ec08a 100644 --- a/src/CLR/Include/nanoCLR_Debugging.h +++ b/src/CLR/Include/nanoCLR_Debugging.h @@ -209,6 +209,8 @@ struct CLR_DBG_Commands static const CLR_UINT32 c_CapabilityFlags_HasNanoBooter = 0x00001000; ///////////////////////////////////////////////////////////////////////////////// + static const CLR_UINT32 c_CapabilityFlags_CanChangeMacAddress = 0x00002000; + static const CLR_UINT32 c_CapabilityFlags_PlatformCapabiliy_0 = 0x01000000; static const CLR_UINT32 c_CapabilityFlags_PlatformCapabiliy_1 = 0x02000000; static const CLR_UINT32 c_CapabilityFlags_PlatformCapabiliy_2 = 0x04000000; diff --git a/src/CLR/Include/nanoCLR_Runtime.h b/src/CLR/Include/nanoCLR_Runtime.h index cb86e1f791..a4ac1cd549 100644 --- a/src/CLR/Include/nanoCLR_Runtime.h +++ b/src/CLR/Include/nanoCLR_Runtime.h @@ -2031,6 +2031,13 @@ struct CLR_RT_AttributeParser HRESULT Next(Value *&res); + HRESULT ReadNumericValue( + CLR_RT_HeapBlock *&value, + const CLR_DataType dt, + const CLR_RT_TypeDef_Index *m_cls, + const CLR_UINT32 size); + HRESULT ReadString(CLR_RT_HeapBlock *&value); + private: const char *GetString(); }; @@ -3364,27 +3371,31 @@ extern bool g_CLR_RT_fBadStack; #endif //--// + +// clang-format off typedef enum Events { // this event is to be used when there is no event to actually wait for - Event_NoEvent = 0x00000001, - - Event_SerialPortIn = 0x00000002, - Event_SerialPortOut = 0x00000004, - Event_EndPoint = 0x00000008, - Event_StorageIo = 0x00000020, - Event_I2cMaster = 0x00000080, - Event_SpiMaster = 0x00000100, - Event_OneWireMaster = 0x00000200, - Event_Radio = 0x00000400, - Event_Wifi_Station = 0x00000800, - Event_Bluetooth = 0x00001000, - Event_AppDomain = 0x02000000, - Event_Socket = 0x20000000, - Event_IdleCPU = 0x40000000, - Event_LowMemory = 0x80000000, + Event_NoEvent = 0x00000001, + + Event_SerialPortIn = 0x00000002, + Event_SerialPortOut = 0x00000004, + Event_EndPoint = 0x00000008, + Event_StorageIo = 0x00000020, + Event_I2cMaster = 0x00000080, + Event_SpiMaster = 0x00000100, + Event_OneWireHost = 0x00000200, + Event_Radio = 0x00000400, + Event_Wifi_Station = 0x00000800, + Event_Bluetooth = 0x00001000, + Event_AppDomain = 0x02000000, + Event_Socket = 0x20000000, + Event_IdleCPU = 0x40000000, + Event_LowMemory = 0x80000000, } Events; +// clang-format on + struct CLR_RT_ExecutionEngine { //////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/src/DeviceInterfaces/System.Net/sys_net_native.cpp b/src/DeviceInterfaces/System.Net/sys_net_native.cpp index 995f25bbc5..6f37641bd7 100644 --- a/src/DeviceInterfaces/System.Net/sys_net_native.cpp +++ b/src/DeviceInterfaces/System.Net/sys_net_native.cpp @@ -330,15 +330,16 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + NULL, Library_sys_net_native_System_Security_Cryptography_X509Certificates_X509Certificate2::DecodePrivateKeyNative___STATIC__VOID__SZARRAY_U1__STRING, }; const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_Net = { "System.Net", - 0x5B533478, + 0xA01012C3, method_lookup, - { 100, 1, 4, 0 } + { 100, 1, 4, 1 } }; // clang-format on diff --git a/src/DeviceInterfaces/System.Net/sys_net_native_System_Net_NetworkInformation_NetworkInterface.cpp b/src/DeviceInterfaces/System.Net/sys_net_native_System_Net_NetworkInformation_NetworkInterface.cpp index 2301d2a79c..71762ded7b 100644 --- a/src/DeviceInterfaces/System.Net/sys_net_native_System_Net_NetworkInformation_NetworkInterface.cpp +++ b/src/DeviceInterfaces/System.Net/sys_net_native_System_Net_NetworkInformation_NetworkInterface.cpp @@ -149,9 +149,9 @@ HRESULT Library_sys_net_native_System_Net_NetworkInformation_NetworkInterface::U NANOCLR_HEADER(); HAL_Configuration_NetworkInterface config, storageConfig; - bool configChanged; CLR_RT_HeapBlock *pConfig = stack.Arg0().Dereference(); _ASSERTE(pConfig != NULL); + CLR_UINT32 interfaceIndex = pConfig[FIELD___interfaceIndex].NumericByRefConst().u4; CLR_UINT32 updateFlags = stack.Arg1().NumericByRef().u4; CLR_RT_HeapBlock_Array *pMACAddress = pConfig[FIELD___macAddress].DereferenceArray(); @@ -191,13 +191,10 @@ HRESULT Library_sys_net_native_System_Net_NetworkInformation_NetworkInterface::U NANOCLR_SET_AND_LEAVE(CLR_E_FAIL); } - // save the configuration only if there has been a change - configChanged = (config != storageConfig); - // store configuration, updating the configuration block - if (configChanged && - ConfigurationManager_UpdateConfigurationBlock(&config, DeviceConfigurationOption_Network, interfaceIndex) != - TRUE) + // it's up to the configuration manager to decide if the config actually needs to be updated + if (ConfigurationManager_UpdateConfigurationBlock(&config, DeviceConfigurationOption_Network, interfaceIndex) != + TRUE) { NANOCLR_SET_AND_LEAVE(CLR_E_FAIL); } diff --git a/src/HAL/Include/nanoHAL_Capabilites.h b/src/HAL/Include/nanoHAL_Capabilites.h index 49f42783ae..88bd8d2b3f 100644 --- a/src/HAL/Include/nanoHAL_Capabilites.h +++ b/src/HAL/Include/nanoHAL_Capabilites.h @@ -72,6 +72,10 @@ extern "C" // Information on whether the target is capable of IFU bool Target_IFUCapable(); + // Information on whether the MAC address of the the device can be changed by the user + // No default implementation provided to make sure the platform/target esplicitly declares it + bool Target_CanChangeMacAddress(); + #ifdef __cplusplus } #endif diff --git a/src/HAL/nanoHAL_ConfigurationManager.c b/src/HAL/nanoHAL_ConfigurationManager.c index 9080c1d886..d874a26181 100644 --- a/src/HAL/nanoHAL_ConfigurationManager.c +++ b/src/HAL/nanoHAL_ConfigurationManager.c @@ -328,8 +328,8 @@ __nfweak bool ConfigurationManager_CheckExistingConfigurationBlock( uint32_t newConfigBlockSize) { // config blocks parameters are addresses - volatile uint8_t *cursor1 = (volatile uint8_t *)existingConfigBlock; - volatile uint8_t *cursor2 = (volatile uint8_t *)newConfigBlock; + uint8_t *cursor1 = (uint8_t *)existingConfigBlock; + uint8_t *cursor2 = (uint8_t *)newConfigBlock; // obvious check if (existingConfigBlockSize != newConfigBlockSize) @@ -337,14 +337,5 @@ __nfweak bool ConfigurationManager_CheckExistingConfigurationBlock( return false; } - while (existingConfigBlockSize--) - { - if (*cursor1++ != *cursor2++) - { - // content is different!! - return false; - } - } - - return true; + return memcmp(cursor1, cursor2, existingConfigBlockSize) == 0; } diff --git a/src/PAL/COM/sockets/ssl/mbedTLS/mbedtls.h b/src/PAL/COM/sockets/ssl/mbedTLS/mbedtls.h index 995f463601..4e0b37b0f9 100644 --- a/src/PAL/COM/sockets/ssl/mbedTLS/mbedtls.h +++ b/src/PAL/COM/sockets/ssl/mbedTLS/mbedtls.h @@ -10,10 +10,17 @@ #ifdef PLATFORM_ESP32 #include +#else +#include "nf_mbedtls_config.h" #endif #include +#ifdef __cplusplus +extern "C" +{ +#endif + #include "mbedtls/platform.h" #include "mbedtls/net_sockets.h" #include "mbedtls/ssl.h" @@ -22,32 +29,28 @@ #include "mbedtls/error.h" #include "mbedtls/certs.h" -typedef struct mbedTLS_NFContext -{ - mbedtls_entropy_context* entropy; - mbedtls_ctr_drbg_context* ctr_drbg; - mbedtls_ssl_config* conf; - mbedtls_ssl_context* ssl; - mbedtls_net_context* server_fd; - mbedtls_x509_crt* x509_crt; - mbedtls_pk_context* pk; -}mbedTLS_NFContext; - -int net_would_block( const mbedtls_net_context *ctx ); -int mbedtls_net_recv( void *ctx, unsigned char *buf, size_t len ); -int mbedtls_net_send( void *ctx, const unsigned char *buf, size_t len ); -int mbedtls_net_recv_timeout( void *ctx, unsigned char *buf, size_t len, uint32_t timeout ); -void mbedtls_net_free( mbedtls_net_context *ctx ); - -// debug output declaration -void nf_debug( void *ctx, int level, const char *file, int line, const char *str ); - -#ifdef __cplusplus -extern "C" { -#endif - -// function returning the system date and time in Unix Epoch -time_t nf_get_unix_epoch(); + typedef struct mbedTLS_NFContext + { + mbedtls_entropy_context *entropy; + mbedtls_ctr_drbg_context *ctr_drbg; + mbedtls_ssl_config *conf; + mbedtls_ssl_context *ssl; + mbedtls_net_context *server_fd; + mbedtls_x509_crt *x509_crt; + mbedtls_pk_context *pk; + } mbedTLS_NFContext; + + int net_would_block(const mbedtls_net_context *ctx); + int mbedtls_net_recv(void *ctx, unsigned char *buf, size_t len); + int mbedtls_net_send(void *ctx, const unsigned char *buf, size_t len); + int mbedtls_net_recv_timeout(void *ctx, unsigned char *buf, size_t len, uint32_t timeout); + void mbedtls_net_free(mbedtls_net_context *ctx); + + // debug output declaration + void nf_debug(void *ctx, int level, const char *file, int line, const char *str); + + // function returning the system date and time in Unix Epoch + time_t nf_get_unix_epoch(); #ifdef __cplusplus } diff --git a/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h b/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h index fd160c45ff..de2f73340f 100644 --- a/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h +++ b/src/PAL/COM/sockets/ssl/mbedTLS/nf_mbedtls_config.h @@ -105,7 +105,6 @@ extern "C" /* mbed TLS modules */ #define MBEDTLS_AESNI_C #define MBEDTLS_AES_C -#define MBEDTLS_ARC4_C #define MBEDTLS_ASN1_PARSE_C #define MBEDTLS_ASN1_WRITE_C @@ -113,9 +112,6 @@ extern "C" #define MBEDTLS_BIGNUM_C -#define MBEDTLS_BLOWFISH_C - -#define MBEDTLS_CAMELLIA_C #define MBEDTLS_CCM_C #define MBEDTLS_CIPHER_C @@ -135,8 +131,6 @@ extern "C" #define MBEDTLS_GCM_C -#define MBEDTLS_HKDF_C - #define MBEDTLS_HMAC_DRBG_C #define MBEDTLS_MD_C @@ -156,8 +150,6 @@ extern "C" #define MBEDTLS_PLATFORM_C -#define MBEDTLS_POLY1305_C - #define MBEDTLS_RIPEMD160_C #define MBEDTLS_RSA_C diff --git a/src/PAL/COM/sockets/ssl/mbedTLS/ssl_generic_init_internal.cpp b/src/PAL/COM/sockets/ssl/mbedTLS/ssl_generic_init_internal.cpp index d081ad0c97..43ce6b9485 100644 --- a/src/PAL/COM/sockets/ssl/mbedTLS/ssl_generic_init_internal.cpp +++ b/src/PAL/COM/sockets/ssl/mbedTLS/ssl_generic_init_internal.cpp @@ -287,7 +287,7 @@ bool ssl_generic_init_internal( // setup debug stuff // only required if output debug is enabled in mbedtls_config.h -#ifdef MBEDTLS_DEBUG_C +#if defined(MBEDTLS_DEBUG_C) && defined(MBEDTLS_DEBUG_THRESHOLD) mbedtls_debug_set_threshold(MBEDTLS_DEBUG_THRESHOLD); mbedtls_ssl_conf_dbg(context->conf, nf_debug, stdout); #endif diff --git a/src/PAL/Include/CPU_GPIO_decl.h b/src/PAL/Include/CPU_GPIO_decl.h index da893caee0..9ce987ac74 100644 --- a/src/PAL/Include/CPU_GPIO_decl.h +++ b/src/PAL/Include/CPU_GPIO_decl.h @@ -7,6 +7,8 @@ #ifndef DRIVERS_GPIO_DECL_H #define DRIVERS_GPIO_DECL_H +#include + #define GPIO_PIN_NONE 0xFFFFFFFF #define GPIO_ATTRIBUTE_NONE 0x00 diff --git a/src/PAL/Include/CPU_SPI_decl.h b/src/PAL/Include/CPU_SPI_decl.h index 012ce2d4ed..ba0e4bb655 100644 --- a/src/PAL/Include/CPU_SPI_decl.h +++ b/src/PAL/Include/CPU_SPI_decl.h @@ -136,10 +136,8 @@ uint32_t CPU_SPI_PortsCount(); void CPU_SPI_GetPins(uint32_t spi_bus, GPIO_PIN &clk, GPIO_PIN &miso, GPIO_PIN &mosi); // Minimum and Maximum clock frequency available based on bus and configured pins -uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus); -uint32_t CPU_SPI_MaxClockFrequency(uint32_t spi_bus); - -// Number of SPI devices that can simultaneously be opened on a bus ( hardware restrictions) uint32_t CPU_SPI_ChipSelectLineCount(uint32_t spi_bus); +HRESULT CPU_SPI_MinClockFrequency(uint32_t spiBus, int32_t *frequency); +HRESULT CPU_SPI_MaxClockFrequency(uint32_t spiBus, int32_t *frequency); #endif // DRIVERS_SPI_DECL_H diff --git a/src/System.Device.Spi/sys_dev_spi_native.cpp b/src/System.Device.Spi/sys_dev_spi_native.cpp index ff75ef5898..447cede744 100644 --- a/src/System.Device.Spi/sys_dev_spi_native.cpp +++ b/src/System.Device.Spi/sys_dev_spi_native.cpp @@ -12,9 +12,6 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, - NULL, - NULL, - Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::NativeChipSelectLineCount___I4, Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::NativeMaxClockFrequency___I4, Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::NativeMinClockFrequency___I4, NULL, @@ -63,9 +60,9 @@ static const CLR_RT_MethodHandler method_lookup[] = const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_Device_Spi = { "System.Device.Spi", - 0x48031DC5, + 0x3F6E2A7E, method_lookup, - { 100, 1, 0, 0 } + { 100, 1, 1, 0 } }; // clang-format on diff --git a/src/System.Device.Spi/sys_dev_spi_native.h b/src/System.Device.Spi/sys_dev_spi_native.h index b89ffa3ac2..022502b7f9 100644 --- a/src/System.Device.Spi/sys_dev_spi_native.h +++ b/src/System.Device.Spi/sys_dev_spi_native.h @@ -31,7 +31,6 @@ struct Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo { static const int FIELD___controllerId = 1; - NANOCLR_NATIVE_DECLARE(NativeChipSelectLineCount___I4); NANOCLR_NATIVE_DECLARE(NativeMaxClockFrequency___I4); NANOCLR_NATIVE_DECLARE(NativeMinClockFrequency___I4); @@ -73,4 +72,4 @@ struct Library_sys_dev_spi_native_System_Device_Spi_SpiDevice extern const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_Device_Spi; -#endif //SYS_DEV_SPI_NATIVE_H +#endif // SYS_DEV_SPI_NATIVE_H diff --git a/src/System.Device.Spi/sys_dev_spi_native_System_Device_Spi_SpiBusInfo.cpp b/src/System.Device.Spi/sys_dev_spi_native_System_Device_Spi_SpiBusInfo.cpp index 05ff6d42cd..41f750231a 100644 --- a/src/System.Device.Spi/sys_dev_spi_native_System_Device_Spi_SpiBusInfo.cpp +++ b/src/System.Device.Spi/sys_dev_spi_native_System_Device_Spi_SpiBusInfo.cpp @@ -5,48 +5,42 @@ #include "sys_dev_spi_native.h" -HRESULT Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::NativeChipSelectLineCount___I4( - CLR_RT_StackFrame &stack) +HRESULT Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::NativeMaxClockFrequency___I4(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - { - CLR_RT_HeapBlock *pThis = stack.This(); - FAULT_ON_NULL(pThis); - int32_t controllerID = - pThis[Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + int32_t controllerID; + int32_t maxClockFrequency; - stack.SetResult_I4(CPU_SPI_ChipSelectLineCount(controllerID)); - } - NANOCLR_NOCLEANUP(); -} + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); -HRESULT Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::NativeMaxClockFrequency___I4(CLR_RT_StackFrame &stack) -{ - NANOCLR_HEADER(); - { - CLR_RT_HeapBlock *pThis = stack.This(); - FAULT_ON_NULL(pThis); + controllerID = + pThis[Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; - int32_t controllerID = - pThis[Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + NANOCLR_CHECK_HRESULT(CPU_SPI_MaxClockFrequency(controllerID, &maxClockFrequency)); + + stack.SetResult_I4(maxClockFrequency); - stack.SetResult_I4(CPU_SPI_MaxClockFrequency(controllerID)); - } NANOCLR_NOCLEANUP(); } HRESULT Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::NativeMinClockFrequency___I4(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - { - CLR_RT_HeapBlock *pThis = stack.This(); - FAULT_ON_NULL(pThis); - int32_t controllerID = - pThis[Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + int32_t controllerID; + int32_t minClockFrequency; + + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); + + controllerID = + pThis[Library_sys_dev_spi_native_System_Device_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + + NANOCLR_CHECK_HRESULT(CPU_SPI_MinClockFrequency(controllerID, &minClockFrequency)); + + stack.SetResult_I4(minClockFrequency); - stack.SetResult_I4(CPU_SPI_MinClockFrequency(controllerID)); - } NANOCLR_NOCLEANUP(); } diff --git a/src/System.IO.FileSystem/nf_sys_io_filesystem.cpp b/src/System.IO.FileSystem/nf_sys_io_filesystem.cpp index abe29f6e9f..86c91ac40e 100644 --- a/src/System.IO.FileSystem/nf_sys_io_filesystem.cpp +++ b/src/System.IO.FileSystem/nf_sys_io_filesystem.cpp @@ -100,6 +100,7 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + NULL, Library_nf_sys_io_filesystem_System_IO_FileStream::OpenFileNative___VOID__STRING__STRING__I4, Library_nf_sys_io_filesystem_System_IO_FileStream::ReadNative___I4__STRING__STRING__I8__SZARRAY_U1__I4, Library_nf_sys_io_filesystem_System_IO_FileStream::WriteNative___VOID__STRING__STRING__I8__SZARRAY_U1__I4, @@ -122,32 +123,12 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, - NULL, }; const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_IO_FileSystem = { "System.IO.FileSystem", - 0x210D05B1, + 0x3AB74021, method_lookup, { 1, 0, 0, 0 } }; diff --git a/src/System.IO.FileSystem/nf_sys_io_filesystem.h b/src/System.IO.FileSystem/nf_sys_io_filesystem.h index e98a13a6b8..1f09d2f744 100644 --- a/src/System.IO.FileSystem/nf_sys_io_filesystem.h +++ b/src/System.IO.FileSystem/nf_sys_io_filesystem.h @@ -164,14 +164,14 @@ struct Library_nf_sys_io_filesystem_System_IO_File struct Library_nf_sys_io_filesystem_System_IO_FileStream { - static const int FIELD___canRead = 1; - static const int FIELD___canWrite = 2; - static const int FIELD___canSeek = 3; - static const int FIELD___seekLimit = 4; - static const int FIELD___position = 5; - static const int FIELD___disposed = 6; - static const int FIELD___name = 7; - static const int FIELD___path = 8; + static const int FIELD___canRead = 2; + static const int FIELD___canWrite = 3; + static const int FIELD___canSeek = 4; + static const int FIELD___seekLimit = 5; + static const int FIELD___position = 6; + static const int FIELD___disposed = 7; + static const int FIELD___name = 8; + static const int FIELD___path = 9; NANOCLR_NATIVE_DECLARE(OpenFileNative___VOID__STRING__STRING__I4); NANOCLR_NATIVE_DECLARE(ReadNative___I4__STRING__STRING__I8__SZARRAY_U1__I4); @@ -181,18 +181,6 @@ struct Library_nf_sys_io_filesystem_System_IO_FileStream //--// }; -struct Library_nf_sys_io_filesystem_System_IO_MemoryStream -{ - static const int FIELD___buffer = 1; - static const int FIELD___position = 2; - static const int FIELD___length = 3; - static const int FIELD___capacity = 4; - static const int FIELD___expandable = 5; - static const int FIELD___isOpen = 6; - - //--// -}; - struct Library_nf_sys_io_filesystem_System_IO_Path { static const int FIELD_STATIC__DirectorySeparatorChar = 2; @@ -204,5 +192,4 @@ struct Library_nf_sys_io_filesystem_System_IO_Path extern const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_IO_FileSystem; -#endif // NF_SYS_IO_FILESYSTEM_H - +#endif //_NF_SYS_IO_FILESYSTEM_H_ diff --git a/src/System.IO.Ports/sys_io_ser_native.cpp b/src/System.IO.Ports/sys_io_ser_native.cpp index 80ba3d380c..60c1dc133f 100644 --- a/src/System.IO.Ports/sys_io_ser_native.cpp +++ b/src/System.IO.Ports/sys_io_ser_native.cpp @@ -49,6 +49,12 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_BytesToRead___I4, + Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_InvertSignalLevels___BOOLEAN, + Library_sys_io_ser_native_System_IO_Ports_SerialPort::set_InvertSignalLevels___VOID__BOOLEAN, + NULL, + NULL, + NULL, + NULL, NULL, NULL, NULL, @@ -88,14 +94,15 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + NULL, }; const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_System_IO_Ports = { "System.IO.Ports", - 0x564F2452, + 0xCB7C0ECA, method_lookup, - { 100, 1, 2, 0 } + { 100, 1, 4, 0 } }; // clang-format on diff --git a/src/System.IO.Ports/sys_io_ser_native.h b/src/System.IO.Ports/sys_io_ser_native.h index 5d47cd7f38..d4e03e480a 100644 --- a/src/System.IO.Ports/sys_io_ser_native.h +++ b/src/System.IO.Ports/sys_io_ser_native.h @@ -92,8 +92,11 @@ struct Library_sys_io_ser_native_System_IO_Ports_SerialPort static const int FIELD___callbacksDataReceivedEvent = 16; static const int FIELD___stream = 17; static const int FIELD___newLine = 18; + static const int FIELD___bufferSize = 19; NANOCLR_NATIVE_DECLARE(get_BytesToRead___I4); + NANOCLR_NATIVE_DECLARE(get_InvertSignalLevels___BOOLEAN); + NANOCLR_NATIVE_DECLARE(set_InvertSignalLevels___VOID__BOOLEAN); NANOCLR_NATIVE_DECLARE(Read___I4__SZARRAY_U1__I4__I4); NANOCLR_NATIVE_DECLARE(ReadExisting___STRING); NANOCLR_NATIVE_DECLARE(ReadLine___STRING); diff --git a/src/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort_stubs.cpp b/src/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort_stubs.cpp index e082a969f5..8ed8028ebe 100644 --- a/src/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort_stubs.cpp +++ b/src/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort_stubs.cpp @@ -15,6 +15,29 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_BytesToRead___ NANOCLR_NOCLEANUP(); } +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_InvertSignalLevels___BOOLEAN(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::set_InvertSignalLevels___VOID__BOOLEAN( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + + NANOCLR_NOCLEANUP(); +} + HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Read___I4__SZARRAY_U1__I4__I4(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); diff --git a/src/Windows.Devices.Spi/win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo.cpp b/src/Windows.Devices.Spi/win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo.cpp index b380e45f69..3cdb119567 100644 --- a/src/Windows.Devices.Spi/win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo.cpp +++ b/src/Windows.Devices.Spi/win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo.cpp @@ -25,15 +25,19 @@ HRESULT Library_win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo::NativeMaxCloc CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - { - CLR_RT_HeapBlock *pThis = stack.This(); - FAULT_ON_NULL(pThis); + int32_t controllerID; + int32_t maxClockFrequency; - int32_t controllerID = - pThis[Library_win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); + + controllerID = + pThis[Library_win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + + NANOCLR_CHECK_HRESULT(CPU_SPI_MaxClockFrequency(controllerID, &maxClockFrequency)); + + stack.SetResult_I4(maxClockFrequency); - stack.SetResult_I4(CPU_SPI_MaxClockFrequency(controllerID)); - } NANOCLR_NOCLEANUP(); } @@ -41,14 +45,19 @@ HRESULT Library_win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo::NativeMinCloc CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - { - CLR_RT_HeapBlock *pThis = stack.This(); - FAULT_ON_NULL(pThis); - int32_t controllerID = - pThis[Library_win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + int32_t controllerID; + int32_t minClockFrequency; + + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); + + controllerID = + pThis[Library_win_dev_spi_native_Windows_Devices_Spi_SpiBusInfo::FIELD___controllerId].NumericByRef().s4; + + NANOCLR_CHECK_HRESULT(CPU_SPI_MinClockFrequency(controllerID, &minClockFrequency)); + + stack.SetResult_I4(minClockFrequency); - stack.SetResult_I4(CPU_SPI_MinClockFrequency(controllerID)); - } NANOCLR_NOCLEANUP(); } diff --git a/src/nanoFramework.Device.OneWire/nf_dev_onewire.cpp b/src/nanoFramework.Device.OneWire/nf_dev_onewire.cpp new file mode 100644 index 0000000000..75809270dc --- /dev/null +++ b/src/nanoFramework.Device.OneWire/nf_dev_onewire.cpp @@ -0,0 +1,38 @@ +// +// Copyright (c) .NET Foundation and Contributors +// See LICENSE file in the project root for full license information. +// + +#include "nf_dev_onewire.h" + +// clang-format off + +static const CLR_RT_MethodHandler method_lookup[] = +{ + NULL, + NULL, + NULL, + NULL, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchReset___BOOLEAN, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchBit___BOOLEAN__BOOLEAN, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchByte___U1__U1, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::WriteByte___U1__U1, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::ReadByte___U1, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::FindFirstDevice___BOOLEAN__BOOLEAN__BOOLEAN, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::FindNextDevice___BOOLEAN__BOOLEAN__BOOLEAN, + NULL, + NULL, + NULL, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::NativeDispose___VOID, + Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::NativeInit___VOID, +}; + +const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_Device_OneWire = +{ + "nanoFramework.Device.OneWire", + 0xB95C43B4, + method_lookup, + { 100, 0, 4, 0 } +}; + +// clang-format on diff --git a/src/nanoFramework.Devices.OneWire/nf_devices_onewire_native.h b/src/nanoFramework.Device.OneWire/nf_dev_onewire.h similarity index 67% rename from src/nanoFramework.Devices.OneWire/nf_devices_onewire_native.h rename to src/nanoFramework.Device.OneWire/nf_dev_onewire.h index 0228191166..e58a023778 100644 --- a/src/nanoFramework.Devices.OneWire/nf_devices_onewire_native.h +++ b/src/nanoFramework.Device.OneWire/nf_dev_onewire.h @@ -3,17 +3,20 @@ // See LICENSE file in the project root for full license information. // -#ifndef NF_DEVICES_ONEWIRE_NATIVE_H -#define NF_DEVICES_ONEWIRE_NATIVE_H +#ifndef _NF_DEV_ONEWIRE_H_ +#define _NF_DEV_ONEWIRE_H_ #include #include #include -struct Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController +struct Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost { + static const int FIELD_STATIC__s_opened = 0; + static const int FIELD___syncLock = 1; static const int FIELD___serialNumber = 2; + static const int FIELD___disposed = 3; NANOCLR_NATIVE_DECLARE(TouchReset___BOOLEAN); NANOCLR_NATIVE_DECLARE(TouchBit___BOOLEAN__BOOLEAN); @@ -22,11 +25,12 @@ struct Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireCo NANOCLR_NATIVE_DECLARE(ReadByte___U1); NANOCLR_NATIVE_DECLARE(FindFirstDevice___BOOLEAN__BOOLEAN__BOOLEAN); NANOCLR_NATIVE_DECLARE(FindNextDevice___BOOLEAN__BOOLEAN__BOOLEAN); + NANOCLR_NATIVE_DECLARE(NativeDispose___VOID); + NANOCLR_NATIVE_DECLARE(NativeInit___VOID); //--// - }; -extern const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_Devices_OneWire; +extern const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_Device_OneWire; -#endif // NF_DEVICES_ONEWIRE_NATIVE_H +#endif // _NF_DEV_ONEWIRE_H_ diff --git a/src/nanoFramework.Devices.OneWire/nf_devices_onewire_native.cpp b/src/nanoFramework.Devices.OneWire/nf_devices_onewire_native.cpp deleted file mode 100644 index acb5993ef2..0000000000 --- a/src/nanoFramework.Devices.OneWire/nf_devices_onewire_native.cpp +++ /dev/null @@ -1,29 +0,0 @@ -// -// Copyright (c) .NET Foundation and Contributors -// See LICENSE file in the project root for full license information. -// - -#include "nf_devices_onewire_native.h" - -static const CLR_RT_MethodHandler method_lookup[] = -{ - Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchReset___BOOLEAN, - Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchBit___BOOLEAN__BOOLEAN, - Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchByte___U1__U1, - Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::WriteByte___U1__U1, - Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::ReadByte___U1, - Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::FindFirstDevice___BOOLEAN__BOOLEAN__BOOLEAN, - Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::FindNextDevice___BOOLEAN__BOOLEAN__BOOLEAN, - NULL, - NULL, - NULL, - NULL, -}; - -const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_Devices_OneWire = -{ - "nanoFramework.Devices.OneWire", - 0xA5C172BD, - method_lookup, - { 100, 0, 3, 4 } -}; diff --git a/src/nanoFramework.Runtime.Native/nf_rt_native_System_Environment.cpp b/src/nanoFramework.Runtime.Native/nf_rt_native_System_Environment.cpp index 90d609b611..4418067738 100644 --- a/src/nanoFramework.Runtime.Native/nf_rt_native_System_Environment.cpp +++ b/src/nanoFramework.Runtime.Native/nf_rt_native_System_Environment.cpp @@ -10,7 +10,7 @@ HRESULT Library_nf_rt_native_System_Environment::get_TickCount64___STATIC__I8(CL NATIVE_PROFILE_CLR_CORE(); NANOCLR_HEADER(); - int64_t ticksValue = CLR_RT_ExecutionEngine::GetUptime(); + int64_t ticksValue = CLR_RT_ExecutionEngine::GetUptime() / (int64_t)TIME_CONVERSION__TO_MILLISECONDS; stack.SetResult_I8(ticksValue); diff --git a/src/nanoFramework.System.Collections/System.Collections.vcxproj b/src/nanoFramework.System.Collections/System.Collections.vcxproj index 36c4495dfb..8e292d9efe 100644 --- a/src/nanoFramework.System.Collections/System.Collections.vcxproj +++ b/src/nanoFramework.System.Collections/System.Collections.vcxproj @@ -19,6 +19,8 @@ + + diff --git a/src/nanoFramework.System.Collections/System.Collections.vcxproj.filters b/src/nanoFramework.System.Collections/System.Collections.vcxproj.filters index 7026eec5ac..0c78744c0e 100644 --- a/src/nanoFramework.System.Collections/System.Collections.vcxproj.filters +++ b/src/nanoFramework.System.Collections/System.Collections.vcxproj.filters @@ -20,6 +20,12 @@ + + Source Files + + + Source Files + Source Files diff --git a/src/nanoFramework.System.Collections/nf_system_collections.cpp b/src/nanoFramework.System.Collections/nf_system_collections.cpp index 3820d5ae9e..21adf61197 100644 --- a/src/nanoFramework.System.Collections/nf_system_collections.cpp +++ b/src/nanoFramework.System.Collections/nf_system_collections.cpp @@ -1,5 +1,11 @@ +// +// Copyright (c) .NET Foundation and Contributors +// See LICENSE file in the project root for full license information. +// + #include "nf_system_collections.h" +// clang-format off static const CLR_RT_MethodHandler method_lookup[] = { @@ -28,20 +34,23 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + Library_nf_system_collections_System_Collections_Hashtable::Clear___VOID, + Library_nf_system_collections_System_Collections_Hashtable::Contains___BOOLEAN__OBJECT, + Library_nf_system_collections_System_Collections_Hashtable::Remove___VOID__OBJECT, NULL, NULL, NULL, NULL, NULL, + Library_nf_system_collections_System_Collections_Hashtable::InsertNative___VOID__OBJECT__OBJECT__BOOLEAN, + Library_nf_system_collections_System_Collections_Hashtable::GetNative___OBJECT__OBJECT, + Library_nf_system_collections_System_Collections_Hashtable::GetPrimeNative___STATIC__I4__I4, NULL, NULL, NULL, NULL, NULL, - NULL, - NULL, - NULL, - NULL, + Library_nf_system_collections_System_Collections_Hashtable__HashtableEnumerator::MoveNext___BOOLEAN, NULL, NULL, NULL, @@ -91,7 +100,9 @@ static const CLR_RT_MethodHandler method_lookup[] = const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_System_Collections = { "nanoFramework.System.Collections", - 0x5A31313D, + 0x2DC2B090, method_lookup, - { 100, 0, 0, 1 } + { 100, 0, 1, 0 } }; + +// clang-format on diff --git a/src/nanoFramework.System.Collections/nf_system_collections.h b/src/nanoFramework.System.Collections/nf_system_collections.h index a73c05b6ab..9ccbe5e0ab 100644 --- a/src/nanoFramework.System.Collections/nf_system_collections.h +++ b/src/nanoFramework.System.Collections/nf_system_collections.h @@ -11,55 +11,63 @@ #include #include -struct Library_nf_system_collections_System_Collections_DictionaryEntry +struct Library_nf_system_collections_System_Collections_Bucket { - static const int FIELD__Key = 1; - static const int FIELD__Value = 2; - - //--// -}; - -struct Library_nf_system_collections_System_Collections_Hashtable__Entry -{ - static const int FIELD__key = 1; - static const int FIELD__value = 2; - static const int FIELD__next = 3; + static const int FIELD___key = 1; + static const int FIELD___value = 2; + static const int FIELD___hash = 3; //--// }; struct Library_nf_system_collections_System_Collections_Hashtable { + static const int FIELD_STATIC___syncLock = 0; + static const int FIELD___buckets = 1; - static const int FIELD___numberOfBuckets = 2; - static const int FIELD___count = 3; - static const int FIELD___loadFactor = 4; - static const int FIELD___maxLoadFactor = 5; - static const int FIELD___growthFactor = 6; + static const int FIELD___loadsize = 2; + static const int FIELD___loadFactor = 3; + static const int FIELD___count = 4; + static const int FIELD___version = 5; + + NANOCLR_NATIVE_DECLARE(Clear___VOID); + NANOCLR_NATIVE_DECLARE(Contains___BOOLEAN__OBJECT); + NANOCLR_NATIVE_DECLARE(Remove___VOID__OBJECT); + NANOCLR_NATIVE_DECLARE(InsertNative___VOID__OBJECT__OBJECT__BOOLEAN); + NANOCLR_NATIVE_DECLARE(GetNative___OBJECT__OBJECT); + NANOCLR_NATIVE_DECLARE(GetPrimeNative___STATIC__I4__I4); //--// + + static HRESULT Expand(CLR_RT_StackFrame &stack); + static uint32_t InitHash(CLR_RT_HeapBlock *key, int32_t hashsize, uint32_t *seed, uint32_t *incr); }; struct Library_nf_system_collections_System_Collections_Hashtable__HashtableEnumerator { - static const int FIELD__ht = 1; - static const int FIELD__temp = 2; - static const int FIELD__index = 3; - static const int FIELD__returnType = 4; + static const int FIELD___hashtable = 1; + static const int FIELD___bucket = 2; + static const int FIELD___version = 3; + static const int FIELD___current = 4; + static const int FIELD___getObjectRetType = 5; + static const int FIELD___currentKey = 6; + static const int FIELD___currentValue = 7; + + NANOCLR_NATIVE_DECLARE(MoveNext___BOOLEAN); //--// }; struct Library_nf_system_collections_System_Collections_Hashtable__KeyCollection { - static const int FIELD__ht = 1; + static const int FIELD___hashtable = 1; //--// }; struct Library_nf_system_collections_System_Collections_Hashtable__ValueCollection { - static const int FIELD__ht = 1; + static const int FIELD___hashtable = 1; //--// }; diff --git a/src/nanoFramework.System.Collections/nf_system_collections_System_Collections_Hashtable.cpp b/src/nanoFramework.System.Collections/nf_system_collections_System_Collections_Hashtable.cpp new file mode 100644 index 0000000000..9664a96e25 --- /dev/null +++ b/src/nanoFramework.System.Collections/nf_system_collections_System_Collections_Hashtable.cpp @@ -0,0 +1,497 @@ +// +// Copyright (c) .NET Foundation and Contributors +// See LICENSE file in the project root for full license information. +// + +#include "nf_system_collections.h" + +const int32_t HashPrime = 101; +const int32_t MaxPrimeArrayLength = 12143; + +static int32_t s_primes[] = {3, 7, 11, 17, 23, 29, 37, 47, 59, 71, 89, 107, 131, + 163, 197, 239, 293, 353, 431, 521, 631, 761, 919, 1103, 1327, 1597, + 1931, 2333, 2801, 3371, 4049, 4861, 5839, 7013, 8419, 10103, 12143}; + +const size_t lenghtOfPrimes = ARRAYSIZE(s_primes); + +typedef Library_nf_system_collections_System_Collections_Bucket BucketType; + +HRESULT Library_nf_system_collections_System_Collections_Hashtable::Clear___VOID(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + int32_t bucketNumber; + int32_t bucketsLength; + CLR_RT_HeapBlock *bucket; + CLR_RT_HeapBlock *bucketElement; + CLR_RT_HeapBlock_Array *buckets; + + CLR_RT_HeapBlock *pThis; + + pThis = (CLR_RT_HeapBlock *)stack.This(); + FAULT_ON_NULL(pThis); + + if (pThis[FIELD___count].NumericByRef().s4 == 0) + { + NANOCLR_SET_AND_LEAVE(S_OK) + } + + buckets = pThis[FIELD___buckets].DereferenceArray(); + bucketsLength = buckets->m_numOfElements; + + for (bucketNumber = 0; bucketNumber < bucketsLength; bucketNumber++) + { + bucketElement = ((CLR_RT_HeapBlock *)buckets->GetElement(bucketNumber)); + bucket = bucketElement->Dereference(); + + // sanity check: can only clear buckets that already have objects + if (bucket != NULL) + { + bucket[BucketType::FIELD___hash].NumericByRef().u4 = 0; + bucket[BucketType::FIELD___value].SetObjectReference(NULL); + bucket[BucketType::FIELD___key].SetObjectReference(NULL); + } + } + + // reset count field + pThis[FIELD___count].NumericByRef().s4 = 0; + + // update version + pThis[FIELD___version].NumericByRef().s4++; + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_nf_system_collections_System_Collections_Hashtable::Contains___BOOLEAN__OBJECT(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + int32_t entry = 0; + int32_t bucketNumber; + uint32_t hashcode; + uint32_t seed; + uint32_t incr; + int32_t bucketsLength; + CLR_RT_HeapBlock *key; + CLR_RT_HeapBlock *bucket; + CLR_RT_HeapBlock *bucketElement; + CLR_RT_HeapBlock_Array *buckets; + + CLR_RT_HeapBlock *pThis; + + pThis = (CLR_RT_HeapBlock *)stack.This(); + FAULT_ON_NULL(pThis); + + key = stack.Arg1().Dereference(); + FAULT_ON_NULL_ARG(key); + + buckets = pThis[FIELD___buckets].DereferenceArray(); + bucketsLength = buckets->m_numOfElements; + + hashcode = InitHash(key, bucketsLength, &seed, &incr); + + bucketNumber = (int)(seed % (uint32_t)bucketsLength); + + do + { + bucketElement = ((CLR_RT_HeapBlock *)buckets->GetElement(bucketNumber)); + bucket = bucketElement->Dereference(); + + if (bucket != NULL && bucket[BucketType::FIELD___key].Dereference() != NULL && + (bucket[BucketType::FIELD___hash].NumericByRef().u4 == hashcode) && + (CLR_RT_HeapBlock::ObjectsEqual(*bucket[BucketType::FIELD___key].Dereference(), *key, true))) + { + // found + stack.SetResult_Boolean(true); + + NANOCLR_SET_AND_LEAVE(S_OK) + } + + bucketNumber = (int32_t)((bucketNumber + incr) % (uint32_t)bucketsLength); + + } while (++entry < bucketsLength); + + // not found + stack.SetResult_Boolean(false); + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_nf_system_collections_System_Collections_Hashtable::Remove___VOID__OBJECT(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + int32_t entry = 0; + int32_t bucketNumber; + uint32_t hashcode; + uint32_t seed; + uint32_t incr; + int32_t bucketsLength; + CLR_RT_HeapBlock *key; + CLR_RT_HeapBlock *bucket; + CLR_RT_HeapBlock *bucketElement; + CLR_RT_HeapBlock_Array *buckets; + + CLR_RT_HeapBlock *pThis; + + pThis = (CLR_RT_HeapBlock *)stack.This(); + FAULT_ON_NULL(pThis); + + key = stack.Arg1().Dereference(); + FAULT_ON_NULL_ARG(key); + + buckets = pThis[FIELD___buckets].DereferenceArray(); + bucketsLength = buckets->m_numOfElements; + + hashcode = InitHash(key, bucketsLength, &seed, &incr); + + bucketNumber = (int)(seed % (uint32_t)bucketsLength); + + do + { + bucketElement = ((CLR_RT_HeapBlock *)buckets->GetElement(bucketNumber)); + bucket = bucketElement->Dereference(); + + if (bucket != NULL && bucket[BucketType::FIELD___key].Dereference() != NULL && + (bucket[BucketType::FIELD___hash].NumericByRef().u4 == hashcode) && + (CLR_RT_HeapBlock::ObjectsEqual(*bucket[BucketType::FIELD___key].Dereference(), *key, true))) + { + // Clear hash field, then key, then value + + bucket[BucketType::FIELD___hash].NumericByRef().u4 = 0; + bucket[BucketType::FIELD___value].SetObjectReference(NULL); + bucket[BucketType::FIELD___key].SetObjectReference(NULL); + + // subtract count field + pThis[FIELD___count].NumericByRef().s4--; + + // update version + pThis[FIELD___version].NumericByRef().s4++; + + NANOCLR_SET_AND_LEAVE(S_OK) + } + + bucketNumber = (int32_t)((bucketNumber + incr) % (uint32_t)bucketsLength); + + } while (++entry < bucketsLength); + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_nf_system_collections_System_Collections_Hashtable::InsertNative___VOID__OBJECT__OBJECT__BOOLEAN( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + bool add; + uint32_t entry = 0; + int32_t bucketNumber; + uint32_t hashcode; + uint32_t seed; + uint32_t incr; + uint32_t bucketsLength; + CLR_RT_HeapBlock *key; + CLR_RT_HeapBlock *newValue; + CLR_RT_HeapBlock *bucket; + CLR_RT_HeapBlock *bucketElement; + CLR_RT_HeapBlock_Array *buckets; + + CLR_RT_HeapBlock *pThis; + + pThis = (CLR_RT_HeapBlock *)stack.This(); + FAULT_ON_NULL(pThis); + + key = stack.Arg1().Dereference(); + FAULT_ON_NULL_ARG(key); + + newValue = stack.Arg2().Dereference(); + + add = (bool)stack.Arg3().NumericByRef().u1; + + if (pThis[FIELD___count].NumericByRef().s4 >= pThis[FIELD___loadsize].NumericByRef().s4) + { + NANOCLR_CHECK_HRESULT(Expand(stack)); + } + + buckets = pThis[FIELD___buckets].DereferenceArray(); + bucketsLength = buckets->m_numOfElements; + + hashcode = InitHash(key, bucketsLength, &seed, &incr); + + bucketNumber = (int)(seed % bucketsLength); + + do + { + bucketElement = ((CLR_RT_HeapBlock *)buckets->GetElement(bucketNumber)); + bucket = bucketElement->Dereference(); + + // Insert the key/value pair into this bucket if this bucket is empty + if (bucket == NULL || (bucket != NULL && bucket[BucketType::FIELD___key].Dereference() == NULL)) + { + // We pretty much have to insert in this order. Don't set hash + // code until the value & key are set appropriately. + + CLR_RT_TypeDef_Index bucketTypeDef; + CLR_RT_HeapBlock newBucket; + + if (bucket == NULL) + { + // find type, don't bother checking the result as it exists for sure + g_CLR_RT_TypeSystem.FindTypeDef("Bucket", "System.Collections", bucketTypeDef); + // create a new + NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(newBucket, bucketTypeDef)); + bucketElement->LoadFromReference(newBucket); + bucket = bucketElement->Dereference(); + } + + bucket[BucketType::FIELD___hash].NumericByRef().u4 = hashcode; + bucket[BucketType::FIELD___value].SetObjectReference(newValue); + bucket[BucketType::FIELD___key].SetObjectReference(key); + + // add count field + pThis[FIELD___count].NumericByRef().s4++; + + // update version + pThis[FIELD___version].NumericByRef().s4++; + + NANOCLR_SET_AND_LEAVE(S_OK) + } + + if (bucket != NULL && + (CLR_RT_HeapBlock::ObjectsEqual(*bucket[BucketType::FIELD___key].Dereference(), *key, true))) + { + if (add) + { + // entry already exists + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER) + } + + bucket[BucketType::FIELD___value].SetObjectReference(newValue); + + // update version + pThis[FIELD___version].NumericByRef().s4++; + + NANOCLR_SET_AND_LEAVE(S_OK) + } + + bucketNumber = (int32_t)((bucketNumber + incr) % bucketsLength); + + } while (++entry < bucketsLength); + + // got here, found no place for this + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_OPERATION) + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_nf_system_collections_System_Collections_Hashtable::GetNative___OBJECT__OBJECT(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + int32_t entry = 0; + int32_t bucketNumber; + uint32_t hashcode; + uint32_t seed; + uint32_t incr; + int32_t bucketsLength; + CLR_RT_HeapBlock *key; + CLR_RT_HeapBlock *bucket; + CLR_RT_HeapBlock *bucketElement; + CLR_RT_HeapBlock_Array *buckets; + + CLR_RT_HeapBlock *pThis; + + pThis = (CLR_RT_HeapBlock *)stack.This(); + FAULT_ON_NULL(pThis); + + key = stack.Arg1().Dereference(); + FAULT_ON_NULL_ARG(key); + + buckets = pThis[FIELD___buckets].DereferenceArray(); + bucketsLength = buckets->m_numOfElements; + + hashcode = InitHash(key, bucketsLength, &seed, &incr); + + bucketNumber = (int)(seed % (uint32_t)bucketsLength); + + do + { + bucketElement = ((CLR_RT_HeapBlock *)buckets->GetElement(bucketNumber)); + bucket = bucketElement->Dereference(); + + if (bucket != NULL && (bucket[BucketType::FIELD___hash].NumericByRef().u4 == hashcode) && + (CLR_RT_HeapBlock::ObjectsEqual(*bucket[BucketType::FIELD___key].Dereference(), *key, true))) + { + stack.SetResult_Object(bucket[BucketType::FIELD___value].Dereference()); + NANOCLR_SET_AND_LEAVE(S_OK) + } + + bucketNumber = (int32_t)((bucketNumber + incr) % (uint32_t)bucketsLength); + } while (++entry < bucketsLength); + + // no key found + stack.SetResult_Object(NULL); + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_nf_system_collections_System_Collections_Hashtable::GetPrimeNative___STATIC__I4__I4( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + int32_t min; + uint32_t i; + + min = stack.Arg0().NumericByRef().s4; + + if (min < 0) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); + } + + for (i = 0; i < lenghtOfPrimes; i++) + { + if (s_primes[i] >= min) + { + SetResult_INT32(stack, s_primes[i]); + break; + } + } + + if (i == lenghtOfPrimes) + { + // we are not supporting hastables bigger than this size + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + } + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_nf_system_collections_System_Collections_Hashtable::Expand(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + uint32_t bucketsLength; + uint32_t i; + int32_t newSize; + uint32_t seed; + uint32_t incr; + int32_t newBucketNumber; + + CLR_RT_HeapBlock *oldBucket; + CLR_RT_HeapBlock *oldBucketElement; + CLR_RT_HeapBlock *newBucketElement; + CLR_RT_HeapBlock *bucket; + CLR_RT_HeapBlock newBucketsHB; + CLR_RT_HeapBlock_Array *buckets; + CLR_RT_HeapBlock_Array *newBuckets; + CLR_RT_HeapBlock *pThis; + CLR_RT_TypeDef_Index bucketTypeDef; + + pThis = stack.This(); + + buckets = pThis[FIELD___buckets].DereferenceArray(); + bucketsLength = buckets->m_numOfElements; + + newSize = 2 * bucketsLength; + + // Allow the hashtables to grow to maximum reasonable size before encountering capacity overflow. + for (i = 0; i < lenghtOfPrimes; i++) + { + if (s_primes[i] >= newSize) + { + newSize = s_primes[i]; + break; + } + } + + if (i == lenghtOfPrimes) + { + // we are not supporting hastables bigger than this size + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED) + } + + // Don't replace any internal state until we've finished adding to the + // new Bucket[]. This serves two purposes: + // 1) Allow concurrent readers to see valid hashtable contents + // at all times + // 2) Protect against an OutOfMemoryException while allocating this + // new Bucket[]. + + // find type, don't bother checking the result as it exists for sure + g_CLR_RT_TypeSystem.FindTypeDef("Bucket", "System.Collections", bucketTypeDef); + + // create a new array of + NANOCLR_CHECK_HRESULT(CLR_RT_HeapBlock_Array::CreateInstance(newBucketsHB, newSize, bucketTypeDef)) + newBuckets = newBucketsHB.DereferenceArray(); + + for (uint32_t bucketNumber = 0; bucketNumber < bucketsLength; bucketNumber++) + { + oldBucketElement = ((CLR_RT_HeapBlock *)buckets->GetElement(bucketNumber)); + oldBucket = oldBucketElement->Dereference(); + + // sanity check: can only clear buckets that already have objects + if (oldBucket != NULL && oldBucket[BucketType::FIELD___key].Dereference() != NULL) + { + seed = oldBucket[BucketType::FIELD___hash].NumericByRef().u4; + incr = 1 + ((seed * HashPrime) % ((uint32_t)newSize - 1)); + + newBucketNumber = (int)(seed % (uint32_t)newSize); + + while (true) + { + newBucketElement = ((CLR_RT_HeapBlock *)newBuckets->GetElement(newBucketNumber)); + bucket = newBucketElement->Dereference(); + + if (bucket == NULL || bucket[BucketType::FIELD___key].Dereference() == NULL) + { + // create a new + CLR_RT_HeapBlock newBucket; + + NANOCLR_CHECK_HRESULT(g_CLR_RT_ExecutionEngine.NewObjectFromIndex(newBucket, bucketTypeDef)) + newBucketElement->LoadFromReference(newBucket); + bucket = newBucketElement->Dereference(); + + // copy over from old bucket + bucket[BucketType::FIELD___hash].NumericByRef().u4 = + oldBucket[BucketType::FIELD___hash].NumericByRef().u4; + bucket[BucketType::FIELD___value].SetObjectReference( + oldBucket[BucketType::FIELD___value].Dereference()); + bucket[BucketType::FIELD___key].SetObjectReference( + oldBucket[BucketType::FIELD___key].Dereference()); + + break; + } + + newBucketNumber = (int)((newBucketNumber + incr) % (uint32_t)newSize); + } + } + } + + pThis[FIELD___buckets].SetObjectReference(newBucketsHB.DereferenceArray()); + pThis[FIELD___loadsize].NumericByRef().s4 = (CLR_INT32)(pThis[FIELD___loadFactor].NumericByRef().r4 * newSize); + + // update version + pThis[FIELD___version].NumericByRef().s4++; + + NANOCLR_NOCLEANUP(); +} + +uint32_t Library_nf_system_collections_System_Collections_Hashtable::InitHash( + CLR_RT_HeapBlock *key, + int32_t hashsize, + uint32_t *seed, + uint32_t *incr) +{ + uint32_t hashcode; + + // compute hash code for key + hashcode = CLR_RT_HeapBlock::GetHashCode(key, true, 0); + *seed = hashcode; + + // compute and store incr value + *incr = 1 + ((hashcode * HashPrime) % ((uint32_t)hashsize - 1)); + + return hashcode; +} diff --git a/src/nanoFramework.System.Collections/nf_system_collections_System_Collections_Hashtable__HashtableEnumerator.cpp b/src/nanoFramework.System.Collections/nf_system_collections_System_Collections_Hashtable__HashtableEnumerator.cpp new file mode 100644 index 0000000000..7c8c0b629b --- /dev/null +++ b/src/nanoFramework.System.Collections/nf_system_collections_System_Collections_Hashtable__HashtableEnumerator.cpp @@ -0,0 +1,71 @@ +// +// Copyright (c) .NET Foundation and Contributors +// See LICENSE file in the project root for full license information. +// + +#include "nf_system_collections.h" + +typedef Library_nf_system_collections_System_Collections_Hashtable HashtableType; +typedef Library_nf_system_collections_System_Collections_Bucket BucketType; + +HRESULT Library_nf_system_collections_System_Collections_Hashtable__HashtableEnumerator::MoveNext___BOOLEAN( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + int32_t bucket; + + CLR_RT_HeapBlock *hastable; + CLR_RT_HeapBlock *pThis; + CLR_RT_HeapBlock *keyv; + CLR_RT_HeapBlock *currentBucket; + CLR_RT_HeapBlock *bucketElement; + CLR_RT_HeapBlock_Array *buckets; + + pThis = (CLR_RT_HeapBlock *)stack.This(); + FAULT_ON_NULL(pThis); + + hastable = pThis[FIELD___hashtable].Dereference(); + + if (pThis[FIELD___version].NumericByRef().s4 != hastable[HashtableType::FIELD___version].NumericByRef().s4) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_OPERATION) + } + + buckets = hastable[HashtableType::FIELD___buckets].DereferenceArray(); + + bucket = pThis[FIELD___bucket].NumericByRef().s4; + + while (bucket > 0) + { + bucket--; + + bucketElement = ((CLR_RT_HeapBlock *)buckets->GetElement(bucket)); + currentBucket = bucketElement->Dereference(); + + if (currentBucket != NULL) + { + keyv = currentBucket[BucketType::FIELD___key].Dereference(); + + if (keyv != NULL) + { + pThis[FIELD___currentKey].SetObjectReference(keyv); + pThis[FIELD___currentValue].SetObjectReference(currentBucket[BucketType::FIELD___value].Dereference()); + pThis[FIELD___current].NumericByRef().u1 = true; + + pThis[FIELD___bucket].NumericByRef().s4 = bucket; + + stack.SetResult_Boolean(true); + + NANOCLR_SET_AND_LEAVE(S_OK); + } + } + } + + pThis[FIELD___bucket].NumericByRef().s4 = bucket; + pThis[FIELD___current].NumericByRef().u1 = false; + + stack.SetResult_Boolean(false); + + NANOCLR_NOCLEANUP(); +} diff --git a/targets-community b/targets-community index e74cd6291b..e80cb4476f 160000 --- a/targets-community +++ b/targets-community @@ -1 +1 @@ -Subproject commit e74cd6291bb8c1686b21f9f9c0756b455adeda1b +Subproject commit e80cb4476ffd2bb2f73507f4ac75680c3daf96a2 diff --git a/targets/ChibiOS/CMakeLists.txt b/targets/ChibiOS/CMakeLists.txt index 8d49336b1c..e16e6493a1 100644 --- a/targets/ChibiOS/CMakeLists.txt +++ b/targets/ChibiOS/CMakeLists.txt @@ -256,8 +256,12 @@ if(NF_SECURITY_MBEDTLS) FetchContent_Populate(mbedtls) endif() - set(mbedTLS_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/3rdparty/humblelogging/include) - set(mbedTLS_LIBRARIES ${CMAKE_SHARED_LIBRARY_PREFIX}mbedTLS${CMAKE_SHARED_LIBRARY_SUFFIX}) + # don't include tests or programs, only build libraries + set(ENABLE_TESTING CACHE BOOL OFF) + set(ENABLE_PROGRAMS CACHE BOOL OFF) + + cmake_policy(SET CMP0048 NEW) + add_subdirectory(${mbedtls_SOURCE_DIR} mbedtls_build) endif() diff --git a/targets/ChibiOS/ORGPAL_PALTHREE/cmake-variants.json b/targets/ChibiOS/ORGPAL_PALTHREE/cmake-variants.json index 02465c0925..160c60544c 100644 --- a/targets/ChibiOS/ORGPAL_PALTHREE/cmake-variants.json +++ b/targets/ChibiOS/ORGPAL_PALTHREE/cmake-variants.json @@ -66,7 +66,7 @@ "API_System.Device.Adc": "ON", "API_System.Device.Dac": "OFF", "API_System.Net": "ON", - "API_nanoFramework.Devices.OneWire": "OFF", + "API_nanoFramework.Device.OneWire": "OFF", "API_nanoFramework.Devices.Can": "OFF", "API_Windows.Storage": "ON", "API_nanoFramework.ResourceManager": "ON", diff --git a/targets/ChibiOS/ORGPAL_PALTHREE/target_nf_devices_onewire_config.cpp b/targets/ChibiOS/ORGPAL_PALTHREE/target_nf_dev_onewire_config.cpp similarity index 80% rename from targets/ChibiOS/ORGPAL_PALTHREE/target_nf_devices_onewire_config.cpp rename to targets/ChibiOS/ORGPAL_PALTHREE/target_nf_dev_onewire_config.cpp index 8d8884608e..a9e3140497 100644 --- a/targets/ChibiOS/ORGPAL_PALTHREE/target_nf_devices_onewire_config.cpp +++ b/targets/ChibiOS/ORGPAL_PALTHREE/target_nf_dev_onewire_config.cpp @@ -3,7 +3,7 @@ // See LICENSE file in the project root for full license information. // -#include +#include #include #include diff --git a/targets/ChibiOS/ORGPAL_PALTHREE/target_nf_devices_onewire_config.h b/targets/ChibiOS/ORGPAL_PALTHREE/target_nf_dev_onewire_config.h similarity index 100% rename from targets/ChibiOS/ORGPAL_PALTHREE/target_nf_devices_onewire_config.h rename to targets/ChibiOS/ORGPAL_PALTHREE/target_nf_dev_onewire_config.h diff --git a/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.cpp b/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.cpp index 40401efa0b..e9ca21672d 100644 --- a/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.cpp +++ b/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.cpp @@ -12,14 +12,8 @@ UART_CONFIG_PINS(2, GPIOD, GPIOD, 5, 6, 7) -// buffer -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart2_RxBuffer[UART2_RX_SIZE]; - // initialization for UART2 -UART_INIT(2, UART2_RX_SIZE) +UART_INIT(2) // un-initialization for UART2 UART_UNINIT(2) @@ -31,14 +25,8 @@ UART_UNINIT(2) // pin configuration for UART3 UART_CONFIG_PINS(3, GPIOB, GPIOB, 10, 11, 7) -// buffers -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart3_RxBuffer[UART3_RX_SIZE]; - // initialization for UART3 -UART_INIT(3, UART3_RX_SIZE) +UART_INIT(3) // un-initialization for UART3 UART_UNINIT(3) @@ -56,16 +44,8 @@ UART_UNINIT(3) // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(6, GPIOC, GPIOC, 6, 7, 8) -// buffers -// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart6_RxBuffer[UART6_RX_SIZE]; - // initialization for UART6 -UART_INIT(6, UART6_RX_SIZE) +UART_INIT(6) // un-initialization for UART6 UART_UNINIT(6) @@ -77,14 +57,8 @@ UART_UNINIT(6) // pin configuration for UART7 UART_CONFIG_PINS(7, GPIOF, GPIOF, 7, 6, 8) -// buffers -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart7_RxBuffer[UART7_RX_SIZE]; - // initialization for UART7 -UART_INIT(7, UART7_RX_SIZE) +UART_INIT(7) // un-initialization for UART7 UART_UNINIT(7) diff --git a/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.h b/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.h index 130b8694f7..28c69cb60c 100644 --- a/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.h +++ b/targets/ChibiOS/ORGPAL_PALTHREE/target_system_io_ports_config.h @@ -10,10 +10,6 @@ // enable USART2 #define NF_SERIAL_COMM_STM32_UART_USE_USART2 TRUE -// buffers size -#define UART2_TX_SIZE 256 -#define UART2_RX_SIZE 256 - /////////// // UART3 // /////////// @@ -21,10 +17,6 @@ // enable USART3 #define NF_SERIAL_COMM_STM32_UART_USE_USART3 TRUE -// buffers size -#define UART3_TX_SIZE 256 -#define UART3_RX_SIZE 256 - /////////// // UART6 // /////////// @@ -32,19 +24,9 @@ // enable USART6 #define NF_SERIAL_COMM_STM32_UART_USE_USART6 TRUE -// buffers size -// tx buffer size: 256 bytes -#define UART6_TX_SIZE 256 -// rx buffer size: 256 bytes -#define UART6_RX_SIZE 256 - /////////// // UART7 // /////////// // enable UART7 #define NF_SERIAL_COMM_STM32_UART_USE_UART7 TRUE - -// buffers size -#define UART7_TX_SIZE 256 -#define UART7_RX_SIZE 256 diff --git a/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.cpp b/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.cpp index 434ac109b0..6a90b46399 100644 --- a/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.cpp +++ b/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.cpp @@ -19,16 +19,8 @@ // in STM32F091RC datasheet) UART_CONFIG_PINS(8, GPIOC, GPIOC, 2, 3, 2) -// buffers -// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart8_RxBuffer[UART8_RX_SIZE]; - // initialization for UART8 -UART_INIT(8, UART8_RX_SIZE) +UART_INIT(8) // un-initialization for UART8 UART_UNINIT(8) diff --git a/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.h b/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.h index 7a8341b393..6b450e24f8 100644 --- a/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.h +++ b/targets/ChibiOS/ST_NUCLEO64_F091RC/target_system_io_ports_config.h @@ -9,7 +9,3 @@ // enable USART8 #define NF_SERIAL_COMM_STM32_UART_USE_UART8 TRUE - -// buffers size -// rx buffer size: 256 bytes -#define UART8_RX_SIZE 256 diff --git a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/cmake-variants.json b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/cmake-variants.json index dadb72199c..ae4c44ee9b 100644 --- a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/cmake-variants.json +++ b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/cmake-variants.json @@ -57,7 +57,7 @@ "API_System.IO.Ports": "ON", "API_Windows.Devices.Adc": "ON", "API_System.Device.Adc": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Devices.Can": "ON", "API_nanoFramework.ResourceManager": "ON", "API_nanoFramework.System.Collections": "ON", diff --git a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_devices_onewire_config.cpp b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_dev_onewire_config.cpp similarity index 74% rename from targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_devices_onewire_config.cpp rename to targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_dev_onewire_config.cpp index 611dd64597..443fc4da38 100644 --- a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_devices_onewire_config.cpp +++ b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_dev_onewire_config.cpp @@ -3,8 +3,8 @@ // See LICENSE file in the project root for full license information. // -#include "target_nf_devices_onewire_config.h" -#include +#include "target_nf_dev_onewire_config.h" +#include /////////// // UART6 // @@ -13,18 +13,18 @@ // pin configuration for UART6 // port for TX pin is: GPIOC // TX pin: is GPIOC_6 -// GPIO alternate pin function is 8 (see "Table 12. STM32F427xx and STM32F429xx alternate function mapping" in STM32F427xx and STM32F429xx datasheet) +// GPIO alternate pin function is 8 (see "Table 12. STM32F427xx and STM32F429xx alternate function mapping" in +// STM32F427xx and STM32F429xx datasheet) UART_CONFIG_PINS(6, GPIOC, 6, 8) - // buffers // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) #if defined(__GNUC__) -__attribute__((aligned (32))) +__attribute__((aligned(32))) #endif uint8_t Uart6_TxBuffer[UART6_TX_SIZE]; #if defined(__GNUC__) -__attribute__((aligned (32))) +__attribute__((aligned(32))) #endif uint8_t Uart6_RxBuffer[UART6_RX_SIZE]; diff --git a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_devices_onewire_config.h b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_dev_onewire_config.h similarity index 71% rename from targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_devices_onewire_config.h rename to targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_dev_onewire_config.h index 9523fbed23..6576df36c3 100644 --- a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_devices_onewire_config.h +++ b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_nf_dev_onewire_config.h @@ -8,10 +8,10 @@ /////////// // enable USART4 -#define NF_ONEWIRE_STM32_UART_USE_USART6 TRUE +#define NF_ONEWIRE_STM32_UART_USE_USART6 TRUE // buffers size // tx buffer size: 32 bytes -#define UART6_TX_SIZE 32 +#define UART6_TX_SIZE 32 // rx buffer size: 32 bytes -#define UART6_RX_SIZE 32 \ No newline at end of file +#define UART6_RX_SIZE 32 \ No newline at end of file diff --git a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.cpp b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.cpp index 0b7854e948..05b5f7339b 100644 --- a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.cpp +++ b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.cpp @@ -19,16 +19,8 @@ // STM32F427xx and STM32F429xx datasheet) UART_CONFIG_PINS(1, GPIOA, GPIOA, 9, 10, 7) -// buffers -// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart1_RxBuffer[UART1_RX_SIZE]; - // initialization for UART1 -UART_INIT(1, UART1_RX_SIZE) +UART_INIT(1) // un-initialization for UART1 UART_UNINIT(1) @@ -46,16 +38,8 @@ UART_UNINIT(1) // STM32F427xx and STM32F429xx datasheet) UART_CONFIG_PINS(3, GPIOD, GPIOD, 8, 9, 7) -// buffers -// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart3_RxBuffer[UART3_RX_SIZE]; - // initialization for UART3 -UART_INIT(3, UART3_RX_SIZE) +UART_INIT(3) // un-initialization for UART3 UART_UNINIT(3) diff --git a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.h b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.h index 0c87cc0e22..a9144bca95 100644 --- a/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.h +++ b/targets/ChibiOS/ST_STM32F429I_DISCOVERY/target_system_io_ports_config.h @@ -10,17 +10,9 @@ // enable USART1 #define NF_SERIAL_COMM_STM32_UART_USE_USART1 TRUE -// buffers size -// rx buffer size: 256 bytes -#define UART1_RX_SIZE 256 - /////////// // UART3 // /////////// // enable USART3 #define NF_SERIAL_COMM_STM32_UART_USE_USART3 TRUE - -// buffers size -// rx buffer size: 256 bytes -#define UART3_RX_SIZE 256 diff --git a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/cmake-variants.json b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/cmake-variants.json index f02820fc2f..756c44ba3d 100644 --- a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/cmake-variants.json +++ b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/cmake-variants.json @@ -65,7 +65,7 @@ "API_System.Device.Adc": "ON", "API_System.Device.Dac": "ON", "API_System.Net": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Devices.Can": "ON", "API_Windows.Storage": "ON", "API_nanoFramework.ResourceManager": "ON", diff --git a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_devices_onewire_config.cpp b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_dev_onewire_config.cpp similarity index 81% rename from targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_devices_onewire_config.cpp rename to targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_dev_onewire_config.cpp index 61ac65de1a..d2fe09ebc0 100644 --- a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_devices_onewire_config.cpp +++ b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_dev_onewire_config.cpp @@ -3,8 +3,8 @@ // See LICENSE file in the project root for full license information. // -#include "target_nf_devices_onewire_config.h" -#include +#include "target_nf_dev_onewire_config.h" +#include /////////// // UART4 // @@ -20,10 +20,10 @@ UART_CONFIG_PINS(4, GPIOC, 10, 8) // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) #if defined(__GNUC__) -__attribute__((aligned (32))) +__attribute__((aligned(32))) #endif uint8_t Uart4_TxBuffer[UART4_TX_SIZE]; #if defined(__GNUC__) -__attribute__((aligned (32))) +__attribute__((aligned(32))) #endif uint8_t Uart4_RxBuffer[UART4_RX_SIZE]; diff --git a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_devices_onewire_config.h b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_dev_onewire_config.h similarity index 71% rename from targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_devices_onewire_config.h rename to targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_dev_onewire_config.h index 53130a03ed..b4c3aba457 100644 --- a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_devices_onewire_config.h +++ b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_nf_dev_onewire_config.h @@ -8,10 +8,10 @@ /////////// // enable USART4 -#define NF_ONEWIRE_STM32_UART_USE_USART4 TRUE +#define NF_ONEWIRE_STM32_UART_USE_USART4 TRUE // buffers size // tx buffer size: 32 bytes -#define UART4_TX_SIZE 32 +#define UART4_TX_SIZE 32 // rx buffer size: 32 bytes -#define UART4_RX_SIZE 32 \ No newline at end of file +#define UART4_RX_SIZE 32 \ No newline at end of file diff --git a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.cpp b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.cpp index 6b4d24f872..4baa860216 100644 --- a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.cpp +++ b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.cpp @@ -18,16 +18,8 @@ // // GPIO alternate pin function is 8 (see "Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(1, GPIOD, GPIOC, 2, 12, 8) -// // buffers -// // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -// #if defined(__GNUC__) -// __attribute__((aligned (32))) -// #endif -// uint8_t Uart1_RxBuffer[UART1_RX_SIZE]; - // // initialization for UART1 -// UART_INIT(1, UART1_RX_SIZE) +// UART_INIT(1) // // un-initialization for UART1 // UART_UNINIT(1) @@ -44,16 +36,8 @@ // // GPIO alternate pin function is 8 (see "Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(2, GPIOD, GPIOC, 2, 12, 8) -// // buffers -// // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -// #if defined(__GNUC__) -// __attribute__((aligned (32))) -// #endif -// uint8_t Uart2_RxBuffer[UART2_RX_SIZE]; - // // initialization for UART2 -// UART_INIT(2, UART2_RX_SIZE) +// UART_INIT(2) // // un-initialization for UART2 // UART_UNINIT(2) @@ -70,16 +54,8 @@ // // GPIO alternate pin function is 8 (see "Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(3, GPIOD, GPIOC, 2, 12, 8) -// // buffers -// // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -// #if defined(__GNUC__) -// __attribute__((aligned (32))) -// #endif -// uint8_t Uart3_RxBuffer[UART3_RX_SIZE]; - // // initialization for UART3 -// UART_INIT(3, UART3_RX_SIZE) +// UART_INIT(3) // // un-initialization for UART3 // UART_UNINIT(3) @@ -96,16 +72,8 @@ // // GPIO alternate pin function is 8 (see "Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(4, GPIOD, GPIOC, 2, 12, 8) -// // buffers -// // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -// #if defined(__GNUC__) -// __attribute__((aligned (32))) -// #endif -// uint8_t Uart4_RxBuffer[UART4_RX_SIZE]; - // // initialization for UART4 -// UART_INIT(4, UART4_RX_SIZE) +// UART_INIT(4) // // un-initialization for UART4 // UART_UNINIT(4) @@ -123,16 +91,8 @@ // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(5, GPIOD, GPIOC, 2, 12, 8) -// buffers -// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart5_RxBuffer[UART5_RX_SIZE]; - // initialization for UART5 -UART_INIT(5, UART5_RX_SIZE) +UART_INIT(5) // un-initialization for UART5 UART_UNINIT(5) @@ -150,16 +110,8 @@ UART_UNINIT(5) // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(6, GPIOC, GPIOC, 6, 7, 8) -// buffers -// buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart6_RxBuffer[UART6_RX_SIZE]; - // initialization for UART6 -UART_INIT(6, UART6_RX_SIZE) +UART_INIT(6) // un-initialization for UART6 UART_UNINIT(6) @@ -176,18 +128,10 @@ UART_UNINIT(6) // // GPIO alternate pin function is 8 (see "Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(7, GPIOF, GPIOF, 7, 6, 8) -// // buffers -// // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -// #if defined(__GNUC__) -// __attribute__((aligned (32))) -// #endif -// uint8_t Uart6_RxBuffer[UART7_RX_SIZE]; +// // initialization for UART7 +// UART_INIT(7) -// // initialization for UART6 -// UART_INIT(7, UART7_RX_SIZE) - -// // un-initialization for UART6 +// // un-initialization for UART7 // UART_UNINIT(7) // /////////// @@ -202,16 +146,8 @@ UART_UNINIT(6) // // GPIO alternate pin function is 8 (see "Table 13. STM32F765xx, STM32F767xx, STM32F768Ax and STM32F769xx alternate // function mapping" in STM32F769I datasheet) UART_CONFIG_PINS(8, GPIOC, GPIOC, 6, 7, 8) -// // buffers -// // buffers that are R/W by DMA are recommended to be aligned with 32 bytes cache page size boundary -// // because of issues with cache coherency and DMA (this is particularly important with Cortex-M7 because of cache) -// #if defined(__GNUC__) -// __attribute__((aligned (32))) -// #endif -// uint8_t Uart8_RxBuffer[UART8_RX_SIZE]; - -// // initialization for UART6 -// UART_INIT(8, UART8_RX_SIZE) +// // initialization for UART8 +// UART_INIT(8) -// // un-initialization for UART6 +// // un-initialization for UART8 // UART_UNINIT(8) diff --git a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.h b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.h index 056012e519..5602811301 100644 --- a/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.h +++ b/targets/ChibiOS/ST_STM32F769I_DISCOVERY/target_system_io_ports_config.h @@ -10,10 +10,6 @@ // // enable UART1 // #define NF_SERIAL_COMM_STM32_UART_USE_UART1 TRUE -// // buffers size -// // rx buffer size: 256 bytes -// #define UART1_RX_SIZE 256 - // /////////// // // UART2 // // /////////// @@ -21,10 +17,6 @@ // // enable UART2 // #define NF_SERIAL_COMM_STM32_UART_USE_UART2 TRUE -// // buffers size -// // rx buffer size: 256 bytes -// #define UART2_RX_SIZE 256 - // /////////// // // UART3 // // /////////// @@ -32,10 +24,6 @@ // // enable UART5 // #define NF_SERIAL_COMM_STM32_UART_USE_UART3 TRUE -// // buffers size -// // rx buffer size: 256 bytes -// #define UART3_RX_SIZE 256 - // /////////// // // UART4 // // /////////// @@ -43,10 +31,6 @@ // // enable UART4 // #define NF_SERIAL_COMM_STM32_UART_USE_UART4 TRUE -// // buffers size -// // rx buffer size: 256 bytes -// #define UART4_RX_SIZE 256 - /////////// // UART5 // /////////// @@ -54,10 +38,6 @@ // enable UART5 #define NF_SERIAL_COMM_STM32_UART_USE_UART5 TRUE -// buffers size -// rx buffer size: 256 bytes -#define UART5_RX_SIZE 256 - /////////// // UART6 // /////////// @@ -65,10 +45,6 @@ // enable USART6 #define NF_SERIAL_COMM_STM32_UART_USE_USART6 TRUE -// buffers size -// rx buffer size: 256 bytes -#define UART6_RX_SIZE 256 - // /////////// // // UART7 // // /////////// @@ -76,17 +52,9 @@ // // enable UART7 // #define NF_SERIAL_COMM_STM32_UART_USE_UART7 TRUE -// // buffers size -// // rx buffer size: 256 bytes -// #define UART7_RX_SIZE 256 - // /////////// // // UART8 // // /////////// // // enable UART8 // #define NF_SERIAL_COMM_STM32_UART_USE_UART8 TRUE - -// // buffers size -// // rx buffer size: 256 bytes -// #define UART8_RX_SIZE 256 diff --git a/targets/ChibiOS/_common/targetHAL.c b/targets/ChibiOS/_common/targetHAL.c index 81e50d50b6..a8ba792025 100644 --- a/targets/ChibiOS/_common/targetHAL.c +++ b/targets/ChibiOS/_common/targetHAL.c @@ -33,3 +33,10 @@ __nfweak TARGET_IFU_CAPABLE(false); // STM32 default capabiliy is JTAG update // declared as "weak" to allow targets to provide hard implementation __nfweak GET_TARGET_CAPABILITIES(TargetCapabilities_JtagUpdate); + +// STM32 targets can change their MAC address +// Implemented as "weak" to allow it to be replaced with "hard" implementation at target level. +__nfweak bool Target_CanChangeMacAddress() +{ + return true; +} diff --git a/targets/ChibiOS/_nanoCLR/CLR_Startup_Thread.c b/targets/ChibiOS/_nanoCLR/CLR_Startup_Thread.c index 8914170cbb..b5356013d3 100644 --- a/targets/ChibiOS/_nanoCLR/CLR_Startup_Thread.c +++ b/targets/ChibiOS/_nanoCLR/CLR_Startup_Thread.c @@ -46,11 +46,6 @@ __attribute__((noreturn)) void CLRStartupThread(void const *argument) { CLR_SETTINGS *clrSettings = (CLR_SETTINGS *)argument; -#if (HAL_NF_USE_STM32_ONEWIRE == TRUE) - // startup 1-Wire driver - oneWireStart(); -#endif - // initialize nanoHAL nanoHAL_Initialize_C(); diff --git a/targets/ChibiOS/_nanoCLR/System.Device.Spi/cpu_spi.cpp b/targets/ChibiOS/_nanoCLR/System.Device.Spi/cpu_spi.cpp index 76c5dca019..c00fe07d70 100644 --- a/targets/ChibiOS/_nanoCLR/System.Device.Spi/cpu_spi.cpp +++ b/targets/ChibiOS/_nanoCLR/System.Device.Spi/cpu_spi.cpp @@ -752,19 +752,33 @@ void CPU_SPI_GetPins(uint32_t spi_bus, GPIO_PIN &clk, GPIO_PIN &miso, GPIO_PIN & } // Minimum and Maximum clock frequency available based on bus and configured pins -uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MinClockFrequency(uint32_t spiBus, int32_t *frequency) { + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } + // Max prescaler value = 256 // SPI2 or SPI3 are on APB1, so divide max frequency by four. - return (spi_bus == 2 or spi_bus == 3) ? SystemCoreClock >>= 9 : SystemCoreClock >> 8; + *frequency = (spiBus == 2 or spi_bus == 3) ? SystemCoreClock >>= 9 : SystemCoreClock >> 8; + + return S_OK; } -uint32_t CPU_SPI_MaxClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MaxClockFrequency(uint32_t spiBus, int32_t *frequency) { + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } + // According to STM : "At a minimum, the clock frequency should be twice the required communication frequency." // So maximum useable frequency is CoreClock / 2. // SPI2 or SPI3 are on APB1, so divide max frequency by four. - return (spi_bus == 2 or spi_bus == 3) ? SystemCoreClock >>= 2 : SystemCoreClock >> 1; + *frequency = (spiBus == 2 or spi_bus == 3) ? SystemCoreClock >>= 2 : SystemCoreClock >> 1; + + return S_OK; } // Maximum number of SPI devices that can be opened on a bus diff --git a/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp b/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp index 4fd6f15c2b..ef6aed9d18 100644 --- a/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp +++ b/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp @@ -282,6 +282,83 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_BytesToRead___ NANOCLR_NOCLEANUP(); } +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_InvertSignalLevels___BOOLEAN(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + +#if defined(USART_CR2_TXINV) && defined(USART_CR2_RXINV) + + NF_PAL_UART *palUart = NULL; + + // get a pointer to the managed object instance and check that it's not NULL + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); + + if (pThis[FIELD___disposed].NumericByRef().u1 != 0) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OBJECT_DISPOSED); + } + + // get the driver for this SerialDevice + palUart = GetUartPAL((int)pThis[FIELD___portIndex].NumericByRef().s4); + if (palUart == NULL) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); + } + + stack.SetResult_Boolean(palUart->SignalLevelsInverted); + +#else + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + +#endif + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::set_InvertSignalLevels___VOID__BOOLEAN( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + +#if defined(USART_CR2_TXINV) && defined(USART_CR2_RXINV) + + NF_PAL_UART *palUart = NULL; + + // get a pointer to the managed object instance and check that it's not NULL + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); + + if (pThis[FIELD___disposed].NumericByRef().u1 != 0) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OBJECT_DISPOSED); + } + + // get the driver for this SerialDevice + palUart = GetUartPAL((int)pThis[FIELD___portIndex].NumericByRef().s4); + if (palUart == NULL) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); + } + + palUart->SignalLevelsInverted = (bool)stack.Arg1().NumericByRef().u1; + + // call config + NativeConfig___VOID(stack); +#else + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + +#endif + + NANOCLR_NOCLEANUP(); +} + HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Read___I4__SZARRAY_U1__I4__I4(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -644,23 +721,23 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR data = dataBuffer->GetElement(offset); // push onto the eval stack how many bytes are being pushed to the UART - stack.PushValueI4(length - offset); + stack.PushValueI4(count); // flush DMA buffer to ensure cache coherency // (only required for Cortex-M7) - cacheBufferFlush(data, length - offset); + cacheBufferFlush(data, count); // store pointer palUart->TxBuffer = data; // set TX ongoing count - palUart->TxOngoingCount = length - offset; + palUart->TxOngoingCount = count; // because the UART can be accessed from several threads need to get exclusive access to it uartAcquireBus(palUart->UartDriver); // start sending data (DMA will read from the ring buffer) - uartStartSend(palUart->UartDriver, length - offset, (uint8_t *)data); + uartStartSend(palUart->UartDriver, count, (uint8_t *)data); // bump custom state stack.m_customState = 2; @@ -679,7 +756,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR { // event occurred // get from the eval stack how many bytes were buffered to Tx - length = stack.m_evalStack[1].NumericByRef().s4; + count = stack.m_evalStack[1].NumericByRef().s4; // done here break; @@ -690,13 +767,13 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR } } - // pop "length" heap block from stack + // pop "count" heap block from stack stack.PopValue(); // pop "hbTimeout" heap block from stack stack.PopValue(); - stack.SetResult_U4(length); + stack.SetResult_U4(count); // null pointers and vars pThis = NULL; @@ -778,6 +855,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( NANOCLR_HEADER(); NF_PAL_UART *palUart; + int32_t bufferSize; // get a pointer to the managed object instance and check that it's not NULL CLR_RT_HeapBlock *pThis = stack.This(); @@ -848,6 +926,19 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( break; } + // alloc buffer memory + bufferSize = pThis[FIELD___bufferSize].NumericByRef().s4; + palUart->RxBuffer = (uint8_t *)platform_malloc(bufferSize); + + // sanity check + if (palUart->RxBuffer == NULL) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OUT_OF_MEMORY); + } + + // init buffer + palUart->RxRingBuffer.Initialize(palUart->RxBuffer, bufferSize); + // configure UART handlers palUart->Uart_cfg.txend1_cb = TxEnd1; palUart->Uart_cfg.rxchar_cb = RxChar; @@ -907,6 +998,20 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeConfig___VOI break; } +#if defined(USART_CR2_TXINV) && defined(USART_CR2_RXINV) + + // configure TX, RX signal levels + if (palUart->SignalLevelsInverted) + { + palUart->Uart_cfg.cr2 |= USART_CR2_TXINV | USART_CR2_RXINV; + } + else + { + palUart->Uart_cfg.cr2 &= ~(USART_CR2_TXINV | USART_CR2_RXINV); + } + +#endif + // baud rate palUart->Uart_cfg.speed = (int)pThis[FIELD___baudRate].NumericByRef().s4; diff --git a/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h b/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h index d15a7e2b45..ee35a5e5c9 100644 --- a/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h +++ b/targets/ChibiOS/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h @@ -25,6 +25,9 @@ typedef struct uint8_t WatchChar; uint8_t NewLineChar; + + bool SignalLevelsInverted; + } NF_PAL_UART; //////////////////////////////////////////// @@ -78,26 +81,13 @@ void ConfigPins_UART6(); void ConfigPins_UART7(); void ConfigPins_UART8(); -///////////////////////////////////// -// UART Rx buffers // -// these live in the target folder // -///////////////////////////////////// -extern uint8_t Uart1_RxBuffer[]; -extern uint8_t Uart2_RxBuffer[]; -extern uint8_t Uart3_RxBuffer[]; -extern uint8_t Uart4_RxBuffer[]; -extern uint8_t Uart5_RxBuffer[]; -extern uint8_t Uart6_RxBuffer[]; -extern uint8_t Uart7_RxBuffer[]; -extern uint8_t Uart8_RxBuffer[]; - // the following macro defines a function that initializes an UART struct // it gets called in the Windows_Devices_SerialCommunication_SerialDevice::NativeInit function #if defined(STM32F7XX) || defined(STM32F0XX) // STM32F7 and STM32F0 use UART driver v2 -#define UART_INIT(num, rx_buffer_size) \ +#define UART_INIT(num) \ void Init_UART##num() \ { \ Uart##num##_PAL.Uart_cfg.txend2_cb = NULL; \ @@ -111,16 +101,16 @@ extern uint8_t Uart8_RxBuffer[]; Uart##num##_PAL.Uart_cfg.cr3 = 0; \ Uart##num##_PAL.TxBuffer = NULL; \ Uart##num##_PAL.TxOngoingCount = 0; \ - Uart##num##_PAL.RxBuffer = Uart##num##_RxBuffer; \ - Uart##num##_PAL.RxRingBuffer.Initialize(Uart##num##_PAL.RxBuffer, rx_buffer_size); \ + Uart##num##_PAL.RxBuffer = NULL; \ Uart##num##_PAL.WatchChar = 0; \ Uart##num##_PAL.NewLineChar = 0; \ + Uart##num##_PAL.SignalLevelsInverted = false; \ } #else // all other STM32F use UART driver v1 which has a different UARTConfig struct -#define UART_INIT(num, rx_buffer_size) \ +#define UART_INIT(num) \ void Init_UART##num() \ { \ Uart##num##_PAL.Uart_cfg.txend2_cb = NULL; \ @@ -132,10 +122,10 @@ extern uint8_t Uart8_RxBuffer[]; Uart##num##_PAL.Uart_cfg.cr3 = 0; \ Uart##num##_PAL.TxBuffer = NULL; \ Uart##num##_PAL.TxOngoingCount = 0; \ - Uart##num##_PAL.RxBuffer = Uart##num##_RxBuffer; \ - Uart##num##_PAL.RxRingBuffer.Initialize(Uart##num##_PAL.RxBuffer, rx_buffer_size); \ + Uart##num##_PAL.RxBuffer = NULL; \ Uart##num##_PAL.WatchChar = 0; \ Uart##num##_PAL.NewLineChar = 0; \ + Uart##num##_PAL.SignalLevelsInverted = false; \ } #endif @@ -156,9 +146,10 @@ void Init_UART8(); #define UART_UNINIT(num) \ void UnInit_UART##num() \ { \ + uartStop(&UARTD##num); \ + platform_free(Uart##num##_PAL.RxBuffer); \ Uart##num##_PAL.TxBuffer = NULL; \ Uart##num##_PAL.RxBuffer = NULL; \ - uartStop(&UARTD##num); \ Uart##num##_PAL.UartDriver = NULL; \ return; \ } diff --git a/targets/ChibiOS/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp b/targets/ChibiOS/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp index 1a1a43af18..371716a106 100644 --- a/targets/ChibiOS/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp +++ b/targets/ChibiOS/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp @@ -752,19 +752,33 @@ void CPU_SPI_GetPins(uint32_t spi_bus, GPIO_PIN &clk, GPIO_PIN &miso, GPIO_PIN & } // Minimum and Maximum clock frequency available based on bus and configured pins -uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MinClockFrequency(uint32_t spiBus, int32_t *frequency) { + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } + // Max prescaler value = 256 // SPI2 or SPI3 are on APB1, so divide max frequency by four. - return (spi_bus == 2 or spi_bus == 3) ? SystemCoreClock >>= 9 : SystemCoreClock >> 8; + *frequency = (spiBus == 2 or spiBus == 3) ? SystemCoreClock >>= 9 : SystemCoreClock >> 8; + + return S_OK; } -uint32_t CPU_SPI_MaxClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MaxClockFrequency(uint32_t spiBus, int32_t *frequency) { + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } + // According to STM : "At a minimum, the clock frequency should be twice the required communication frequency." // So maximum useable frequency is CoreClock / 2. // SPI2 or SPI3 are on APB1, so divide max frequency by four. - return (spi_bus == 2 or spi_bus == 3) ? SystemCoreClock >>= 2 : SystemCoreClock >> 1; + *frequency = (spiBus == 2 or spiBus == 3) ? SystemCoreClock >>= 2 : SystemCoreClock >> 1; + + return S_OK; } // Maximum number of SPI devices that can be opened on a bus diff --git a/targets/ChibiOS/_nanoCLR/mbedtls_entropy_hardware_pool.c b/targets/ChibiOS/_nanoCLR/mbedtls_entropy_hardware_pool.c index 97b96d0d41..0f5d71e26a 100644 --- a/targets/ChibiOS/_nanoCLR/mbedtls_entropy_hardware_pool.c +++ b/targets/ChibiOS/_nanoCLR/mbedtls_entropy_hardware_pool.c @@ -6,15 +6,17 @@ #include #include +int mbedtls_hardware_poll(void *data, unsigned char *output, size_t len, size_t *olen); + // Get len bytes of entropy from the hardware RNG. -int mbedtls_hardware_poll( void *data, unsigned char *output, size_t len, size_t *olen ) +int mbedtls_hardware_poll(void *data, unsigned char *output, size_t len, size_t *olen) { (void)data; // start random generator rngStart(); - for(size_t i = 0; i < len; i++) + for (size_t i = 0; i < len; i++) { // our generator returns 32bits numbers *output = rngGenerateRandomNumber(); diff --git a/targets/ChibiOS/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController.cpp b/targets/ChibiOS/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost.cpp similarity index 84% rename from targets/ChibiOS/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController.cpp rename to targets/ChibiOS/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost.cpp index 124838a0e5..14745133ae 100644 --- a/targets/ChibiOS/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController.cpp +++ b/targets/ChibiOS/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost.cpp @@ -3,7 +3,7 @@ // See LICENSE file in the project root for full license information. // -#include "nf_devices_onewire_native_target.h" +#include "nf_dev_onewire_target.h" // working thread to execute long running 1-Wire operations static thread_t *OneWireWorkingThread; @@ -40,8 +40,7 @@ static THD_FUNCTION(OneWireFindNextWorkingThread, arg) chThdExit(deviceFound); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchReset___BOOLEAN( - CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchReset___BOOLEAN(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -51,7 +50,7 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchBit___BOOLEAN__BOOLEAN( +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchBit___BOOLEAN__BOOLEAN( CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -63,8 +62,7 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchByte___U1__U1( - CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchByte___U1__U1(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -75,8 +73,7 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::WriteByte___U1__U1( - CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::WriteByte___U1__U1(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -87,8 +84,7 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::ReadByte___U1( - CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::ReadByte___U1(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -98,8 +94,8 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController:: - FindFirstDevice___BOOLEAN__BOOLEAN__BOOLEAN(CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::FindFirstDevice___BOOLEAN__BOOLEAN__BOOLEAN( + CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -147,7 +143,7 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC // non-blocking wait allowing other threads to run while we wait for the 1-Wire operations to complete NANOCLR_CHECK_HRESULT( - g_CLR_RT_ExecutionEngine.WaitEvents(stack.m_owningThread, *timeout, Event_OneWireMaster, eventResult)); + g_CLR_RT_ExecutionEngine.WaitEvents(stack.m_owningThread, *timeout, Event_OneWireHost, eventResult)); } if (eventResult) @@ -190,8 +186,8 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController:: - FindNextDevice___BOOLEAN__BOOLEAN__BOOLEAN(CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::FindNextDevice___BOOLEAN__BOOLEAN__BOOLEAN( + CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -239,7 +235,7 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC // non-blocking wait allowing other threads to run while we wait for the 1-Wire operations to complete NANOCLR_CHECK_HRESULT( - g_CLR_RT_ExecutionEngine.WaitEvents(stack.m_owningThread, *timeout, Event_OneWireMaster, eventResult)); + g_CLR_RT_ExecutionEngine.WaitEvents(stack.m_owningThread, *timeout, Event_OneWireHost, eventResult)); } if (eventResult) @@ -281,3 +277,26 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP(); } + +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::NativeDispose___VOID(CLR_RT_StackFrame &stack) +{ + (void)stack; + + NANOCLR_HEADER(); + + oneWireStop(); + + NANOCLR_NOCLEANUP_NOLABEL(); +} + +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::NativeInit___VOID(CLR_RT_StackFrame &stack) +{ + (void)stack; + + NANOCLR_HEADER(); + + // startup 1-Wire driver + oneWireStart(); + + NANOCLR_NOCLEANUP_NOLABEL(); +} diff --git a/targets/ChibiOS/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_target.h b/targets/ChibiOS/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_target.h new file mode 100644 index 0000000000..f2dd0c4c74 --- /dev/null +++ b/targets/ChibiOS/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_target.h @@ -0,0 +1,33 @@ +// +// Copyright (c) .NET Foundation and Contributors +// See LICENSE file in the project root for full license information. +// + +#ifndef _NF_DEV_ONEWIRE_TARGET_H_ +#define _NF_DEV_ONEWIRE_TARGET_H_ + +#include +#include +#include + +// struct with parameters for 1-Wire working thread +struct OneWireFindStruct +{ + bool DoReset; + bool AlarmOnly; +}; + +// the following macro defines a function that configures the GPIO pins for a STM32 UART/USART +// it gets called in the oneWire_lld_start function +// this is required because the UART/USART peripherals can use multiple GPIO configuration combinations +#define UART_CONFIG_PINS(num, gpio_port_tx, tx_pin, alternate_function) \ + void ConfigPins_UART##num() \ + { \ + palSetPadMode( \ + gpio_port_tx, \ + tx_pin, \ + PAL_MODE_ALTERNATE(alternate_function) | PAL_STM32_OTYPE_OPENDRAIN | PAL_MODE_INPUT_PULLUP | \ + PAL_STM32_OSPEED_HIGHEST | PAL_STM32_MODE_ALTERNATE); \ + } + +#endif // _NF_DEV_ONEWIRE_TARGET_H_ diff --git a/targets/ChibiOS/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_target.h b/targets/ChibiOS/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_target.h deleted file mode 100644 index b1cc4be48b..0000000000 --- a/targets/ChibiOS/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_target.h +++ /dev/null @@ -1,28 +0,0 @@ -// -// Copyright (c) .NET Foundation and Contributors -// See LICENSE file in the project root for full license information. -// - -#ifndef NF_DEVICES_ONEWIRE_NATIVE_TARGET_H -#define NF_DEVICES_ONEWIRE_NATIVE_TARGET_H - -#include -#include -#include - -// struct with parameters for 1-Wire working thread -struct OneWireFindStruct -{ - bool DoReset; - bool AlarmOnly; -}; - -// the following macro defines a function that configures the GPIO pins for a STM32 UART/USART -// it gets called in the oneWire_lld_start function -// this is required because the UART/USART peripherals can use multiple GPIO configuration combinations -#define UART_CONFIG_PINS(num, gpio_port_tx, tx_pin, alternate_function) void ConfigPins_UART##num() { \ - palSetPadMode(gpio_port_tx, tx_pin, PAL_MODE_ALTERNATE(alternate_function) | PAL_STM32_OTYPE_OPENDRAIN \ - | PAL_MODE_INPUT_PULLUP | PAL_STM32_OSPEED_HIGHEST | PAL_STM32_MODE_ALTERNATE); \ -} - -#endif // NF_DEVICES_ONEWIRE_NATIVE_TARGET_H diff --git a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.c b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.c index aaf7f23e66..54ee7fea2f 100644 --- a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.c +++ b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.c @@ -372,8 +372,8 @@ int flash_lld_erase(uint32_t address) __DSB(); #endif - // wait 500ms for any flash operation to be completed - success = FLASH_WaitForLastOperation(2000); + // wait 2000ms for any flash operation to be completed + success = FLASH_WaitForLastOperation(2000) == HAL_OK; // after erase operation completed disable the SER and SNB Bits CLEAR_BIT(FLASH->CR, (FLASH_CR_SER | FLASH_CR_SNB)); diff --git a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.h b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.h index f73ff330bf..6aeabd4981 100644 --- a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.h +++ b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv2/flash_lld.h @@ -53,6 +53,10 @@ typedef struct STM32FlashDriver #define FLASH_OPT_KEY2 ((uint32_t)0x4C5D6E7FU) #define SECTOR_MASK ((uint32_t)0xFFFFFF07) +#ifndef HAL_OK +#define HAL_OK 0x00U +#endif + // FLASH_Error_Code FLASH Error Code #define HAL_FLASH_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */ #define HAL_FLASH_ERROR_ERS ((uint32_t)0x00000002U) /*!< Programming Sequence error */ diff --git a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv4/flash_lld.c b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv4/flash_lld.c index a02732a9b9..40eda12489 100644 --- a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv4/flash_lld.c +++ b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/FLASHv4/flash_lld.c @@ -167,6 +167,12 @@ int flash_lld_write(uint32_t startAddress, uint32_t length, const uint8_t *buffe uint32_t remainingBytes = length; uint32_t error = FLASH_NO_ERROR; + // Disable data cache + __HAL_FLASH_DATA_CACHE_DISABLE(); + + // read (and clear) error flags + FLASH_CheckErrors(); + // Unlock the Flash to enable the flash control register access HAL_FLASH_Unlock(); @@ -177,7 +183,7 @@ int flash_lld_write(uint32_t startAddress, uint32_t length, const uint8_t *buffe { volatile uint32_t *address; - // unwritten bytes are initialized to flahs erase value + // unwritten bytes are initialized to flash erase value line.w[0] = 0xFFFFFFFFU; line.w[1] = 0xFFFFFFFFU; @@ -217,6 +223,9 @@ int flash_lld_write(uint32_t startAddress, uint32_t length, const uint8_t *buffe // Lock the Flash to disable the flash control register access HAL_FLASH_Lock(); + // enable back data cache + __HAL_FLASH_DATA_CACHE_ENABLE(); + // done here return (error == FLASH_NO_ERROR); } diff --git a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/ONEWIREv1/onewire_lld.c b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/ONEWIREv1/onewire_lld.c index 8cd99d95be..f78b9d0998 100644 --- a/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/ONEWIREv1/onewire_lld.c +++ b/targets/ChibiOS/_nf-overlay/os/hal/ports/STM32/LLD/ONEWIREv1/onewire_lld.c @@ -9,7 +9,7 @@ #if (HAL_NF_USE_STM32_ONEWIRE == TRUE) -#include +#include #include #if !defined(NF_ONEWIRE_STM32_UART_USE_USART1) && !defined(NF_ONEWIRE_STM32_UART_USE_USART2) && \ @@ -18,7 +18,7 @@ !defined(NF_ONEWIRE_STM32_UART_USE_USART7) && !defined(NF_ONEWIRE_STM32_UART_USE_USART8) #error \ - "1-Wire driver activated but no USART/UART peripheral assigned. Make sure to assign it @ target_nf_devices_onewire_config.h" + "1-Wire driver activated but no USART/UART peripheral assigned. Make sure to assign it @ target_nf_dev_onewire_config.h" #endif /*===========================================================================*/ diff --git a/targets/ESP32/CMakeLists.txt b/targets/ESP32/CMakeLists.txt index eb1d4a45b3..91cabad6ee 100644 --- a/targets/ESP32/CMakeLists.txt +++ b/targets/ESP32/CMakeLists.txt @@ -23,7 +23,7 @@ if(ESP32_IDF_PATH) endif() # WHEN CHANGING THIS MAKE SURE TO UPDATE THE DEV CONTAINERS -set(ESP32_IDF_TAG "4.3.2" CACHE INTERNAL "ESP32 IDF tag") +set(ESP32_IDF_TAG "4.4" CACHE INTERNAL "ESP32 IDF tag") if(NO_ESP32_IDF_PATH) # no ESP32 IDF source specified, download it from official repo @@ -83,61 +83,12 @@ endif() # target folder was added in main CMakeList -# if mbed TLS is enabled add it to the build -if(NF_SECURITY_MBEDTLS) - - # check if MBEDTLS_SOURCE was specified or if it's empty (default is empty) - set(NO_MBEDTLS_SOURCE TRUE) - - if(MBEDTLS_SOURCE) - if(NOT ${MBEDTLS_SOURCE} STREQUAL "") - set(NO_MBEDTLS_SOURCE FALSE) - endif() - endif() - - # set tag for currently supported version - # WHEN CHANGING THIS MAKE SURE TO UPDATE THE DEV CONTAINERS - set(MBEDTLS_GIT_TAG "mbedtls-2.28.0") - - # set options for mbed TLS - option(ENABLE_TESTING "no testing when building mbed TLS." OFF) - - if(NO_MBEDTLS_SOURCE) - # no mbed TLS source specified, download it from it's repo - message(STATUS "mbedTLS ${MBEDTLS_GIT_TAG} from GitHub repo") - - FetchContent_Declare( - mbedtls - GIT_REPOSITORY https://github.com/ARMmbed/mbedtls - GIT_TAG ${MBEDTLS_GIT_TAG} - ) - - else() - # mbedTLS source was specified - - message(STATUS "mbedTLS ${MBEDTLS_GIT_TAG} (source from: ${MBEDTLS_SOURCE})") - - FetchContent_Declare( - mbedtls - SOURCE_DIR ${MBEDTLS_SOURCE} - ) - - endif() - - FetchContent_GetProperties(mbedtls) - if(NOT mbedtls_POPULATED) - # Fetch the content using previously declared details - FetchContent_Populate(mbedtls) - endif() - - set(mbedTLS_INCLUDE_DIRS ${CMAKE_SOURCE_DIR}/3rdparty/humblelogging/include) - set(mbedTLS_LIBRARIES ${CMAKE_SHARED_LIBRARY_PREFIX}mbedTLS${CMAKE_SHARED_LIBRARY_SUFFIX}) - -endif() +# force this to ON +set(NF_SECURITY_MBEDTLS ON CACHE INTERNAL "mbedTLS must be ON for IDF build") # add platform dirs add_subdirectory(_common) -add_subdirectory(_Include) +add_subdirectory(_include) add_subdirectory(_nanoCLR) if(USE_NETWORKING_OPTION) diff --git a/targets/ESP32/ESP32/cmake-variants.json b/targets/ESP32/ESP32/cmake-variants.json index 8831ac70ca..10849f6edc 100644 --- a/targets/ESP32/ESP32/cmake-variants.json +++ b/targets/ESP32/ESP32/cmake-variants.json @@ -35,6 +35,7 @@ "ESP32_IDF_PATH": "", "RTOS": "ESP32", "NF_BUILD_RTM": "OFF", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", "NF_FEATURE_SUPPORT_REFLECTION": "ON", @@ -64,7 +65,7 @@ "API_System.Device.Spi": "ON", "API_Hardware.Esp32": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" } @@ -82,6 +83,7 @@ "ESP32_IDF_PATH": "", "RTOS": "ESP32", "NF_BUILD_RTM": "OFF", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", "NF_FEATURE_SUPPORT_REFLECTION": "ON", @@ -111,7 +113,7 @@ "API_System.Device.Spi": "ON", "API_Hardware.Esp32": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" } @@ -130,6 +132,7 @@ "ESP32_IDF_PATH": "", "RTOS": "ESP32", "NF_BUILD_RTM": "OFF", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", "NF_FEATURE_SUPPORT_REFLECTION": "ON", @@ -159,7 +162,7 @@ "API_System.Device.Spi": "ON", "API_Hardware.Esp32": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "ON" } @@ -179,6 +182,7 @@ "RTOS": "ESP32", "TARGET_SERIAL_BAUDRATE": "115200", "NF_BUILD_RTM": "OFF", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", "NF_FEATURE_SUPPORT_REFLECTION": "ON", @@ -208,7 +212,7 @@ "API_System.Device.Spi": "ON", "API_Hardware.Esp32": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" } @@ -224,6 +228,7 @@ "SDK_CONFIG_FILE": "", "ESP32_IDF_PATH": "", "RTOS": "ESP32", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_BUILD_RTM": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", @@ -275,6 +280,7 @@ "ESP32_IDF_PATH": "E:/GitHub/esp-idf", "RTOS": "ESP32", "NF_BUILD_RTM": "OFF", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", "NF_FEATURE_SUPPORT_REFLECTION": "ON", @@ -325,6 +331,7 @@ "ESP32_IDF_PATH": "E:/GitHub/esp-idf", "RTOS": "ESP32", "NF_BUILD_RTM": "OFF", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", "NF_FEATURE_SUPPORT_REFLECTION": "ON", @@ -377,6 +384,7 @@ "ESP32_IDF_PATH": "", "RTOS": "ESP32", "NF_BUILD_RTM": "OFF", + "NF_TARGET_HAS_NANOBOOTER": "OFF", "NF_FEATURE_DEBUGGER": "ON", "NF_FEATURE_RTC": "ON", "NF_FEATURE_SUPPORT_REFLECTION": "ON", @@ -408,7 +416,7 @@ "API_System.Device.Spi": "ON", "API_Hardware.Esp32": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", - "API_nanoFramework.Devices.OneWire": "ON", + "API_nanoFramework.Device.OneWire": "ON", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" } diff --git a/targets/ESP32/ESP32/mbedtls_config.h b/targets/ESP32/ESP32/mbedtls_config.h deleted file mode 100644 index 2bd4ca9507..0000000000 --- a/targets/ESP32/ESP32/mbedtls_config.h +++ /dev/null @@ -1,56 +0,0 @@ -// -// Copyright (c) .NET Foundation and Contributors -// Portions Copyright (c) 2006-2015, ARM Limited, All Rights Reserved -// See LICENSE file in the project root for full license information. -// - -#ifndef MBEDTLS_CONFIG_H -#define MBEDTLS_CONFIG_H - -/* For test certificates */ -// #define MBEDTLS_CERTS_C -// #define MBEDTLS_PEM_PARSE_C - -// #define SSL_DEBUG_BUF MBEDTLS_SSL_DEBUG_BUF -// #define SSL_DEBUG_CRT MBEDTLS_SSL_DEBUG_CRT -// #define SSL_DEBUG_ECP MBEDTLS_SSL_DEBUG_ECP -// #define SSL_DEBUG_MPI MBEDTLS_SSL_DEBUG_MPI -// #define SSL_DEBUG_MSG MBEDTLS_SSL_DEBUG_MSG -// #define SSL_DEBUG_RET MBEDTLS_SSL_DEBUG_RET - -// #define MBEDTLS_SSL_ALL_ALERT_MESSAGES -// #define MBEDTLS_SSL_DEBUG_ALL -// #define MBEDTLS_VERSION_FEATURES -// #define MBEDTLS_CERTS_C -// #define MBEDTLS_ERROR_C -// #define MBEDTLS_VERSION_C - -// uncomment the defines below to enable static memory allocation feature -#if 0 -#define MBEDTLS_MEMORY_BUFFER_ALLOC_C -#define MBEDTLS_PLATFORM_MEMORY -#endif - -#ifdef USE_LCD -#include "lcd_log.h" -#define MBEDTLS_PLATFORM_PRINTF_MACRO LCD_UsrLog -#endif - -// uncomment the defines bellow to generate debug output -// set below the threshold level for debug messages -// check mbed TLS mbedtls/debug.h header for details. -// Debug levels: -// 0 No debug -// 1 Error -// 2 State change -// 3 Informational -// 4 Verbose - -// #define MBEDTLS_DEBUG_C -// #define MBEDTLS_SSL_ALL_ALERT_MESSAGES -#define MBEDTLS_DEBUG_THRESHOLD 2 - -#define MBEDTLS_SSL_IN_CONTENT_LEN 16384 -#define MBEDTLS_SSL_OUT_CONTENT_LEN 4096 - -#endif // MBEDTLS_CONFIG_H diff --git a/targets/ESP32/ESP32/target_nf_devices_onewire_config.cpp b/targets/ESP32/ESP32/target_nf_dev_onewire_config.cpp similarity index 100% rename from targets/ESP32/ESP32/target_nf_devices_onewire_config.cpp rename to targets/ESP32/ESP32/target_nf_dev_onewire_config.cpp diff --git a/targets/ESP32/ESP32_S2/target_nf_devices_onewire_config.h b/targets/ESP32/ESP32/target_nf_dev_onewire_config.h similarity index 54% rename from targets/ESP32/ESP32_S2/target_nf_devices_onewire_config.h rename to targets/ESP32/ESP32/target_nf_dev_onewire_config.h index 167ba490d6..40aa9cdb57 100644 --- a/targets/ESP32/ESP32_S2/target_nf_devices_onewire_config.h +++ b/targets/ESP32/ESP32/target_nf_dev_onewire_config.h @@ -3,8 +3,7 @@ // See LICENSE file in the project root for full license information. // +#include + // use UART 2 for the 1-wire interface #define NF_ONEWIRE_ESP32_UART_NUM UART_NUM_2 -// use GPIO port 16 for RX and 17 for TX -#define NF_ONEWIRE_ESP32_UART_RX_PIN UART_NUM_2_RXD_DIRECT_GPIO_NUM -#define NF_ONEWIRE_ESP32_UART_TX_PIN UART_NUM_2_TXD_DIRECT_GPIO_NUM diff --git a/targets/ESP32/ESP32_S2/cmake-variants.json b/targets/ESP32/ESP32_S2/cmake-variants.json index 7aa78cfa57..bc364c7616 100644 --- a/targets/ESP32/ESP32_S2/cmake-variants.json +++ b/targets/ESP32/ESP32_S2/cmake-variants.json @@ -68,7 +68,7 @@ "API_System.Device.Spi": "ON", "API_Hardware.Esp32": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", - "API_nanoFramework.Devices.OneWire": "OFF", + "API_nanoFramework.Device.OneWire": "OFF", "API_nanoFramework.Graphics": "OFF", "API_nanoFramework.Device.Bluetooth": "OFF" } @@ -115,7 +115,7 @@ "API_Hardware.Esp32": "ON", "API_nanoFramework.Hardware.Esp32.Rmt": "ON", "API_nanoFramework.Device.Bluetooth": "OFF", - "API_nanoFramework.Devices.OneWire": "OFF", + "API_nanoFramework.Device.OneWire": "OFF", "API_nanoFramework.Graphics": "ON", "GRAPHICS_DISPLAY": "ILI9341_240x320_SPI.cpp", "TOUCHPANEL_DEVICE": "XPT2046.cpp", diff --git a/targets/ESP32/ESP32_S2/mbedtls_config.h b/targets/ESP32/ESP32_S2/mbedtls_config.h deleted file mode 100644 index 2bd4ca9507..0000000000 --- a/targets/ESP32/ESP32_S2/mbedtls_config.h +++ /dev/null @@ -1,56 +0,0 @@ -// -// Copyright (c) .NET Foundation and Contributors -// Portions Copyright (c) 2006-2015, ARM Limited, All Rights Reserved -// See LICENSE file in the project root for full license information. -// - -#ifndef MBEDTLS_CONFIG_H -#define MBEDTLS_CONFIG_H - -/* For test certificates */ -// #define MBEDTLS_CERTS_C -// #define MBEDTLS_PEM_PARSE_C - -// #define SSL_DEBUG_BUF MBEDTLS_SSL_DEBUG_BUF -// #define SSL_DEBUG_CRT MBEDTLS_SSL_DEBUG_CRT -// #define SSL_DEBUG_ECP MBEDTLS_SSL_DEBUG_ECP -// #define SSL_DEBUG_MPI MBEDTLS_SSL_DEBUG_MPI -// #define SSL_DEBUG_MSG MBEDTLS_SSL_DEBUG_MSG -// #define SSL_DEBUG_RET MBEDTLS_SSL_DEBUG_RET - -// #define MBEDTLS_SSL_ALL_ALERT_MESSAGES -// #define MBEDTLS_SSL_DEBUG_ALL -// #define MBEDTLS_VERSION_FEATURES -// #define MBEDTLS_CERTS_C -// #define MBEDTLS_ERROR_C -// #define MBEDTLS_VERSION_C - -// uncomment the defines below to enable static memory allocation feature -#if 0 -#define MBEDTLS_MEMORY_BUFFER_ALLOC_C -#define MBEDTLS_PLATFORM_MEMORY -#endif - -#ifdef USE_LCD -#include "lcd_log.h" -#define MBEDTLS_PLATFORM_PRINTF_MACRO LCD_UsrLog -#endif - -// uncomment the defines bellow to generate debug output -// set below the threshold level for debug messages -// check mbed TLS mbedtls/debug.h header for details. -// Debug levels: -// 0 No debug -// 1 Error -// 2 State change -// 3 Informational -// 4 Verbose - -// #define MBEDTLS_DEBUG_C -// #define MBEDTLS_SSL_ALL_ALERT_MESSAGES -#define MBEDTLS_DEBUG_THRESHOLD 2 - -#define MBEDTLS_SSL_IN_CONTENT_LEN 16384 -#define MBEDTLS_SSL_OUT_CONTENT_LEN 4096 - -#endif // MBEDTLS_CONFIG_H diff --git a/targets/ESP32/ESP32_S2/target_nf_devices_onewire_config.cpp b/targets/ESP32/ESP32_S2/target_nf_dev_onewire_config.cpp similarity index 100% rename from targets/ESP32/ESP32_S2/target_nf_devices_onewire_config.cpp rename to targets/ESP32/ESP32_S2/target_nf_dev_onewire_config.cpp diff --git a/targets/ESP32/ESP32/target_nf_devices_onewire_config.h b/targets/ESP32/ESP32_S2/target_nf_dev_onewire_config.h similarity index 100% rename from targets/ESP32/ESP32/target_nf_devices_onewire_config.h rename to targets/ESP32/ESP32_S2/target_nf_dev_onewire_config.h diff --git a/targets/ESP32/_IDF/esp32/partitions_nanoclr_16mb.csv b/targets/ESP32/_IDF/esp32/partitions_nanoclr_16mb.csv index 12f1410657..f633548c1e 100644 --- a/targets/ESP32/_IDF/esp32/partitions_nanoclr_16mb.csv +++ b/targets/ESP32/_IDF/esp32/partitions_nanoclr_16mb.csv @@ -1,12 +1,13 @@ -# Name, Type, SubType, Offset, Size -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild +################################################ +# ESP-IDF Partition Table for .NET nanoFramework +# Name, Type, SubType, Offset, Size, ############################################################################################################################### # if you change the partitions here, make sure to update the BlockRegions array in the device BlockStorage configuration file # ############################################################################################################################### nvs, data, nvs, 0x9000, 0x6000, phy_init, data, phy, 0xf000, 0x1000, # Factory area for NanoCLR - 1664k -factory, 0, 0, 0x10000, 0x1A0000, +factory, app, factory, 0x10000, 0x1A0000, # Deployment area for Managed code 2944k, Mapping issues with deployment areas over 3.5Mb, see issue #691 deploy, data, 0x84, 0x1B0000, 0x2E0000, # Config data for Network, Wireless, certificates, user data 3MB diff --git a/targets/ESP32/_IDF/esp32/partitions_nanoclr_2mb.csv b/targets/ESP32/_IDF/esp32/partitions_nanoclr_2mb.csv index 6bda9ef062..480606f511 100644 --- a/targets/ESP32/_IDF/esp32/partitions_nanoclr_2mb.csv +++ b/targets/ESP32/_IDF/esp32/partitions_nanoclr_2mb.csv @@ -1,12 +1,13 @@ -# Name, Type, SubType, Offset, Size -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild +################################################ +# ESP-IDF Partition Table for .NET nanoFramework +# Name, Type, SubType, Offset, Size, ############################################################################################################################### # if you change the partitions here, make sure to update the BlockRegions array in the device BlockStorage configuration file # ############################################################################################################################### nvs, data, nvs, 0x9000, 0x6000, phy_init, data, phy, 0xf000, 0x1000, # Factory area for NanoCLR - 1664k -factory, 0, 0, 0x10000, 0x1A0000, +factory, app, factory, 0x10000, 0x1A0000, # Deployment area for Managed code 2240k deploy, data, 0x84, 0x1B0000, 0x40000, # Config data for Network, Wireless, certificates, user data 64k diff --git a/targets/ESP32/_IDF/esp32/partitions_nanoclr_4mb.csv b/targets/ESP32/_IDF/esp32/partitions_nanoclr_4mb.csv index 510c179a66..3e58204a79 100644 --- a/targets/ESP32/_IDF/esp32/partitions_nanoclr_4mb.csv +++ b/targets/ESP32/_IDF/esp32/partitions_nanoclr_4mb.csv @@ -1,12 +1,13 @@ -# Name, Type, SubType, Offset, Size -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild +################################################ +# ESP-IDF Partition Table for .NET nanoFramework +# Name, Type, SubType, Offset, Size, ############################################################################################################################### # if you change the partitions here, make sure to update the BlockRegions array in the device BlockStorage configuration file # ############################################################################################################################### nvs, data, nvs, 0x9000, 0x6000, phy_init, data, phy, 0xf000, 0x1000, -# Factory area for NanoCLR - 1664k -factory, 0, 0, 0x10000, 0x1A0000, +# Factory area for nanoCLR - 1664k +factory, app, factory, 0x10000, 0x1A0000, # Deployment area for Managed code 1984k deploy, data, 0x84, 0x1B0000, 0x1F0000, # Config data for Network, Wireless, certificates, user data 256k diff --git a/targets/ESP32/_IDF/esp32/partitions_nanoclr_8mb.csv b/targets/ESP32/_IDF/esp32/partitions_nanoclr_8mb.csv index eb0a7d2189..6c1fffde8d 100644 --- a/targets/ESP32/_IDF/esp32/partitions_nanoclr_8mb.csv +++ b/targets/ESP32/_IDF/esp32/partitions_nanoclr_8mb.csv @@ -1,12 +1,13 @@ -# Name, Type, SubType, Offset, Size -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild +################################################ +# ESP-IDF Partition Table for .NET nanoFramework +# Name, Type, SubType, Offset, Size, ############################################################################################################################### # if you change the partitions here, make sure to update the BlockRegions array in the device BlockStorage configuration file # ############################################################################################################################### nvs, data, nvs, 0x9000, 0x6000, phy_init, data, phy, 0xf000, 0x1000, # Factory area for NanoCLR - 1664k -factory, 0, 0, 0x10000, 0x1A0000, +factory, app, factory, 0x10000, 0x1A0000, # Deployment area for Managed code 2944k, Mapping issues with deployment areas over 3.5Mb, see issue #691 deploy, data, 0x84, 0x1B0000, 0x2E0000, # Config data for Network, Wireless, certificates, user data 2Mb diff --git a/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_16mb.csv b/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_16mb.csv index 12f1410657..f633548c1e 100644 --- a/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_16mb.csv +++ b/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_16mb.csv @@ -1,12 +1,13 @@ -# Name, Type, SubType, Offset, Size -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild +################################################ +# ESP-IDF Partition Table for .NET nanoFramework +# Name, Type, SubType, Offset, Size, ############################################################################################################################### # if you change the partitions here, make sure to update the BlockRegions array in the device BlockStorage configuration file # ############################################################################################################################### nvs, data, nvs, 0x9000, 0x6000, phy_init, data, phy, 0xf000, 0x1000, # Factory area for NanoCLR - 1664k -factory, 0, 0, 0x10000, 0x1A0000, +factory, app, factory, 0x10000, 0x1A0000, # Deployment area for Managed code 2944k, Mapping issues with deployment areas over 3.5Mb, see issue #691 deploy, data, 0x84, 0x1B0000, 0x2E0000, # Config data for Network, Wireless, certificates, user data 3MB diff --git a/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_4mb.csv b/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_4mb.csv index 510c179a66..80a38190b2 100644 --- a/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_4mb.csv +++ b/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_4mb.csv @@ -1,12 +1,13 @@ -# Name, Type, SubType, Offset, Size -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild +################################################ +# ESP-IDF Partition Table for .NET nanoFramework +# Name, Type, SubType, Offset, Size, ############################################################################################################################### # if you change the partitions here, make sure to update the BlockRegions array in the device BlockStorage configuration file # ############################################################################################################################### nvs, data, nvs, 0x9000, 0x6000, phy_init, data, phy, 0xf000, 0x1000, # Factory area for NanoCLR - 1664k -factory, 0, 0, 0x10000, 0x1A0000, +factory, app, factory, 0x10000, 0x1A0000, # Deployment area for Managed code 1984k deploy, data, 0x84, 0x1B0000, 0x1F0000, # Config data for Network, Wireless, certificates, user data 256k diff --git a/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_8mb.csv b/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_8mb.csv index eb0a7d2189..6c1fffde8d 100644 --- a/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_8mb.csv +++ b/targets/ESP32/_IDF/esp32s2/partitions_nanoclr_8mb.csv @@ -1,12 +1,13 @@ -# Name, Type, SubType, Offset, Size -# Note: if you change the phy_init or app partition offset, make sure to change the offset in Kconfig.projbuild +################################################ +# ESP-IDF Partition Table for .NET nanoFramework +# Name, Type, SubType, Offset, Size, ############################################################################################################################### # if you change the partitions here, make sure to update the BlockRegions array in the device BlockStorage configuration file # ############################################################################################################################### nvs, data, nvs, 0x9000, 0x6000, phy_init, data, phy, 0xf000, 0x1000, # Factory area for NanoCLR - 1664k -factory, 0, 0, 0x10000, 0x1A0000, +factory, app, factory, 0x10000, 0x1A0000, # Deployment area for Managed code 2944k, Mapping issues with deployment areas over 3.5Mb, see issue #691 deploy, data, 0x84, 0x1B0000, 0x2E0000, # Config data for Network, Wireless, certificates, user data 2Mb diff --git a/targets/ESP32/_IDF/mbedtls_implementations.c b/targets/ESP32/_IDF/mbedtls_implementations.c new file mode 100644 index 0000000000..8e1fdf5a92 --- /dev/null +++ b/targets/ESP32/_IDF/mbedtls_implementations.c @@ -0,0 +1,109 @@ +// // +// // Copyright (c) .NET Foundation and Contributors +// // See LICENSE file in the project root for full license information. +// // + +// #include +// #include +// #include +// #include + +// // the following code is copied from IDF implementation + +// #define MPI_VALIDATE_RET(cond) MBEDTLS_INTERNAL_VALIDATE_RET(cond, MBEDTLS_ERR_MPI_BAD_INPUT_DATA) + +// #define ciL (sizeof(mbedtls_mpi_uint)) /* chars in limb */ +// #define biL (ciL << 3) /* bits in limb */ +// #define biH (ciL << 2) /* half limb size */ + +// static void mpi_mul_hlp(size_t i, const mbedtls_mpi_uint *s, mbedtls_mpi_uint *d, mbedtls_mpi_uint b) +// { +// mbedtls_mpi_uint c = 0, t = 0; + +// #if defined(MULADDC_HUIT) +// for (; i >= 8; i -= 8) +// { +// MULADDC_INIT +// MULADDC_HUIT +// MULADDC_STOP +// } + +// for (; i > 0; i--) +// { +// MULADDC_INIT +// MULADDC_CORE +// MULADDC_STOP +// } +// #else /* MULADDC_HUIT */ +// for (; i >= 16; i -= 16) +// { +// MULADDC_INIT +// MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE + +// MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE +// MULADDC_STOP +// } + +// for (; i >= 8; i -= 8) +// { +// MULADDC_INIT +// MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE + +// MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_CORE MULADDC_STOP +// } + +// for (; i > 0; i--) +// { +// MULADDC_INIT +// MULADDC_CORE +// MULADDC_STOP +// } +// #endif /* MULADDC_HUIT */ + +// t++; + +// while (c != 0) +// { +// *d += c; +// c = (*d < c); +// d++; +// } +// } + +// /* +// * Baseline multiplication: X = A * b +// */ +// int mbedtls_mpi_mul_int(mbedtls_mpi *X, const mbedtls_mpi *A, mbedtls_mpi_uint b) +// { +// MPI_VALIDATE_RET(X != NULL); +// MPI_VALIDATE_RET(A != NULL); + +// /* mpi_mul_hlp can't deal with a leading 0. */ +// size_t n = A->n; +// while (n > 0 && A->p[n - 1] == 0) +// --n; + +// /* The general method below doesn't work if n==0 or b==0. By chance +// * calculating the result is trivial in those cases. */ +// if (b == 0 || n == 0) +// { +// return (mbedtls_mpi_lset(X, 0)); +// } + +// /* Calculate A*b as A + A*(b-1) to take advantage of mpi_mul_hlp */ +// int ret = MBEDTLS_ERR_ERROR_CORRUPTION_DETECTED; +// /* In general, A * b requires 1 limb more than b. If +// * A->p[n - 1] * b / b == A->p[n - 1], then A * b fits in the same +// * number of limbs as A and the call to grow() is not required since +// * copy() will take care of the growth if needed. However, experimentally, +// * making the call to grow() unconditional causes slightly fewer +// * calls to calloc() in ECP code, presumably because it reuses the +// * same mpi for a while and this way the mpi is more likely to directly +// * grow to its final size. */ +// MBEDTLS_MPI_CHK(mbedtls_mpi_grow(X, n + 1)); +// MBEDTLS_MPI_CHK(mbedtls_mpi_copy(X, A)); +// mpi_mul_hlp(n, A->p, X->p, b - 1); + +// cleanup: +// return (ret); +// } diff --git a/targets/ESP32/_IDF/sdkconfig.debug_nopsram_ble.esp32 b/targets/ESP32/_IDF/sdkconfig.debug_nopsram_ble.esp32 new file mode 100644 index 0000000000..83b3299757 --- /dev/null +++ b/targets/ESP32/_IDF/sdkconfig.debug_nopsram_ble.esp32 @@ -0,0 +1,1468 @@ +# +# Automatically generated file. DO NOT EDIT. +# Espressif IoT Development Framework (ESP-IDF) Project Configuration +# +CONFIG_IDF_CMAKE=y +CONFIG_IDF_TARGET_ARCH_XTENSA=y +CONFIG_IDF_TARGET="esp32" +CONFIG_IDF_TARGET_ESP32=y +CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 + +# +# SDK tool configuration +# +CONFIG_SDK_TOOLPREFIX="xtensa-esp32-elf-" +# CONFIG_SDK_TOOLCHAIN_SUPPORTS_TIME_WIDE_64_BITS is not set +# end of SDK tool configuration + +# +# Build type +# +CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y +# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set +CONFIG_APP_BUILD_GENERATE_BINARIES=y +CONFIG_APP_BUILD_BOOTLOADER=y +CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y +# end of Build type + +# +# Application manager +# +CONFIG_APP_COMPILE_TIME_DATE=y +# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set +# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set +# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set +CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 +# end of Application manager + +# +# Bootloader config +# +CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set +CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y +# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set +# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set +CONFIG_BOOTLOADER_LOG_LEVEL=3 +# CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set +CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y +# CONFIG_BOOTLOADER_FACTORY_RESET is not set +# CONFIG_BOOTLOADER_APP_TEST is not set +CONFIG_BOOTLOADER_WDT_ENABLE=y +# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set +CONFIG_BOOTLOADER_WDT_TIME_MS=9000 +# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set +CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 +# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set +# end of Bootloader config + +# +# Security features +# +# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set +# CONFIG_SECURE_BOOT is not set +# CONFIG_SECURE_FLASH_ENC_ENABLED is not set +# end of Security features + +# +# Serial flasher config +# +CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200 +# CONFIG_ESPTOOLPY_NO_STUB is not set +# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set +# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set +CONFIG_ESPTOOLPY_FLASHMODE_DIO=y +# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set +CONFIG_ESPTOOLPY_FLASHMODE="dio" +# CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set +CONFIG_ESPTOOLPY_FLASHFREQ_40M=y +# CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set +# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set +CONFIG_ESPTOOLPY_FLASHFREQ="40m" +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE="4MB" +CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y +CONFIG_ESPTOOLPY_BEFORE_RESET=y +# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set +CONFIG_ESPTOOLPY_BEFORE="default_reset" +CONFIG_ESPTOOLPY_AFTER_RESET=y +# CONFIG_ESPTOOLPY_AFTER_NORESET is not set +CONFIG_ESPTOOLPY_AFTER="hard_reset" +# CONFIG_ESPTOOLPY_MONITOR_BAUD_CONSOLE is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_9600B is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_57600B is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_230400B is not set +CONFIG_ESPTOOLPY_MONITOR_BAUD_921600B=y +# CONFIG_ESPTOOLPY_MONITOR_BAUD_2MB is not set +# CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER is not set +CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200 +CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 +# end of Serial flasher config + +# +# Partition Table +# +CONFIG_PARTITION_TABLE_SINGLE_APP=y +# CONFIG_PARTITION_TABLE_TWO_OTA is not set +# CONFIG_PARTITION_TABLE_CUSTOM is not set +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" +CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_OFFSET=0x8000 +CONFIG_PARTITION_TABLE_MD5=y +# end of Partition Table + +# +# Compiler options +# +CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y +# CONFIG_COMPILER_OPTIMIZATION_SIZE=y +# CONFIG_COMPILER_OPTIMIZATION_PERF is not set +# CONFIG_COMPILER_OPTIMIZATION_NONE is not set +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE is not set +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE=y +# CONFIG_COMPILER_CXX_EXCEPTIONS is not set +# CONFIG_COMPILER_CXX_RTTI is not set +CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y +# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set +# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set +# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set +# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set +# CONFIG_COMPILER_DISABLE_GCC8_WARNINGS is not set +# CONFIG_COMPILER_DUMP_RTL_FILES is not set +# end of Compiler options + +# +# Component config +# + +# +# Application Level Tracing +# +# CONFIG_APPTRACE_DEST_TRAX is not set +CONFIG_APPTRACE_DEST_NONE=y +CONFIG_APPTRACE_LOCK_ENABLE=y +# end of Application Level Tracing + +# +# ESP-ASIO +# +# CONFIG_ASIO_SSL_SUPPORT is not set +# end of ESP-ASIO + +# +# Bluetooth +# +CONFIG_BT_ENABLED=y +CONFIG_BT_CTRL_ESP32=y + +# +# Bluetooth controller(ESP32 Dual Mode Bluetooth) +# +CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y +# CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY is not set +# CONFIG_BTDM_CTRL_MODE_BTDM is not set +CONFIG_BTDM_CTRL_BLE_MAX_CONN=3 +CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF=0 +CONFIG_BTDM_CTRL_PCM_ROLE_EFF=0 +CONFIG_BTDM_CTRL_PCM_POLAR_EFF=0 +CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF=3 +CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF=0 +CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF=0 +CONFIG_BTDM_CTRL_PINNED_TO_CORE_0=y +# CONFIG_BTDM_CTRL_PINNED_TO_CORE_1 is not set +CONFIG_BTDM_CTRL_PINNED_TO_CORE=0 +CONFIG_BTDM_CTRL_HCI_MODE_VHCI=y +# CONFIG_BTDM_CTRL_HCI_MODE_UART_H4 is not set + +# +# MODEM SLEEP Options +# +CONFIG_BTDM_CTRL_MODEM_SLEEP=y +CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG=y +# CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED is not set +CONFIG_BTDM_CTRL_LPCLK_SEL_MAIN_XTAL=y +# end of MODEM SLEEP Options + +CONFIG_BTDM_BLE_DEFAULT_SCA_250PPM=y +CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF=1 +CONFIG_BTDM_BLE_SCAN_DUPL=y +CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE=y +# CONFIG_BTDM_SCAN_DUPL_TYPE_DATA is not set +# CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE is not set +CONFIG_BTDM_SCAN_DUPL_TYPE=0 +CONFIG_BTDM_SCAN_DUPL_CACHE_SIZE=200 +# CONFIG_BTDM_BLE_MESH_SCAN_DUPL_EN is not set +CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED=y +CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y +CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM=100 +CONFIG_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD=20 +# end of Bluetooth controller(ESP32 Dual Mode Bluetooth) + +CONFIG_BT_CTRL_MODE_EFF=1 +CONFIG_BT_CTRL_BLE_MAX_ACT=10 +CONFIG_BT_CTRL_BLE_MAX_ACT_EFF=10 +CONFIG_BT_CTRL_BLE_STATIC_ACL_TX_BUF_NB=0 +CONFIG_BT_CTRL_PINNED_TO_CORE=0 +CONFIG_BT_CTRL_HCI_TL=1 +CONFIG_BT_CTRL_ADV_DUP_FILT_MAX=30 +CONFIG_BT_CTRL_HW_CCA_EFF=0 +CONFIG_BT_CTRL_DFT_TX_POWER_LEVEL_EFF=0 +CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y +CONFIG_BT_CTRL_BLE_ADV_REPORT_FLOW_CTRL_NUM=100 +CONFIG_BT_CTRL_BLE_ADV_REPORT_DISCARD_THRSHOLD=20 +CONFIG_BT_CTRL_BLE_SCAN_DUPL=y +CONFIG_BT_CTRL_SCAN_DUPL_TYPE=0 +CONFIG_BT_CTRL_SCAN_DUPL_CACHE_SIZE=100 + +# +# MODEM SLEEP Options +# +# end of MODEM SLEEP Options + +CONFIG_BT_CTRL_SLEEP_MODE_EFF=0 +CONFIG_BT_CTRL_SLEEP_CLOCK_EFF=0 +CONFIG_BT_CTRL_HCI_TL_EFF=1 + +# +# MODEM SLEEP Options +# +# end of MODEM SLEEP Options + +# CONFIG_BT_BLUEDROID_ENABLED is not set +CONFIG_BT_NIMBLE_ENABLED=y +# CONFIG_BT_CONTROLLER_ONLY is not set +CONFIG_BT_RESERVE_DRAM=0xdb5c + +# +# NimBLE Options +# +CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y +# CONFIG_BT_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_NONE is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_CRIT is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_ERROR is not set +# CONFIG_BT_NIMBLE_LOG_LEVEL_WARNING is not set +CONFIG_BT_NIMBLE_LOG_LEVEL_INFO=y +# CONFIG_BT_NIMBLE_LOG_LEVEL_DEBUG is not set +CONFIG_BT_NIMBLE_LOG_LEVEL=1 +CONFIG_BT_NIMBLE_MAX_CONNECTIONS=3 +CONFIG_BT_NIMBLE_MAX_BONDS=3 +CONFIG_BT_NIMBLE_MAX_CCCDS=8 +CONFIG_BT_NIMBLE_L2CAP_COC_MAX_NUM=0 +CONFIG_BT_NIMBLE_PINNED_TO_CORE_0=y +# CONFIG_BT_NIMBLE_PINNED_TO_CORE_1 is not set +CONFIG_BT_NIMBLE_PINNED_TO_CORE=0 +CONFIG_BT_NIMBLE_TASK_STACK_SIZE=4096 +CONFIG_BT_NIMBLE_ROLE_CENTRAL=y +CONFIG_BT_NIMBLE_ROLE_PERIPHERAL=y +CONFIG_BT_NIMBLE_ROLE_BROADCASTER=y +CONFIG_BT_NIMBLE_ROLE_OBSERVER=y +CONFIG_BT_NIMBLE_NVS_PERSIST=y +CONFIG_BT_NIMBLE_SM_LEGACY=y +CONFIG_BT_NIMBLE_SM_SC=y +# CONFIG_BT_NIMBLE_DEBUG is not set +# CONFIG_BT_NIMBLE_SM_SC_DEBUG_KEYS is not set +CONFIG_BT_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" +CONFIG_BT_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +CONFIG_BT_NIMBLE_ATT_PREFERRED_MTU=256 +CONFIG_BT_NIMBLE_SVC_GAP_APPEARANCE=0 +CONFIG_BT_NIMBLE_ACL_BUF_COUNT=10 +CONFIG_BT_NIMBLE_ACL_BUF_SIZE=255 +CONFIG_BT_NIMBLE_HCI_EVT_BUF_SIZE=70 +CONFIG_BT_NIMBLE_HCI_EVT_HI_BUF_COUNT=20 +CONFIG_BT_NIMBLE_HCI_EVT_LO_BUF_COUNT=8 +CONFIG_BT_NIMBLE_MSYS1_BLOCK_COUNT=12 +CONFIG_BT_NIMBLE_HS_FLOW_CTRL=y +CONFIG_BT_NIMBLE_HS_FLOW_CTRL_ITVL=1000 +CONFIG_BT_NIMBLE_HS_FLOW_CTRL_THRESH=2 +CONFIG_BT_NIMBLE_HS_FLOW_CTRL_TX_ON_DISCONNECT=y +CONFIG_BT_NIMBLE_RPA_TIMEOUT=900 +# CONFIG_BT_NIMBLE_MESH is not set +CONFIG_BT_NIMBLE_CRYPTO_STACK_MBEDTLS=y +CONFIG_BT_NIMBLE_HS_STOP_TIMEOUT_MS=2000 +# CONFIG_BT_NIMBLE_ENABLE_CONN_REATTEMPT is not set +CONFIG_BT_NIMBLE_USE_ESP_TIMER=y +# CONFIG_BT_NIMBLE_BLUFI_ENABLE is not set +# end of NimBLE Options +# end of Bluetooth + +# CONFIG_BLE_MESH is not set + +# +# CoAP Configuration +# +CONFIG_COAP_MBEDTLS_PSK=y +# CONFIG_COAP_MBEDTLS_PKI is not set +# CONFIG_COAP_MBEDTLS_DEBUG is not set +CONFIG_COAP_LOG_DEFAULT_LEVEL=0 +# end of CoAP Configuration + +# +# Driver configurations +# + +# +# ADC configuration +# +# CONFIG_ADC_FORCE_XPD_FSM is not set +CONFIG_ADC_DISABLE_DAC=y +# end of ADC configuration + +# +# SPI configuration +# +# CONFIG_SPI_MASTER_IN_IRAM is not set +CONFIG_SPI_MASTER_ISR_IN_IRAM=y +# CONFIG_SPI_SLAVE_IN_IRAM is not set +CONFIG_SPI_SLAVE_ISR_IN_IRAM=y +# end of SPI configuration + +# +# TWAI configuration +# +# CONFIG_TWAI_ISR_IN_IRAM is not set +# CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC is not set +# CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST is not set +# CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID is not set +# CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT is not set +# end of TWAI configuration + +# +# UART configuration +# +CONFIG_UART_ISR_IN_IRAM=y +# end of UART configuration + +# +# RTCIO configuration +# +# CONFIG_RTCIO_SUPPORT_RTC_GPIO_DESC is not set +# end of RTCIO configuration + +# +# GPIO Configuration +# +# CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL is not set +# end of GPIO Configuration +# end of Driver configurations + +# +# eFuse Bit Manager +# +# CONFIG_EFUSE_CUSTOM_TABLE is not set +# CONFIG_EFUSE_VIRTUAL is not set +# CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set +CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y +# CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set +CONFIG_EFUSE_MAX_BLK_LEN=192 +# end of eFuse Bit Manager + +# +# ESP-TLS +# +CONFIG_ESP_TLS_USING_MBEDTLS=y +# CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set +# CONFIG_ESP_TLS_SERVER is not set +# CONFIG_ESP_TLS_PSK_VERIFICATION is not set +# CONFIG_ESP_TLS_INSECURE is not set +# end of ESP-TLS + +# +# ESP32-specific +# +CONFIG_ESP32_REV_MIN_0=y +# CONFIG_ESP32_REV_MIN_1 is not set +# CONFIG_ESP32_REV_MIN_2 is not set +# CONFIG_ESP32_REV_MIN_3 is not set +CONFIG_ESP32_REV_MIN=0 +CONFIG_ESP32_DPORT_WORKAROUND=y +# CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set +# CONFIG_ESP32_DEFAULT_CPU_FREQ_160 is not set +CONFIG_ESP32_DEFAULT_CPU_FREQ_240=y +CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=240 +# CONFIG_ESP32_SPIRAM_SUPPORT is not set +# CONFIG_ESP32_TRAX is not set +CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 +# CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y +CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 +CONFIG_ESP32_ULP_COPROC_ENABLED=y +CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=512 +CONFIG_ESP32_DEBUG_OCDAWARE=y +CONFIG_ESP32_BROWNOUT_DET=y +CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_1 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set +CONFIG_ESP32_BROWNOUT_DET_LVL=0 +CONFIG_ESP32_REDUCE_PHY_TX_POWER=y +CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y +# CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set +# CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set +CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y +# CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set +# CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set +# CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set +CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 +CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP32_XTAL_FREQ_40=y +# CONFIG_ESP32_XTAL_FREQ_26 is not set +# CONFIG_ESP32_XTAL_FREQ_AUTO is not set +CONFIG_ESP32_XTAL_FREQ=40 +# CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set +# CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +# CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set +# CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set +CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5 +# end of ESP32-specific + +# +# ADC-Calibration +# +CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y +CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y +CONFIG_ADC_CAL_LUT_ENABLE=y +# end of ADC-Calibration + +# +# Common ESP-related +# +CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 +CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 +CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y +CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_NONE is not set +CONFIG_ESP_CONSOLE_UART=y +CONFIG_ESP_CONSOLE_MULTIPLE_UART=y +CONFIG_ESP_CONSOLE_UART_NUM=0 +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +CONFIG_ESP_INT_WDT=y +CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 +CONFIG_ESP_INT_WDT_CHECK_CPU1=y +# CONFIG_ESP_TASK_WDT is not set +# CONFIG_ESP_PANIC_HANDLER_IRAM is not set +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y +CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y +# end of Common ESP-related + + +# +# Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE +# +CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build +CONFIG_ETH_USE_SPI_ETHERNET=y +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y +# end of Ethernet + +# +# Event Loop Library +# +# CONFIG_ESP_EVENT_LOOP_PROFILING is not set +CONFIG_ESP_EVENT_POST_FROM_ISR=y +CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y +# end of Event Loop Library + +# +# GDB Stub +# +# end of GDB Stub + +# +# ESP HTTP client +# +CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y +# CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set +# end of ESP HTTP client + +# +# HTTP Server +# +CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 +CONFIG_HTTPD_MAX_URI_LEN=512 +CONFIG_HTTPD_ERR_RESP_NO_DELAY=y +CONFIG_HTTPD_PURGE_BUF_LEN=32 +# CONFIG_HTTPD_LOG_PURGE_DATA is not set +# CONFIG_HTTPD_WS_SUPPORT is not set +# end of HTTP Server + +# +# ESP HTTPS OTA +# +# CONFIG_OTA_ALLOW_HTTP is not set +# end of ESP HTTPS OTA + +# +# ESP HTTPS server +# +# CONFIG_ESP_HTTPS_SERVER_ENABLE is not set +# end of ESP HTTPS server + +# +# ESP NETIF Adapter +# +CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 +CONFIG_ESP_NETIF_TCPIP_LWIP=y +# CONFIG_ESP_NETIF_LOOPBACK is not set +# CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER is not set +# end of ESP NETIF Adapter + +# +# Power Management +# +CONFIG_PM_ENABLE=y +# CONFIG_PM_DFS_INIT_AUTO is not set +# CONFIG_PM_PROFILING is not set +# CONFIG_PM_TRACE is not set +# CONFIG_PM_SLP_IRAM_OPT is not set +# CONFIG_PM_RTOS_IDLE_OPT is not set +# CONFIG_PM_SLP_DISABLE_GPIO is not set +# end of Power Management + +# +# ESP System Settings +# +# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set +CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y +# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set +CONFIG_ESP_SYSTEM_PD_FLASH=y + +# +# Memory protection +# +# end of Memory protection +# end of ESP System Settings + +# +# High resolution timer (esp_timer) +# +# CONFIG_ESP_TIMER_PROFILING is not set +CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y +CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y +CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 +# CONFIG_ESP_TIMER_IMPL_FRC2 is not set +CONFIG_ESP_TIMER_IMPL_TG0_LAC=y +# end of High resolution timer (esp_timer) + +# +# Wi-Fi +# +CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y +CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 +CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 +CONFIG_ESP32_WIFI_STATIC_TX_BUFFER=y +# CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER is not set +CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=0 +CONFIG_ESP32_WIFI_STATIC_TX_BUFFER_NUM=16 +# CONFIG_ESP32_WIFI_CSI_ENABLED is not set +CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y +CONFIG_ESP32_WIFI_TX_BA_WIN=6 +CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y +CONFIG_ESP32_WIFI_RX_BA_WIN=6 +CONFIG_ESP32_WIFI_NVS_ENABLED=y +CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y +# CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set +CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 +CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 +# CONFIG_WIFI_LOG_DEFAULT_LEVEL_NONE is not set +# CONFIG_WIFI_LOG_DEFAULT_LEVEL_ERROR is not set +# CONFIG_WIFI_LOG_DEFAULT_LEVEL_WARN is not set +CONFIG_WIFI_LOG_DEFAULT_LEVEL_INFO=y +# CONFIG_WIFI_LOG_DEFAULT_LEVEL_DEBUG is not set +# CONFIG_WIFI_LOG_DEFAULT_LEVEL_VERBOSE is not set +# CONFIG_ESP32_WIFI_IRAM_OPT is not set +# CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set +CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y +# CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set +# CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set +# end of Wi-Fi + +# +# PHY +# +CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +# CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set +CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP32_PHY_MAX_TX_POWER=20 +# end of PHY + +# +# Core dump +# +# CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set +# CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set +CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y +# end of Core dump + +# +# FAT Filesystem support +# +# CONFIG_FATFS_CODEPAGE_DYNAMIC is not set +CONFIG_FATFS_CODEPAGE_437=y +# CONFIG_FATFS_CODEPAGE_720 is not set +# CONFIG_FATFS_CODEPAGE_737 is not set +# CONFIG_FATFS_CODEPAGE_771 is not set +# CONFIG_FATFS_CODEPAGE_775 is not set +# CONFIG_FATFS_CODEPAGE_850 is not set +# CONFIG_FATFS_CODEPAGE_852 is not set +# CONFIG_FATFS_CODEPAGE_855 is not set +# CONFIG_FATFS_CODEPAGE_857 is not set +# CONFIG_FATFS_CODEPAGE_860 is not set +# CONFIG_FATFS_CODEPAGE_861 is not set +# CONFIG_FATFS_CODEPAGE_862 is not set +# CONFIG_FATFS_CODEPAGE_863 is not set +# CONFIG_FATFS_CODEPAGE_864 is not set +# CONFIG_FATFS_CODEPAGE_865 is not set +# CONFIG_FATFS_CODEPAGE_866 is not set +# CONFIG_FATFS_CODEPAGE_869 is not set +# CONFIG_FATFS_CODEPAGE_932 is not set +# CONFIG_FATFS_CODEPAGE_936 is not set +# CONFIG_FATFS_CODEPAGE_949 is not set +# CONFIG_FATFS_CODEPAGE_950 is not set +CONFIG_FATFS_CODEPAGE=437 +# CONFIG_FATFS_LFN_NONE is not set +CONFIG_FATFS_LFN_HEAP=y +# CONFIG_FATFS_LFN_STACK is not set +CONFIG_FATFS_MAX_LFN=255 +CONFIG_FATFS_API_ENCODING_ANSI_OEM=y +# CONFIG_FATFS_API_ENCODING_UTF_16 is not set +# CONFIG_FATFS_API_ENCODING_UTF_8 is not set +CONFIG_FATFS_FS_LOCK=0 +CONFIG_FATFS_TIMEOUT_MS=10000 +CONFIG_FATFS_PER_FILE_CACHE=y +# CONFIG_FATFS_USE_FASTSEEK is not set +# end of FAT Filesystem support + +# +# Modbus configuration +# +CONFIG_FMB_COMM_MODE_TCP_EN=y +CONFIG_FMB_TCP_PORT_DEFAULT=502 +CONFIG_FMB_TCP_PORT_MAX_CONN=5 +CONFIG_FMB_TCP_CONNECTION_TOUT_SEC=20 +CONFIG_FMB_COMM_MODE_RTU_EN=y +CONFIG_FMB_COMM_MODE_ASCII_EN=y +CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND=150 +CONFIG_FMB_MASTER_DELAY_MS_CONVERT=200 +CONFIG_FMB_QUEUE_LENGTH=20 +CONFIG_FMB_PORT_TASK_STACK_SIZE=4096 +CONFIG_FMB_SERIAL_BUF_SIZE=256 +CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8 +CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000 +CONFIG_FMB_PORT_TASK_PRIO=10 +CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT=y +CONFIG_FMB_CONTROLLER_SLAVE_ID=0x00112233 +CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20 +CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 +CONFIG_FMB_CONTROLLER_STACK_SIZE=4096 +CONFIG_FMB_EVENT_QUEUE_TIMEOUT=20 +CONFIG_FMB_TIMER_PORT_ENABLED=y +CONFIG_FMB_TIMER_GROUP=0 +CONFIG_FMB_TIMER_INDEX=0 +# CONFIG_FMB_TIMER_ISR_IN_IRAM is not set +# end of Modbus configuration + +# +# FreeRTOS +# +# CONFIG_FREERTOS_UNICORE is not set +CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF +CONFIG_FREERTOS_CORETIMER_0=y +# CONFIG_FREERTOS_CORETIMER_1 is not set +CONFIG_FREERTOS_HZ=100 +CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set +CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y +# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set +CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y +CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 +# CONFIG_FREERTOS_ASSERT_FAIL_PRINT_CONTINUE is not set +CONFIG_FREERTOS_ASSERT_DISABLE=y +CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=2304 +CONFIG_FREERTOS_ISR_STACKSIZE=1536 +# CONFIG_FREERTOS_LEGACY_HOOKS is not set +CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 +CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y +# CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set +CONFIG_FREERTOS_TIMER_TASK_PRIORITY=5 +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 +CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 +# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set +# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set +CONFIG_FREERTOS_USE_TICKLESS_IDLE=y +CONFIG_FREERTOS_IDLE_TIME_BEFORE_SLEEP=3 +CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y +# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set +# CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set +CONFIG_FREERTOS_DEBUG_OCDAWARE=y +# CONFIG_FREERTOS_FPU_IN_ISR is not set +# end of FreeRTOS + +# +# Heap memory debugging +# +CONFIG_HEAP_POISONING_DISABLED=y +# CONFIG_HEAP_POISONING_LIGHT is not set +# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set +CONFIG_HEAP_TRACING_OFF=y +# CONFIG_HEAP_TRACING_STANDALONE is not set +# CONFIG_HEAP_TRACING_TOHOST is not set +# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set +# end of Heap memory debugging + +# +# jsmn +# +# CONFIG_JSMN_PARENT_LINKS is not set +# CONFIG_JSMN_STRICT is not set +# end of jsmn + +# +# libsodium +# +# end of libsodium + +# +# Log output +# +# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set +# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set +# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set +CONFIG_LOG_DEFAULT_LEVEL_INFO=y +# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set +# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set +CONFIG_LOG_DEFAULT_LEVEL=3 +CONFIG_LOG_COLORS=y +CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y +# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set +# end of Log output + +# +# LWIP +# +CONFIG_LWIP_LOCAL_HOSTNAME="nanodevice" +CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y +# CONFIG_LWIP_L2_TO_L3_COPY is not set +# CONFIG_LWIP_IRAM_OPTIMIZATION is not set +CONFIG_LWIP_TIMERS_ONDEMAND=y +CONFIG_LWIP_MAX_SOCKETS=16 +# CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set +CONFIG_LWIP_SO_LINGER=y +CONFIG_LWIP_SO_REUSE=y +CONFIG_LWIP_SO_REUSE_RXTOALL=y +CONFIG_LWIP_SO_RCVBUF=y +# CONFIG_LWIP_NETBUF_RECVINFO is not set +CONFIG_LWIP_IP4_FRAG=y +CONFIG_LWIP_IP6_FRAG=y +# CONFIG_LWIP_IP4_REASSEMBLY is not set +# CONFIG_LWIP_IP6_REASSEMBLY is not set +# CONFIG_LWIP_IP_FORWARD is not set +# CONFIG_LWIP_STATS is not set +# CONFIG_LWIP_ETHARP_TRUST_IP_MAC is not set +CONFIG_LWIP_ESP_GRATUITOUS_ARP=y +CONFIG_LWIP_GARP_TMR_INTERVAL=60 +CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 +CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y +# CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set +# CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set + +# +# DHCP server +# +# CONFIG_LWIP_DHCPS is not set +CONFIG_LWIP_DHCPS_LEASE_UNIT=60 +CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 +# end of DHCP server + +# CONFIG_LWIP_AUTOIP is not set +# CONFIG_LWIP_IPV6 is not set +# CONFIG_LWIP_IPV6_AUTOCONFIG is not set +CONFIG_LWIP_NETIF_LOOPBACK=y +CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 + +# +# TCP +# +CONFIG_LWIP_MAX_ACTIVE_TCP=16 +CONFIG_LWIP_MAX_LISTENING_TCP=8 +CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y +CONFIG_LWIP_TCP_MAXRTX=12 +CONFIG_LWIP_TCP_SYNMAXRTX=12 +CONFIG_LWIP_TCP_MSS=1440 +CONFIG_LWIP_TCP_TMR_INTERVAL=250 +CONFIG_LWIP_TCP_MSL=60000 +CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 +CONFIG_LWIP_TCP_WND_DEFAULT=5744 +CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 +CONFIG_LWIP_TCP_QUEUE_OOSEQ=y +# CONFIG_LWIP_TCP_SACK_OUT is not set +# CONFIG_LWIP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set +CONFIG_LWIP_TCP_OVERSIZE_MSS=y +# CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set +CONFIG_LWIP_TCP_RTO_TIME=1500 +# end of TCP + +# +# UDP +# +CONFIG_LWIP_MAX_UDP_PCBS=16 +CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 +# end of UDP + +# +# Checksums +# +# CONFIG_LWIP_CHECKSUM_CHECK_IP is not set +# CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set +CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y +# end of Checksums + +CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set +# CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set +CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_LWIP_PPP_SUPPORT is not set +CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 +CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 +# CONFIG_LWIP_SLIP_SUPPORT is not set + +# +# ICMP +# +CONFIG_LWIP_ICMP=y +# CONFIG_LWIP_MULTICAST_PING is not set +# CONFIG_LWIP_BROADCAST_PING is not set +# end of ICMP + +# +# LWIP RAW API +# +CONFIG_LWIP_MAX_RAW_PCBS=16 +# end of LWIP RAW API + +# +# SNTP +# +CONFIG_LWIP_DHCP_MAX_NTP_SERVERS=1 +CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 +# end of SNTP + +# +# Hooks +# +# CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set +CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y +# CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set +CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y +# CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set +# CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set +CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set +# CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set +# end of Hooks + +# CONFIG_LWIP_DEBUG=y +# CONFIG_LWIP_NETIF_DEBUG=y +# CONFIG_LWIP_PBUF_DEBUG is not set +# CONFIG_LWIP_ETHARP_DEBUG is not set +# CONFIG_LWIP_API=y +# CONFIG_LWIP_SOCKETS_DEBUG=y +# CONFIG_LWIP_IP_DEBUG is not set +# CONFIG_LWIP_ICMP_DEBUG is not set +# CONFIG_LWIP_DHCP_STATE_DEBUG is not set +# CONFIG_LWIP_DHCP_DEBUG is not set +# CONFIG_LWIP_IP6_DEBUG is not set +# CONFIG_LWIP_ICMP6_DEBUG is not set +# CONFIG_LWIP_TCP_DEBUG=y +# end of LWIP + +# end of LWIP + +# +# mbedTLS +# +CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y +# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set +# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set +CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y +CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 +CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 +# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set +# CONFIG_MBEDTLS_DEBUG is not set + +# +# Certificate Bundle +# +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE is not set +# end of Certificate Bundle + +CONFIG_MBEDTLS_ECP_RESTARTABLE=y +CONFIG_MBEDTLS_CMAC_C=y +CONFIG_MBEDTLS_HARDWARE_AES=y +CONFIG_MBEDTLS_HARDWARE_MPI=y +CONFIG_MBEDTLS_HARDWARE_SHA=y +CONFIG_MBEDTLS_ROM_MD5=y +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set +CONFIG_MBEDTLS_HAVE_TIME=y +CONFIG_MBEDTLS_HAVE_TIME_DATE=y +CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y +CONFIG_MBEDTLS_SHA512_C=y +CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y +# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set +# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set +# CONFIG_MBEDTLS_TLS_DISABLED is not set +CONFIG_MBEDTLS_TLS_SERVER=y +CONFIG_MBEDTLS_TLS_CLIENT=y +CONFIG_MBEDTLS_TLS_ENABLED=y + +# +# TLS Key Exchange Methods +# +# CONFIG_MBEDTLS_PSK_MODES is not set +CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y +# end of TLS Key Exchange Methods + +CONFIG_MBEDTLS_SSL_RENEGOTIATION=y +# CONFIG_MBEDTLS_SSL_PROTO_SSL3 is not set +CONFIG_MBEDTLS_SSL_PROTO_TLS1=y +CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y +CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y +CONFIG_MBEDTLS_SSL_PROTO_DTLS=y +CONFIG_MBEDTLS_SSL_ALPN=y +CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y +CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y +CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y + +# +# Symmetric Ciphers +# +CONFIG_MBEDTLS_AES_C=y +# CONFIG_MBEDTLS_CAMELLIA_C is not set +CONFIG_MBEDTLS_DES_C=y +CONFIG_MBEDTLS_RC4_DISABLED=y +# CONFIG_MBEDTLS_RC4_ENABLED_NO_DEFAULT is not set +# CONFIG_MBEDTLS_RC4_ENABLED is not set +# CONFIG_MBEDTLS_BLOWFISH_C is not set +CONFIG_MBEDTLS_XTEA_C=y +CONFIG_MBEDTLS_CCM_C=y +CONFIG_MBEDTLS_GCM_C=y +# CONFIG_MBEDTLS_NIST_KW_C is not set +# end of Symmetric Ciphers + +# CONFIG_MBEDTLS_RIPEMD160_C is not set + +# +# Certificates +# +CONFIG_MBEDTLS_PEM_PARSE_C=y +# CONFIG_MBEDTLS_PEM_WRITE_C is not set +CONFIG_MBEDTLS_X509_CRL_PARSE_C=y +CONFIG_MBEDTLS_X509_CSR_PARSE_C=y +# end of Certificates + +CONFIG_MBEDTLS_ECP_C=y +CONFIG_MBEDTLS_ECDH_C=y +CONFIG_MBEDTLS_ECDSA_C=y +# CONFIG_MBEDTLS_ECJPAKE_C is not set +CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y +CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y +CONFIG_MBEDTLS_ECP_NIST_OPTIM=y +# CONFIG_MBEDTLS_POLY1305_C is not set +# CONFIG_MBEDTLS_CHACHA20_C is not set +# CONFIG_MBEDTLS_HKDF_C is not set +# CONFIG_MBEDTLS_THREADING_C is not set +# CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set +# CONFIG_MBEDTLS_SECURITY_RISKS is not set +# end of mbedTLS + +# +# mDNS +# +CONFIG_MDNS_MAX_SERVICES=10 +CONFIG_MDNS_TASK_PRIORITY=1 +CONFIG_MDNS_TASK_STACK_SIZE=4096 +# CONFIG_MDNS_TASK_AFFINITY_NO_AFFINITY is not set +CONFIG_MDNS_TASK_AFFINITY_CPU0=y +# CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set +CONFIG_MDNS_TASK_AFFINITY=0x0 +CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000 +# CONFIG_MDNS_STRICT_MODE is not set +CONFIG_MDNS_TIMER_PERIOD_MS=100 +# end of mDNS + +# +# ESP-MQTT Configurations +# +CONFIG_MQTT_PROTOCOL_311=y +CONFIG_MQTT_TRANSPORT_SSL=y +CONFIG_MQTT_TRANSPORT_WEBSOCKET=y +CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y +# CONFIG_MQTT_MSG_ID_INCREMENTAL is not set +# CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set +# CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set +# CONFIG_MQTT_USE_CUSTOM_CONFIG is not set +# CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set +# CONFIG_MQTT_CUSTOM_OUTBOX is not set +# end of ESP-MQTT Configurations + +# +# Newlib +# +CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set +CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y +# CONFIG_NEWLIB_NANO_FORMAT is not set +# end of Newlib + +# +# NVS +# +# end of NVS + +# +# OpenSSL +# +# CONFIG_OPENSSL_DEBUG is not set +CONFIG_OPENSSL_ERROR_STACK=y +# CONFIG_OPENSSL_ASSERT_DO_NOTHING is not set +CONFIG_OPENSSL_ASSERT_EXIT=y +# end of OpenSSL + +# +# PThreads +# +CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_PTHREAD_STACK_MIN=768 +CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y +# CONFIG_PTHREAD_DEFAULT_CORE_0 is not set +# CONFIG_PTHREAD_DEFAULT_CORE_1 is not set +CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" +# end of PThreads + +# +# SPI Flash driver +# +# CONFIG_SPI_FLASH_VERIFY_WRITE is not set +# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set +CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y +CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set +# CONFIG_SPI_FLASH_USE_LEGACY_IMPL is not set +# CONFIG_SPI_FLASH_SHARE_SPI1_BUS is not set +# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set +CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y +CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 +CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 +CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 +# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set +# CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set + +# +# Auto-detect flash chips +# +CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y +CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y +CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y +CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y +# end of Auto-detect flash chips + +CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y +# end of SPI Flash driver + +# +# SPIFFS Configuration +# +CONFIG_SPIFFS_MAX_PARTITIONS=3 + +# +# SPIFFS Cache Configuration +# +CONFIG_SPIFFS_CACHE=y +CONFIG_SPIFFS_CACHE_WR=y +# CONFIG_SPIFFS_CACHE_STATS is not set +# end of SPIFFS Cache Configuration + +CONFIG_SPIFFS_PAGE_CHECK=y +CONFIG_SPIFFS_GC_MAX_RUNS=10 +# CONFIG_SPIFFS_GC_STATS is not set +CONFIG_SPIFFS_PAGE_SIZE=256 +CONFIG_SPIFFS_OBJ_NAME_LEN=32 +# CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set +CONFIG_SPIFFS_USE_MAGIC=y +CONFIG_SPIFFS_USE_MAGIC_LENGTH=y +CONFIG_SPIFFS_META_LENGTH=4 +CONFIG_SPIFFS_USE_MTIME=y + +# +# Debug Configuration +# +# CONFIG_SPIFFS_DBG is not set +# CONFIG_SPIFFS_API_DBG is not set +# CONFIG_SPIFFS_GC_DBG is not set +# CONFIG_SPIFFS_CACHE_DBG is not set +# CONFIG_SPIFFS_CHECK_DBG is not set +# CONFIG_SPIFFS_TEST_VISUALISATION is not set +# end of Debug Configuration +# end of SPIFFS Configuration + +# +# TCP Transport +# + +# +# Websocket +# +CONFIG_WS_TRANSPORT=y +CONFIG_WS_BUFFER_SIZE=1024 +# end of Websocket +# end of TCP Transport + +# +# TinyUSB +# +# end of TinyUSB + +# +# Unity unit testing library +# +CONFIG_UNITY_ENABLE_FLOAT=y +CONFIG_UNITY_ENABLE_DOUBLE=y +# CONFIG_UNITY_ENABLE_COLOR is not set +CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y +# CONFIG_UNITY_ENABLE_FIXTURE is not set +# CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set +# end of Unity unit testing library + +# +# Virtual file system +# +CONFIG_VFS_SUPPORT_IO=y +CONFIG_VFS_SUPPORT_DIR=y +CONFIG_VFS_SUPPORT_SELECT=y +CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y +CONFIG_VFS_SUPPORT_TERMIOS=y + +# +# Host File System I/O (Semihosting) +# +CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 +# end of Host File System I/O (Semihosting) +# end of Virtual file system + +# +# Wear Levelling +# +# CONFIG_WL_SECTOR_SIZE_512 is not set +CONFIG_WL_SECTOR_SIZE_4096=y +CONFIG_WL_SECTOR_SIZE=4096 +# end of Wear Levelling + +# +# Wi-Fi Provisioning Manager +# +CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 +CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30 +# end of Wi-Fi Provisioning Manager + +# +# Supplicant +# +CONFIG_WPA_MBEDTLS_CRYPTO=y +# CONFIG_WPA_WAPI_PSK is not set +# CONFIG_WPA_DEBUG_PRINT is not set +# CONFIG_WPA_TESTING_OPTIONS is not set +# CONFIG_WPA_WPS_STRICT is not set +# CONFIG_WPA_11KV_SUPPORT is not set +# end of Supplicant +# end of Component config + +# +# Compatibility options +# +# CONFIG_LEGACY_INCLUDE_COMMON_HEADERS is not set +# end of Compatibility options + +# Deprecated options for backward compatibility +CONFIG_TOOLPREFIX="xtensa-esp32-elf-" +# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set +CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y +# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set +CONFIG_LOG_BOOTLOADER_LEVEL=3 +# CONFIG_APP_ROLLBACK_ENABLE is not set +# CONFIG_FLASH_ENCRYPTION_ENABLED is not set +# CONFIG_FLASHMODE_QIO is not set +# CONFIG_FLASHMODE_QOUT is not set +CONFIG_FLASHMODE_DIO=y +# CONFIG_FLASHMODE_DOUT is not set +# CONFIG_MONITOR_BAUD_9600B is not set +# CONFIG_MONITOR_BAUD_57600B is not set +# CONFIG_MONITOR_BAUD_115200B is not set +# CONFIG_MONITOR_BAUD_230400B is not set +CONFIG_MONITOR_BAUD_921600B=y +# CONFIG_MONITOR_BAUD_2MB is not set +# CONFIG_MONITOR_BAUD_OTHER is not set +CONFIG_MONITOR_BAUD_OTHER_VAL=115200 +CONFIG_MONITOR_BAUD=921600 +# CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG is not set +CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE=y +# CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED is not set +# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set +CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED=y +# CONFIG_CXX_EXCEPTIONS is not set +CONFIG_STACK_CHECK_NONE=y +# CONFIG_STACK_CHECK_NORM is not set +# CONFIG_STACK_CHECK_STRONG is not set +# CONFIG_STACK_CHECK_ALL is not set +# CONFIG_WARN_WRITE_STRINGS is not set +# CONFIG_DISABLE_GCC8_WARNINGS is not set +# CONFIG_ESP32_APPTRACE_DEST_TRAX is not set +CONFIG_ESP32_APPTRACE_DEST_NONE=y +CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y +CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY=y +# CONFIG_BTDM_CONTROLLER_MODE_BR_EDR_ONLY is not set +# CONFIG_BTDM_CONTROLLER_MODE_BTDM is not set +CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN=3 +CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=3 +CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=0 +CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0 +CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0 +CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI=y +# CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4 is not set +CONFIG_BTDM_CONTROLLER_MODEM_SLEEP=y +CONFIG_BLE_SCAN_DUPLICATE=y +CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR=y +# CONFIG_SCAN_DUPLICATE_BY_ADV_DATA is not set +# CONFIG_SCAN_DUPLICATE_BY_ADV_DATA_AND_DEVICE_ADDR is not set +CONFIG_SCAN_DUPLICATE_TYPE=0 +CONFIG_DUPLICATE_SCAN_CACHE_SIZE=200 +# CONFIG_BLE_MESH_SCAN_DUPLICATE_EN is not set +CONFIG_BTDM_CONTROLLER_FULL_SCAN_SUPPORTED=y +CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_SUPPORTED=y +CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_NUM=100 +CONFIG_BLE_ADV_REPORT_DISCARD_THRSHOLD=20 +# CONFIG_BLUEDROID_ENABLED is not set +CONFIG_NIMBLE_ENABLED=y +CONFIG_NIMBLE_MEM_ALLOC_MODE_INTERNAL=y +# CONFIG_NIMBLE_MEM_ALLOC_MODE_DEFAULT is not set +CONFIG_NIMBLE_MAX_CONNECTIONS=2 +CONFIG_NIMBLE_MAX_BONDS=3 +CONFIG_NIMBLE_MAX_CCCDS=8 +CONFIG_NIMBLE_L2CAP_COC_MAX_NUM=0 +CONFIG_NIMBLE_PINNED_TO_CORE_0=y +# CONFIG_NIMBLE_PINNED_TO_CORE_1 is not set +CONFIG_NIMBLE_PINNED_TO_CORE=0 +CONFIG_NIMBLE_TASK_STACK_SIZE=4096 +CONFIG_NIMBLE_ROLE_CENTRAL=y +CONFIG_NIMBLE_ROLE_PERIPHERAL=y +CONFIG_NIMBLE_ROLE_BROADCASTER=y +CONFIG_NIMBLE_ROLE_OBSERVER=y +CONFIG_NIMBLE_NVS_PERSIST=y +CONFIG_NIMBLE_SM_LEGACY=y +CONFIG_NIMBLE_SM_SC=y +# CONFIG_NIMBLE_DEBUG is not set +# CONFIG_NIMBLE_SM_SC_DEBUG_KEYS is not set +CONFIG_NIMBLE_SVC_GAP_DEVICE_NAME="nimble" +CONFIG_NIMBLE_GAP_DEVICE_NAME_MAX_LEN=31 +CONFIG_NIMBLE_ATT_PREFERRED_MTU=256 +CONFIG_NIMBLE_SVC_GAP_APPEARANCE=0 +CONFIG_NIMBLE_ACL_BUF_COUNT=10 +CONFIG_NIMBLE_ACL_BUF_SIZE=255 +CONFIG_NIMBLE_HCI_EVT_BUF_SIZE=70 +CONFIG_NIMBLE_HCI_EVT_HI_BUF_COUNT=20 +CONFIG_NIMBLE_HCI_EVT_LO_BUF_COUNT=8 +CONFIG_NIMBLE_MSYS1_BLOCK_COUNT=12 +CONFIG_NIMBLE_HS_FLOW_CTRL=y +CONFIG_NIMBLE_HS_FLOW_CTRL_ITVL=1000 +CONFIG_NIMBLE_HS_FLOW_CTRL_THRESH=2 +CONFIG_NIMBLE_HS_FLOW_CTRL_TX_ON_DISCONNECT=y +CONFIG_NIMBLE_RPA_TIMEOUT=900 +# CONFIG_NIMBLE_MESH is not set +CONFIG_NIMBLE_CRYPTO_STACK_MBEDTLS=y +CONFIG_ADC2_DISABLE_DAC=y +# CONFIG_SPIRAM_SUPPORT is not set +CONFIG_TRACEMEM_RESERVE_DRAM=0x0 +# CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set +CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y +CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 +CONFIG_ULP_COPROC_ENABLED=y +CONFIG_ULP_COPROC_RESERVE_MEM=512 +CONFIG_BROWNOUT_DET=y +CONFIG_BROWNOUT_DET_LVL_SEL_0=y +# CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set +CONFIG_BROWNOUT_DET_LVL=0 +CONFIG_REDUCE_PHY_TX_POWER=y +CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y +# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set +# CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set +# CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set +# CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set +# CONFIG_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set +CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_MAIN_TASK_STACK_SIZE=3584 +CONFIG_IPC_TASK_STACK_SIZE=1024 +CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_CUSTOM is not set +# CONFIG_ESP_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART=y +CONFIG_CONSOLE_UART_NUM=0 +CONFIG_CONSOLE_UART_BAUDRATE=115200 +CONFIG_INT_WDT=y +CONFIG_INT_WDT_TIMEOUT_MS=300 +CONFIG_INT_WDT_CHECK_CPU1=y +# CONFIG_TASK_WDT is not set +# CONFIG_EVENT_LOOP_PROFILING is not set +CONFIG_POST_EVENTS_FROM_ISR=y +CONFIG_POST_EVENTS_FROM_IRAM_ISR=y +# CONFIG_ESP32S2_PANIC_PRINT_HALT is not set +CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y +# CONFIG_ESP32S2_PANIC_SILENT_REBOOT is not set +# CONFIG_ESP32S2_PANIC_GDBSTUB is not set +CONFIG_TIMER_TASK_STACK_SIZE=3584 +CONFIG_SW_COEXIST_ENABLE=y +# CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set +# CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set +CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y +CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND=150 +CONFIG_MB_MASTER_DELAY_MS_CONVERT=200 +CONFIG_MB_QUEUE_LENGTH=20 +CONFIG_MB_SERIAL_TASK_STACK_SIZE=4096 +CONFIG_MB_SERIAL_BUF_SIZE=256 +CONFIG_MB_SERIAL_TASK_PRIO=10 +CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT=y +CONFIG_MB_CONTROLLER_SLAVE_ID=0x00112233 +CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20 +CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 +CONFIG_MB_CONTROLLER_STACK_SIZE=4096 +CONFIG_MB_EVENT_QUEUE_TIMEOUT=20 +CONFIG_MB_TIMER_PORT_ENABLED=y +CONFIG_MB_TIMER_GROUP=0 +CONFIG_MB_TIMER_INDEX=0 +# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_TIMER_TASK_PRIORITY=1 +CONFIG_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_L2_TO_L3_COPY is not set +# CONFIG_USE_ONLY_LWIP_SELECT is not set +CONFIG_ESP_GRATUITOUS_ARP=y +CONFIG_GARP_TMR_INTERVAL=60 +CONFIG_TCPIP_RECVMBOX_SIZE=32 +CONFIG_TCP_MAXRTX=12 +CONFIG_TCP_SYNMAXRTX=12 +CONFIG_TCP_MSS=1440 +CONFIG_TCP_MSL=60000 +CONFIG_TCP_SND_BUF_DEFAULT=5744 +CONFIG_TCP_WND_DEFAULT=5744 +CONFIG_TCP_RECVMBOX_SIZE=6 +CONFIG_TCP_QUEUE_OOSEQ=y +# CONFIG_ESP_TCP_KEEP_CONNECTION_WHEN_IP_CHANGES is not set +CONFIG_TCP_OVERSIZE_MSS=y +# CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set +# CONFIG_TCP_OVERSIZE_DISABLE is not set +CONFIG_UDP_RECVMBOX_SIZE=6 +CONFIG_TCPIP_TASK_STACK_SIZE=3072 +CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y +# CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set +# CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set +CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF +# CONFIG_PPP_SUPPORT is not set +CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_ESP32_PTHREAD_STACK_MIN=768 +CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set +CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" +CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set +CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y +CONFIG_SUPPORT_TERMIOS=y +CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128 +# End of deprecated options diff --git a/targets/ESP32/_IDF/sdkconfig.default b/targets/ESP32/_IDF/sdkconfig.default index d677fdb5a7..fc5727656e 100644 --- a/targets/ESP32/_IDF/sdkconfig.default +++ b/targets/ESP32/_IDF/sdkconfig.default @@ -104,9 +104,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -272,14 +273,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build CONFIG_ETH_USE_SPI_ETHERNET=y -#CONFIG_ETH_RMII_CLK_OUTPUT=y -#CONFIG_ETH_RMII_CLK_OUT_GPIO=n -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set -# CONFIG_ETH_SPI_ETHERNET_W5500 is not set -# CONFIG_ETH_USE_OPENETH is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -349,7 +365,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -395,10 +411,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -745,7 +761,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default.esp32 b/targets/ESP32/_IDF/sdkconfig.default.esp32 index 16139c13b0..209e2f18fe 100644 --- a/targets/ESP32/_IDF/sdkconfig.default.esp32 +++ b/targets/ESP32/_IDF/sdkconfig.default.esp32 @@ -114,9 +114,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -364,6 +365,33 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # end of Common ESP-related +# +# Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE +# +CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build +CONFIG_ETH_USE_SPI_ETHERNET=y +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y +# end of Ethernet + # # Event Loop Library # @@ -432,7 +460,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=n CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -478,10 +506,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -828,7 +856,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default.esp32s2 b/targets/ESP32/_IDF/sdkconfig.default.esp32s2 index 22345f235b..28004c056d 100644 --- a/targets/ESP32/_IDF/sdkconfig.default.esp32s2 +++ b/targets/ESP32/_IDF/sdkconfig.default.esp32s2 @@ -118,9 +118,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -366,12 +367,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build CONFIG_ETH_USE_SPI_ETHERNET=y -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set -# CONFIG_ETH_SPI_ETHERNET_W5500 is not set -# CONFIG_ETH_USE_OPENETH is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=n # end of Ethernet # @@ -442,7 +460,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=y CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # Memory protection @@ -496,10 +514,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -846,7 +864,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default_ble.esp32 b/targets/ESP32/_IDF/sdkconfig.default_ble.esp32 index f042e6dbdd..84de067bb9 100644 --- a/targets/ESP32/_IDF/sdkconfig.default_ble.esp32 +++ b/targets/ESP32/_IDF/sdkconfig.default_ble.esp32 @@ -115,9 +115,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -369,12 +370,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build CONFIG_ETH_USE_SPI_ETHERNET=y -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set -# CONFIG_ETH_SPI_ETHERNET_W5500 is not set -# CONFIG_ETH_USE_OPENETH is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -445,7 +463,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=n CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -491,10 +509,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -841,7 +859,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default_ble_rev3.esp32 b/targets/ESP32/_IDF/sdkconfig.default_ble_rev3.esp32 index 3ee9bac7ce..9ee3a416bc 100644 --- a/targets/ESP32/_IDF/sdkconfig.default_ble_rev3.esp32 +++ b/targets/ESP32/_IDF/sdkconfig.default_ble_rev3.esp32 @@ -115,9 +115,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -368,12 +369,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build CONFIG_ETH_USE_SPI_ETHERNET=y -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set -# CONFIG_ETH_SPI_ETHERNET_W5500 is not set -# CONFIG_ETH_USE_OPENETH is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -444,7 +462,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=n CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -490,10 +508,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -840,7 +858,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default_nopsram.esp32 b/targets/ESP32/_IDF/sdkconfig.default_nopsram.esp32 index fcba013375..0e9a9a7737 100644 --- a/targets/ESP32/_IDF/sdkconfig.default_nopsram.esp32 +++ b/targets/ESP32/_IDF/sdkconfig.default_nopsram.esp32 @@ -114,9 +114,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -343,8 +344,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # -CONFIG_ETH_ENABLED=n +CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build +CONFIG_ETH_USE_SPI_ETHERNET=y +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -415,7 +437,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=n CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -461,10 +483,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -811,7 +833,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default_nopsram_ble.esp32 b/targets/ESP32/_IDF/sdkconfig.default_nopsram_ble.esp32 index a7ff88641a..56c6299254 100644 --- a/targets/ESP32/_IDF/sdkconfig.default_nopsram_ble.esp32 +++ b/targets/ESP32/_IDF/sdkconfig.default_nopsram_ble.esp32 @@ -118,9 +118,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -474,21 +475,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # CONFIG_ETH_ENABLED=y CONFIG_ETH_USE_ESP32_EMAC=y + CONFIG_ETH_PHY_INTERFACE_RMII=y # CONFIG_ETH_PHY_INTERFACE_MII is not set -CONFIG_ETH_RMII_CLK_INPUT=y -# CONFIG_ETH_RMII_CLK_OUTPUT is not set -CONFIG_ETH_RMII_CLK_IN_GPIO=0 + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + CONFIG_ETH_DMA_BUFFER_SIZE=512 CONFIG_ETH_DMA_RX_BUFFER_NUM=10 CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build CONFIG_ETH_USE_SPI_ETHERNET=y -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set -# CONFIG_ETH_SPI_ETHERNET_W5500 is not set -# CONFIG_ETH_USE_OPENETH is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -562,7 +571,7 @@ CONFIG_PM_ENABLE=y CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # Memory protection @@ -617,10 +626,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -963,7 +972,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default_nopsram_rev3.esp32 b/targets/ESP32/_IDF/sdkconfig.default_nopsram_rev3.esp32 index 6252e3fb87..fc6b86eaf4 100644 --- a/targets/ESP32/_IDF/sdkconfig.default_nopsram_rev3.esp32 +++ b/targets/ESP32/_IDF/sdkconfig.default_nopsram_rev3.esp32 @@ -114,9 +114,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -344,8 +345,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # -CONFIG_ETH_ENABLED=n +CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build +CONFIG_ETH_USE_SPI_ETHERNET=y +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -416,7 +438,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=n CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -462,10 +484,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -812,7 +834,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default_pico b/targets/ESP32/_IDF/sdkconfig.default_pico index 0f406f8882..2b4b636f50 100644 --- a/targets/ESP32/_IDF/sdkconfig.default_pico +++ b/targets/ESP32/_IDF/sdkconfig.default_pico @@ -114,9 +114,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -343,8 +344,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # -CONFIG_ETH_ENABLED=n +CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build +CONFIG_ETH_USE_SPI_ETHERNET=y +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -415,7 +437,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=n CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -461,10 +483,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -811,7 +833,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_IDF/sdkconfig.default_rev3.esp32 b/targets/ESP32/_IDF/sdkconfig.default_rev3.esp32 index 33929ffde6..fc60dc36b0 100644 --- a/targets/ESP32/_IDF/sdkconfig.default_rev3.esp32 +++ b/targets/ESP32/_IDF/sdkconfig.default_rev3.esp32 @@ -115,9 +115,10 @@ CONFIG_ESPTOOLPY_MONITOR_BAUD=921600 # CONFIG_PARTITION_TABLE_SINGLE_APP=y # CONFIG_PARTITION_TABLE_TWO_OTA is not set -# CONFIG_PARTITION_TABLE_CUSTOM is not set -CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" -CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +CONFIG_PARTITION_TABLE_CUSTOM=y +# default to 4mb partition table for nanoCLR +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="targets/ESP32/_IDF/${TARGET_SERIES_SHORT}/partitions_nanoclr_4mb.csv" +# CONFIG_PARTITION_TABLE_FILENAME is not set CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table @@ -368,12 +369,29 @@ CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y # # Ethernet +# +# Parameters configured in binutils.ESP32.CMAKE # CONFIG_ETH_ENABLED=y +CONFIG_ETH_USE_ESP32_EMAC=y + +CONFIG_ETH_PHY_INTERFACE_RMII=y +# CONFIG_ETH_PHY_INTERFACE_MII is not set + +CONFIG_ETH_RMII_CLK_OUTPUT=y +CONFIG_ETH_RMII_CLK_OUT_GPIO=17 +#CONFIG_ETH_RMII_CLK_INPUT=y +#CONFIG_ETH_RMII_CLK_IN_GPIO=n + +CONFIG_ETH_DMA_BUFFER_SIZE=512 +CONFIG_ETH_DMA_RX_BUFFER_NUM=10 +CONFIG_ETH_DMA_TX_BUFFER_NUM=10 + +# Include SPI drivers in case used in build CONFIG_ETH_USE_SPI_ETHERNET=y -# CONFIG_ETH_SPI_ETHERNET_DM9051 is not set -# CONFIG_ETH_SPI_ETHERNET_W5500 is not set -# CONFIG_ETH_USE_OPENETH is not set +CONFIG_ETH_SPI_ETHERNET_DM9051=y +CONFIG_ETH_SPI_ETHERNET_W5500=y +CONFIG_ETH_USE_OPENETH=y # end of Ethernet # @@ -444,7 +462,7 @@ CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y CONFIG_ESP_SYSTEM_SINGLE_CORE_MODE=n CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y -CONFIG_ESP_SYSTEM_PD_FLASH=y +CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y # # High resolution timer (esp_timer) @@ -490,10 +508,10 @@ CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y # # PHY # -CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y +CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set -CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 -CONFIG_ESP32_PHY_MAX_TX_POWER=20 +CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 +CONFIG_ESP_PHY_MAX_TX_POWER=20 # end of PHY # @@ -840,7 +858,7 @@ CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y CONFIG_MBEDTLS_SSL_PROTO_DTLS=y CONFIG_MBEDTLS_SSL_ALPN=y -CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS is not set CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y diff --git a/targets/ESP32/_Network/CMakeLists.txt b/targets/ESP32/_Network/CMakeLists.txt index 0544c5be37..c198292b63 100644 --- a/targets/ESP32/_Network/CMakeLists.txt +++ b/targets/ESP32/_Network/CMakeLists.txt @@ -3,13 +3,13 @@ # See LICENSE file in the project root for full license information. # -option(ESP32_ETHERNET_SUPPORT "Enable ESP32 ethenet" OFF) +option(ESP32_ETHERNET_SUPPORT "Enable ESP32 ethernet" OFF) configure_file(${CMAKE_CURRENT_SOURCE_DIR}/esp32_ethernet_options.h.in ${CMAKE_BINARY_DIR}/targets/${RTOS}/${TARGET_BOARD}/esp32_ethernet_options.h @ONLY) # append networking files, if enabled -list(APPEND TARGET_ESP32_IDF_NETWORK_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/NF_ESP32_Ethernet_Lan8720.cpp) +list(APPEND TARGET_ESP32_IDF_NETWORK_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/NF_ESP32_Ethernet.cpp) list(APPEND TARGET_ESP32_IDF_NETWORK_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/NF_ESP32_Wireless.cpp) list(APPEND TARGET_ESP32_IDF_NETWORK_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/NF_ESP32_SmartConfig.cpp) diff --git a/targets/ESP32/_Network/NF_ESP32_Ethernet.cpp b/targets/ESP32/_Network/NF_ESP32_Ethernet.cpp new file mode 100644 index 0000000000..7600e2b0b9 --- /dev/null +++ b/targets/ESP32/_Network/NF_ESP32_Ethernet.cpp @@ -0,0 +1,177 @@ +// +// Copyright (c) .NET Foundation and Contributors +// See LICENSE file in the project root for full license information. +// + +// This file includes the board specific Ethernet Intialisation + +#include +#include + +esp_eth_handle_t eth_handle = NULL; + +// OLIMEX ESP32-EVB Rev B, OLIMEX ESP32-Gateway, Generic Lan8270 +// ETH_PHY_ADDR 0 +// ETH_MDC_GPIO 23 +// ETH_MDIO_GPIO 18 + +// OLIMEX POE and LILYGO use ETH_RMII_CLK_OUT_GPIO 17 +// OLIMEX POE use ETH_PHY_RST_GPIO 12 +// OLIMEX gateway revs newer than C use ETH_PHY_RST_GPIO 5 + +// default values for ESP32 boards +// values taken from IDF CONFIG files + +#ifndef ESP32_ETHERNET_INTERNAL +// Use internal Ethernet +#define ESP32_ETHERNET_INTERNAL +#endif + +#ifndef ETH_PHY_ADDR +// PHY address +#define ETH_PHY_ADDR 0 +#endif + +#ifndef ETH_MDC_GPIO +// GPIO number used by SMI MDC +#define ETH_MDC_GPIO 23 +#endif + +#ifndef ETH_MDIO_GPIO +// GPIO number used by SMI MDIO +#define ETH_MDIO_GPIO 18 +#endif + +#ifndef ETH_PHY_RST_GPIO +// GPIO number used to reset PHY chip. +#define ETH_PHY_RST_GPIO 5 +#endif + +esp_err_t NF_ESP32_InitialiseEthernet(uint8_t *pMacAdr) +{ + (void)pMacAdr; + +#ifdef ESP32_ETHERNET_SUPPORT + + esp_netif_config_t cfg = ESP_NETIF_DEFAULT_ETH(); + esp_netif_t *eth_netif = esp_netif_new(&cfg); + + // Set default handlers to process TCP/IP stuffs + ESP_ERROR_CHECK(esp_eth_set_default_handlers(eth_netif)); + + // now MAC and PHY configs + eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG(); + + eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG(); + phy_config.phy_addr = ETH_PHY_ADDR; + phy_config.reset_gpio_num = ETH_PHY_RST_GPIO; + +#ifdef ESP32_ETHERNET_INTERNAL + // Internal Ethernet + mac_config.smi_mdc_gpio_num = ETH_MDC_GPIO; + mac_config.smi_mdio_gpio_num = ETH_MDIO_GPIO; + esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&mac_config); + + // Define PHY to use with internal Ethernet +#ifdef ESP32_ETHERNET_PHY_IP101 + esp_eth_phy_t *phy = esp_eth_phy_new_ip101(&phy_config); +#elif defined(ESP32_ETHERNET_PHY_RTL8201) + esp_eth_phy_t *phy = esp_eth_phy_new_rtl8201(&phy_config); +#elif defined(ESP32_ETHERNET_PHY_LAN8720) + ESP_LOGI("ETH", "Ethernet Lan8720 phy, phy adr %d power %d\n", ETH_PHY_ADDR, ETH_PHY_RST_GPIO); + esp_eth_phy_t *phy = esp_eth_phy_new_lan8720(&phy_config); +#elif defined(ESP32_ETHERNET_PHY_DP83848) + esp_eth_phy_t *phy = esp_eth_phy_new_dp83848(&phy_config); +#elif defined(ESP32_ETHERNET_PHY_KSZ8041) + esp_eth_phy_t *phy = esp_eth_phy_new_ksz8041(&phy_config); +#endif + +#elif ESP32_ETHERNET_SPI + // Or Use SPI ethernet module + + // Initialise SPI bus + gpio_install_isr_service(0); + spi_device_handle_t spi_handle = NULL; + spi_bus_config_t buscfg = { + .miso_io_num = ESP32_ETHERNET_SPI_MISO_GPIO, + .mosi_io_num = ESP32_ETHERNET_SPI_MOSI_GPIO, + .sclk_io_num = ESP32_ETHERNET_SPI_SCLK_GPIO, + .quadwp_io_num = -1, + .quadhd_io_num = -1, + }; + ESP_ERROR_CHECK(spi_bus_initialize(CONFIG_EXAMPLE_ETH_SPI_HOST, &buscfg, 1)); + + // Define SPI interface to use +#if (ESP32_ETHERNET_SPI_MODULE == DM9051) + spi_device_interface_config_t devcfg = { + .command_bits = 1, + .address_bits = 7, + .mode = 0, + .clock_speed_hz = ESP32_ETHERNET_SPI_CLOCK_MHZ * 1000 * 1000, + .spics_io_num = ESP32_ETHERNET_SPI_CS, + .queue_size = 20}; + ESP_ERROR_CHECK(spi_bus_add_device(CONFIG_EXAMPLE_ETH_SPI_HOST, &devcfg, &spi_handle)); + /* dm9051 ethernet driver is based on spi driver */ + eth_dm9051_config_t dm9051_config = ETH_DM9051_DEFAULT_CONFIG(spi_handle); + dm9051_config.int_gpio_num = ESP32_ETHERNET_SPI_INT_GPIO; + esp_eth_mac_t *mac = esp_eth_mac_new_dm9051(&dm9051_config, &mac_config); + +#elif (ESP32_ETHERNET_SPI_MODULE == W5500) + // Use W5500 in mac mode + spi_device_interface_config_t devcfg = { + .command_bits = 16, // Actually it's the address phase in W5500 SPI frame + .address_bits = 8, // Actually it's the control phase in W5500 SPI frame + .mode = 0, + .clock_speed_hz = ESP32_ETHERNET_SPI_CLOCK_MHZ * 1000 * 1000, + .spics_io_num = ESP32_ETHERNET_SPI_CS, + .queue_size = 20}; + ESP_ERROR_CHECK(spi_bus_add_device(CONFIG_EXAMPLE_ETH_SPI_HOST, &devcfg, &spi_handle)); + // w5500 ethernet driver is based on spi driver + eth_w5500_config_t w5500_config = ETH_W5500_DEFAULT_CONFIG(spi_handle); + w5500_config.int_gpio_num = ESP32_ETHERNET_SPI_INT_GPIO; + esp_eth_mac_t *mac = esp_eth_mac_new_w5500(&w5500_config, &mac_config); + esp_eth_phy_t *phy = esp_eth_phy_new_w5500(&phy_config); +#else + // No SPI module defined + +#endif +#endif // CONFIG_ETH_USE_SPI_ETHERNET + + // now the do the Ethernet config + esp_eth_config_t config = ETH_DEFAULT_CONFIG(mac, phy); + ESP_ERROR_CHECK(esp_eth_driver_install(&config, ð_handle)); + +#ifndef ESP32_ETHERNET_INTERNAL + // The SPI Ethernet module might doesn't have a burned factory MAC address, we have to set it manually. + // Supplied in the config + ESP_ERROR_CHECK(esp_eth_ioctl(eth_handle, ETH_CMD_S_MAC_ADDR, pMacAdr)); +#endif + + // attach Ethernet driver to TCP/IP stack + ESP_ERROR_CHECK(esp_netif_attach(eth_netif, esp_eth_new_netif_glue(eth_handle))); + + // start Ethernet driver state machine + ESP_ERROR_CHECK(esp_eth_start(eth_handle)); + +#endif // ESP32_ETHERNET_SUPPORT + return ESP_OK; +} + +// +// Open Ethernet Network driver +// +int NF_ESP32_Ethernet_Open(HAL_Configuration_NetworkInterface *config) +{ + if (NF_ESP32_InitialiseEthernet(config->MacAddress) == ESP_OK) + { + // Return NetIf number for Esp32 Ethernet + return NF_ESP32_Wait_NetNumber(IDF_ETH_DEF); + } + + return SOCK_SOCKET_ERROR; +} + +bool NF_ESP32_Ethernet_Close() +{ + return esp_eth_stop(eth_handle) == ESP_OK; +} diff --git a/targets/ESP32/_Network/NF_ESP32_Ethernet_Lan8720.cpp b/targets/ESP32/_Network/NF_ESP32_Ethernet_Lan8720.cpp deleted file mode 100644 index a34874e046..0000000000 --- a/targets/ESP32/_Network/NF_ESP32_Ethernet_Lan8720.cpp +++ /dev/null @@ -1,103 +0,0 @@ -// -// Copyright (c) .NET Foundation and Contributors -// See LICENSE file in the project root for full license information. -// - -// This file includes the board specific Ethernet Intialisation - -#include -#include - -esp_eth_handle_t eth_handle = NULL; - -// OLIMEX ESP32-EVB Rev B, OLIMEX ESP32-Gateway, Generic Lan8270 -// ETH_PHY_ADDR 0 -// ETH_MDC_GPIO 23 -// ETH_MDIO_GPIO 18 - -// OLIMEX POE and LILYGO use ETH_RMII_CLK_OUT_GPIO 17 -// OLIMEX POE use ETH_PHY_RST_GPIO 12 -// OLIMEX gateway revs newer than C use ETH_PHY_RST_GPIO 5 - -// default values for ESP32 boards -// values taken from IDF KCONFIG files - -#ifndef ETH_PHY_ADDR -// PHY address -#define ETH_PHY_ADDR 1 -#endif - -#ifndef ETH_MDC_GPIO -// GPIO number used by SMI MDC -#define ETH_MDC_GPIO 23 -#endif - -#ifndef ETH_MDIO_GPIO -// GPIO number used by SMI MDIO -#define ETH_MDIO_GPIO 18 -#endif - -#ifndef ETH_PHY_RST_GPIO -// GPIO number used to reset PHY chip. -#define ETH_PHY_RST_GPIO 5 -#endif - -esp_err_t NF_ESP32_InitialiseEthernet(uint8_t *pMacAdr) -{ - (void)pMacAdr; - -#ifdef ESP32_ETHERNET_SUPPORT - - esp_netif_config_t cfg = ESP_NETIF_DEFAULT_ETH(); - esp_netif_t *eth_netif = esp_netif_new(&cfg); - // Set default handlers to process TCP/IP stuffs - ESP_ERROR_CHECK(esp_eth_set_default_handlers(eth_netif)); - - // now MAC and PHY configs - eth_mac_config_t mac_config = ETH_MAC_DEFAULT_CONFIG(); - - eth_phy_config_t phy_config = ETH_PHY_DEFAULT_CONFIG(); - phy_config.phy_addr = ETH_PHY_ADDR; - phy_config.reset_gpio_num = ETH_PHY_RST_GPIO; - - mac_config.smi_mdc_gpio_num = ETH_MDC_GPIO; - mac_config.smi_mdio_gpio_num = ETH_MDIO_GPIO; - - esp_eth_mac_t *mac = esp_eth_mac_new_esp32(&mac_config); - - esp_eth_phy_t *phy = esp_eth_phy_new_lan8720(&phy_config); - - // now the ETH config - esp_eth_config_t config = ETH_DEFAULT_CONFIG(mac, phy); - - ESP_ERROR_CHECK(esp_eth_driver_install(&config, ð_handle)); - - // attach Ethernet driver to TCP/IP stack - ESP_ERROR_CHECK(esp_netif_attach(eth_netif, esp_eth_new_netif_glue(eth_handle))); - - // start Ethernet driver state machine - ESP_ERROR_CHECK(esp_eth_start(eth_handle)); - -#endif - - return ESP_OK; -} - -// -// Open Ethernet Network driver -// -int NF_ESP32_Ethernet_Open(HAL_Configuration_NetworkInterface *config) -{ - if (NF_ESP32_InitialiseEthernet(config->MacAddress) == ESP_OK) - { - // Return NetIf number for Esp32 wireless station - return NF_ESP32_Wait_NetNumber(IDF_WIFI_STA_DEF); - } - - return SOCK_SOCKET_ERROR; -} - -bool NF_ESP32_Ethernet_Close() -{ - return esp_eth_stop(eth_handle) == ESP_OK; -} diff --git a/targets/ESP32/_Network/esp32_ethernet_options.h.in b/targets/ESP32/_Network/esp32_ethernet_options.h.in index 15f32a9498..bb4514982e 100644 --- a/targets/ESP32/_Network/esp32_ethernet_options.h.in +++ b/targets/ESP32/_Network/esp32_ethernet_options.h.in @@ -8,11 +8,47 @@ // Any changes you make here will be overwritten when it's generated again. // ////////////////////////////////////////////////////////////////////////////// -#ifndef ESP32_ETHERNET_LAN8720_H -#define ESP32_ETHERNET_LAN8720_H +#ifndef ESP32_ETHERNET_OPTIONS_H +#define ESP32_ETHERNET_OPTIONS_H #cmakedefine ESP32_ETHERNET_SUPPORT -#cmakedefine ESP32_CONFIG_PHY_CLOCK_MODE @ESP32_CONFIG_PHY_CLOCK_MODE@ -#cmakedefine ESP32_CONFIG_PIN_PHY_POWER @ESP32_CONFIG_PIN_PHY_POWER@ +#cmakedefine ETH_RMII_CLK_OUT_GPIO @ETH_RMII_CLK_OUT_GPIO@ +#cmakedefine ETH_PHY_RST_GPIO @ETH_PHY_RST_GPIO@ -#endif // ESP32_ETHERNET_LAN8720_H +// TODO this doesn't get defined when ETH_PHY_ADD = 0 +// Default for Phy adr is 0 +#cmakedefine ETH_PHY_ADDR @ETH_PHY_ADDR@ + + +// Use internal ethernet +#define ESP32_ETHERNET_INTERNAL + +// Select one of following PHY for Internal Ethernet +#define ESP32_ETHERNET_PHY_LAN8720 +//#define ESP32_ETHERNET_PHY_IP101 +//#define ESP32_ETHERNET_PHY_RTL8201 +//#define ESP32_ETHERNET_PHY_DP83848 +//#define ESP32_ETHERNET_PHY_KSZ8041 + + + +#ifndef ESP32_ETHERNET_INTERNAL +// Experimental SPI (Untested) +// Use SPI Ethernet module +// Comment out ESP32_ETHERNET_INTERNAL and define correct following information for your setup +//#define ESP32_ETHERNET_SPI +//#define ESP32_ETHERNET_SPI_CLOCK_MHZ 8 +//#define ESP32_ETHERNET_SPI_CS 15 +//#define ESP32_ETHERNET_SPI_INT_GPIO 16 + +// Define SPI pins to use +//#define ESP32_ETHERNET_SPI_MISO_GPIO 23 +//#define ESP32_ETHERNET_SPI_MOSI_GPIO 18 +//#define ESP32_ETHERNET_SPI_SCLK_GPIO 19 + +// One of following modules +//#define ESP32_ETHERNET_SPI_MODULE_W5500 +//#define ESP32_ETHERNET_SPI_MODULE_DM9051 +#endif + +#endif // ESP32_ETHERNET_OPTIONS_H diff --git a/targets/ESP32/_common/WireProtocol_HAL_Interface.c b/targets/ESP32/_common/WireProtocol_HAL_Interface.c index 1487387bed..76d1c51473 100644 --- a/targets/ESP32/_common/WireProtocol_HAL_Interface.c +++ b/targets/ESP32/_common/WireProtocol_HAL_Interface.c @@ -69,7 +69,7 @@ void WP_Cdc_Rx_Callback(int itf, cdcacm_event_t *event) BaseType_t shouldWakeHigherPriorityTask = pdFALSE; // signal data received - vTaskNotifyGiveFromISR(&ReceiverTask, &shouldWakeHigherPriorityTask); + vTaskNotifyGiveFromISR(ReceiverTask, &shouldWakeHigherPriorityTask); portYIELD_FROM_ISR(shouldWakeHigherPriorityTask); } diff --git a/targets/ESP32/_common/targetHAL.c b/targets/ESP32/_common/targetHAL.c index 0bb9f44be7..1b0fbb666d 100644 --- a/targets/ESP32/_common/targetHAL.c +++ b/targets/ESP32/_common/targetHAL.c @@ -42,3 +42,9 @@ inline TARGET_IFU_CAPABLE(false); // Mutex for GLOBAL_LOCK / GLOBAL_UNLOCK portMUX_TYPE globalLockMutex = portMUX_INITIALIZER_UNLOCKED; + +// ESP32 targets can't change MAC Address +bool Target_CanChangeMacAddress() +{ + return false; +} diff --git a/targets/ESP32/_common/targetHAL_ConfigurationManager.cpp b/targets/ESP32/_common/targetHAL_ConfigurationManager.cpp index e55eb92ce3..8c8a9caac9 100644 --- a/targets/ESP32/_common/targetHAL_ConfigurationManager.cpp +++ b/targets/ESP32/_common/targetHAL_ConfigurationManager.cpp @@ -10,6 +10,8 @@ #include #include +bool ethernetEnabled = false; + // NVS parameters for Interface config #define NVS_NAMESPACE "nanoF" @@ -158,6 +160,7 @@ void ConfigurationManager_EnumerateConfigurationBlocks() // ESP32 can have has much as 3 network interfaces: Wireless Station, Wireless AP and Ethernet #ifdef ESP32_ETHERNET_SUPPORT networkCount = 3; + ethernetEnabled = true; #else networkCount = 2; #endif @@ -286,8 +289,16 @@ void InitialiseWirelessDefaultConfig(HAL_Configuration_Wireless80211 *config, ui // Set default to Auto Connect + Enable + WirelessFlags_SmartConfig so station can be started by default // Once smart config has run will start up automatically and reconnect of disconnected // Application will have to disable Wi-Fi to save power etc - config->Options = - (Wireless80211Configuration_ConfigurationOptions)(Wireless80211Configuration_ConfigurationOptions_AutoConnect | Wireless80211Configuration_ConfigurationOptions_Enable | Wireless80211Configuration_ConfigurationOptions_SmartConfig); + // if Ethernet enable then disable + if (ethernetEnabled) + { + config->Options = Wireless80211Configuration_ConfigurationOptions_Disable; + } + else + { + config->Options = + (Wireless80211Configuration_ConfigurationOptions)(Wireless80211Configuration_ConfigurationOptions_AutoConnect | Wireless80211Configuration_ConfigurationOptions_Enable | Wireless80211Configuration_ConfigurationOptions_SmartConfig); + } } // Default initialisation of wireless config blocks for ESP32 targets diff --git a/targets/ESP32/_common/targetHAL_Network.cpp b/targets/ESP32/_common/targetHAL_Network.cpp index 3611996b52..c42ad6e970 100644 --- a/targets/ESP32/_common/targetHAL_Network.cpp +++ b/targets/ESP32/_common/targetHAL_Network.cpp @@ -9,6 +9,7 @@ #include "lwIP_Sockets.h" #include "apps/sntp.h" #include +#include "target_platform.h" extern "C" void set_signal_sock_function(void (*funcPtr)()); diff --git a/targets/ESP32/_Include/CLR_Startup_Thread.h b/targets/ESP32/_include/CLR_Startup_Thread.h similarity index 100% rename from targets/ESP32/_Include/CLR_Startup_Thread.h rename to targets/ESP32/_include/CLR_Startup_Thread.h diff --git a/targets/ESP32/_Include/CMakeLists.txt b/targets/ESP32/_include/CMakeLists.txt similarity index 100% rename from targets/ESP32/_Include/CMakeLists.txt rename to targets/ESP32/_include/CMakeLists.txt diff --git a/targets/ESP32/_Include/Esp32_DeviceMapping.h b/targets/ESP32/_include/Esp32_DeviceMapping.h similarity index 100% rename from targets/ESP32/_Include/Esp32_DeviceMapping.h rename to targets/ESP32/_include/Esp32_DeviceMapping.h diff --git a/targets/ESP32/_Include/LaunchCLR.h b/targets/ESP32/_include/LaunchCLR.h similarity index 100% rename from targets/ESP32/_Include/LaunchCLR.h rename to targets/ESP32/_include/LaunchCLR.h diff --git a/targets/ESP32/_Include/NF_ESP32_Network.h b/targets/ESP32/_include/NF_ESP32_Network.h similarity index 100% rename from targets/ESP32/_Include/NF_ESP32_Network.h rename to targets/ESP32/_include/NF_ESP32_Network.h diff --git a/targets/ESP32/_Include/TargetHAL_Spi.h b/targets/ESP32/_include/TargetHAL_Spi.h similarity index 100% rename from targets/ESP32/_Include/TargetHAL_Spi.h rename to targets/ESP32/_include/TargetHAL_Spi.h diff --git a/targets/ESP32/_Include/TargetPAL_BlockStorage.h b/targets/ESP32/_include/TargetPAL_BlockStorage.h similarity index 100% rename from targets/ESP32/_Include/TargetPAL_BlockStorage.h rename to targets/ESP32/_include/TargetPAL_BlockStorage.h diff --git a/targets/ESP32/_Include/Target_BlockStorage_Esp32FlashDriver.h b/targets/ESP32/_include/Target_BlockStorage_Esp32FlashDriver.h similarity index 100% rename from targets/ESP32/_Include/Target_BlockStorage_Esp32FlashDriver.h rename to targets/ESP32/_include/Target_BlockStorage_Esp32FlashDriver.h diff --git a/targets/ESP32/_Include/Target_Windows_Storage.h b/targets/ESP32/_include/Target_Windows_Storage.h similarity index 100% rename from targets/ESP32/_Include/Target_Windows_Storage.h rename to targets/ESP32/_include/Target_Windows_Storage.h diff --git a/targets/ESP32/_Include/WireProtocol_ReceiverThread.h b/targets/ESP32/_include/WireProtocol_ReceiverThread.h similarity index 100% rename from targets/ESP32/_Include/WireProtocol_ReceiverThread.h rename to targets/ESP32/_include/WireProtocol_ReceiverThread.h diff --git a/targets/ESP32/_Include/esp32_idf.h b/targets/ESP32/_include/esp32_idf.h similarity index 98% rename from targets/ESP32/_Include/esp32_idf.h rename to targets/ESP32/_include/esp32_idf.h index d085879abd..7f0161e4b6 100644 --- a/targets/ESP32/_Include/esp32_idf.h +++ b/targets/ESP32/_include/esp32_idf.h @@ -22,7 +22,6 @@ // network #include -#include #include #include #include diff --git a/targets/ESP32/_Include/lwipopts.h b/targets/ESP32/_include/lwipopts.h similarity index 100% rename from targets/ESP32/_Include/lwipopts.h rename to targets/ESP32/_include/lwipopts.h diff --git a/targets/ESP32/_Include/platform_target_capabilities.h b/targets/ESP32/_include/platform_target_capabilities.h similarity index 100% rename from targets/ESP32/_Include/platform_target_capabilities.h rename to targets/ESP32/_include/platform_target_capabilities.h diff --git a/targets/ESP32/_Include/targetHAL.h b/targets/ESP32/_include/targetHAL.h similarity index 100% rename from targets/ESP32/_Include/targetHAL.h rename to targets/ESP32/_include/targetHAL.h diff --git a/targets/ESP32/_Include/targetHAL_ConfigStorage.h b/targets/ESP32/_include/targetHAL_ConfigStorage.h similarity index 100% rename from targets/ESP32/_Include/targetHAL_ConfigStorage.h rename to targets/ESP32/_include/targetHAL_ConfigStorage.h diff --git a/targets/ESP32/_Include/targetHAL_Power.h b/targets/ESP32/_include/targetHAL_Power.h similarity index 100% rename from targets/ESP32/_Include/targetHAL_Power.h rename to targets/ESP32/_include/targetHAL_Power.h diff --git a/targets/ESP32/_Include/targetHAL_Time.h b/targets/ESP32/_include/targetHAL_Time.h similarity index 100% rename from targets/ESP32/_Include/targetHAL_Time.h rename to targets/ESP32/_include/targetHAL_Time.h diff --git a/targets/ESP32/_Include/targetPAL.h b/targets/ESP32/_include/targetPAL.h similarity index 100% rename from targets/ESP32/_Include/targetPAL.h rename to targets/ESP32/_include/targetPAL.h diff --git a/targets/ESP32/_Include/targetPAL_Time.h b/targets/ESP32/_include/targetPAL_Time.h similarity index 100% rename from targets/ESP32/_Include/targetPAL_Time.h rename to targets/ESP32/_include/targetPAL_Time.h diff --git a/targets/ESP32/_nanoCLR/System.Device.I2c/sys_dev_i2c_native_System_Device_I2c_I2cDevice.cpp b/targets/ESP32/_nanoCLR/System.Device.I2c/sys_dev_i2c_native_System_Device_I2c_I2cDevice.cpp index 2dba2d8d90..6729da939d 100644 --- a/targets/ESP32/_nanoCLR/System.Device.I2c/sys_dev_i2c_native_System_Device_I2c_I2cDevice.cpp +++ b/targets/ESP32/_nanoCLR/System.Device.I2c/sys_dev_i2c_native_System_Device_I2c_I2cDevice.cpp @@ -53,13 +53,8 @@ HRESULT Library_sys_dev_i2c_native_System_Device_I2c_I2cDevice::NativeInit___VOI // If this is first device on Bus then init driver if (Esp_I2C_Initialised_Flag[bus] == 0) { - // install driver in RAM to prevent issues with PSRAM cache - esp_err_t res = i2c_driver_install( - bus, - I2C_MODE_MASTER, - I2C_MASTER_RX_BUF_DISABLE, - I2C_MASTER_TX_BUF_DISABLE, - ESP_INTR_FLAG_IRAM); + esp_err_t res = + i2c_driver_install(bus, I2C_MODE_MASTER, I2C_MASTER_RX_BUF_DISABLE, I2C_MASTER_TX_BUF_DISABLE, 0); if (res != ESP_OK) { @@ -177,9 +172,12 @@ HRESULT Library_sys_dev_i2c_native_System_Device_I2c_I2cDevice:: // setup write transaction i2c_master_start(cmd); i2c_master_write_byte(cmd, (slaveAddress << 1) | I2C_MASTER_WRITE, ACK_CHECK_EN); - opResult = i2c_master_write(cmd, writeBuffer, writeSize, true); - ASSERT(opResult == ESP_OK); + opResult = i2c_master_write(cmd, writeBuffer, writeSize, true); + if (opResult != ESP_OK) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_OPERATION); + } } } } @@ -216,8 +214,10 @@ HRESULT Library_sys_dev_i2c_native_System_Device_I2c_I2cDevice:: // read all bytes with ACK except the last one opResult = i2c_master_read(cmd, readBuffer, readSize, I2C_MASTER_LAST_NACK); - - ASSERT(opResult == ESP_OK); + if (opResult != ESP_OK) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_OPERATION); + } } } } @@ -225,6 +225,12 @@ HRESULT Library_sys_dev_i2c_native_System_Device_I2c_I2cDevice:: i2c_master_stop(cmd); opResult = i2c_master_cmd_begin(bus, cmd, 1000 / portTICK_RATE_MS); + + if (opResult != ESP_OK && opResult != ESP_FAIL && opResult != ESP_ERR_TIMEOUT) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_OPERATION); + } + i2c_cmd_link_delete(cmd); // create return object @@ -232,7 +238,6 @@ HRESULT Library_sys_dev_i2c_native_System_Device_I2c_I2cDevice:: g_CLR_RT_ExecutionEngine.NewObjectFromIndex(top, g_CLR_RT_WellKnownTypes.m_I2cTransferResult)); result = top.Dereference(); - FAULT_ON_NULL(result); if (opResult != ESP_OK) diff --git a/targets/ESP32/_nanoCLR/System.Device.Pwm/sys_dev_pwm_native_System_Device_Pwm_PwmChannel.cpp b/targets/ESP32/_nanoCLR/System.Device.Pwm/sys_dev_pwm_native_System_Device_Pwm_PwmChannel.cpp index d4d7482db4..38ca4aaee5 100644 --- a/targets/ESP32/_nanoCLR/System.Device.Pwm/sys_dev_pwm_native_System_Device_Pwm_PwmChannel.cpp +++ b/targets/ESP32/_nanoCLR/System.Device.Pwm/sys_dev_pwm_native_System_Device_Pwm_PwmChannel.cpp @@ -152,7 +152,7 @@ HRESULT sys_dev_pwm_native_System_Device_Pwm_PwmChannelHelpers::ConfigureAndStar // Work out the duty Cycle for the current duty resolution dutyCycle = CalculateDuty(timerId, dutyCycle, polarity); - ledc_conf = {pinNumber, mode, channel, LEDC_INTR_DISABLE, timer_sel, dutyCycle, 0}; + ledc_conf = {pinNumber, mode, channel, LEDC_INTR_DISABLE, timer_sel, dutyCycle, 0, 0}; // Configure Channel which will also start it IDF_ERROR(ledc_channel_config(&ledc_conf)); diff --git a/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp b/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp index a4783dd511..ba52f44f28 100644 --- a/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp +++ b/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp @@ -8,9 +8,6 @@ #include "sys_io_ser_native_target.h" #include -// UART buffer size: 256 bytes -#define UART_BUFER_SIZE 256 - // in UWP the COM ports are named COM1, COM2, COM3. But ESP32 uses internally UART0, UART1, UART2. This maps the port // index 1, 2 or 3 to the uart number 0, 1 or 2 #define PORT_INDEX_TO_UART_NUM(portIndex) ((portIndex)-1) @@ -293,6 +290,76 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_BytesToRead___ NANOCLR_NOCLEANUP(); } +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_InvertSignalLevels___BOOLEAN(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + NF_PAL_UART *palUart = NULL; + uart_port_t uart_num; + + // get a pointer to the managed object instance and check that it's not NULL + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); + + if (pThis[FIELD___disposed].NumericByRef().u1 != 0) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OBJECT_DISPOSED); + } + + // Get UART number for serial device + uart_num = (uart_port_t)PORT_INDEX_TO_UART_NUM(pThis[FIELD___portIndex].NumericByRef().s4); + + // get pointer to PAL UART + palUart = GetPalUartFromUartNum_sys(uart_num); + if (palUart == NULL) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); + } + + stack.SetResult_Boolean(palUart->SignalLevelsInverted); + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::set_InvertSignalLevels___VOID__BOOLEAN( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + NF_PAL_UART *palUart = NULL; + uart_port_t uart_num; + + // get a pointer to the managed object instance and check that it's not NULL + CLR_RT_HeapBlock *pThis = stack.This(); + FAULT_ON_NULL(pThis); + + if (pThis[FIELD___disposed].NumericByRef().u1 != 0) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OBJECT_DISPOSED); + } + + // Get UART number for serial device + uart_num = (uart_port_t)PORT_INDEX_TO_UART_NUM(pThis[FIELD___portIndex].NumericByRef().s4); + + // get pointer to PAL UART + palUart = GetPalUartFromUartNum_sys(uart_num); + if (palUart == NULL) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); + } + + // check if UART it's already opened + if (palUart->SerialDevice) + { + // it is opened, so we can't change the signal levels + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_OPERATION); + } + + palUart->SignalLevelsInverted = (bool)stack.Arg1().NumericByRef().u1; + + NANOCLR_NOCLEANUP(); +} + HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Read___I4__SZARRAY_U1__I4__I4(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -671,7 +738,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR // check if this is a long running operation palUart->IsLongRunning = IsLongRunningOperation_sys( - length, + count, (uint32_t)pThis[FIELD___baudRate].NumericByRef().s4, (uint32_t &)estimatedDurationMiliseconds); @@ -685,13 +752,13 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR // this is a long running operation and // push to the stack how many bytes bytes where buffered for Tx - stack.PushValueI4(length); + stack.PushValueI4(count); // store pointer palUart->TxBuffer = data; // set TX count - palUart->TxOngoingCount = length; + palUart->TxOngoingCount = count; // Create a task to handle UART event from ISR char task_name[16]; @@ -713,7 +780,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR // Write data to ring buffer to start sending // by design: don't bother checking the return value - uart_write_bytes(uart_num, (const char *)data, length); + uart_write_bytes(uart_num, (const char *)data, count); } } @@ -790,6 +857,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( char task_name[16]; uart_port_t uart_num; esp_err_t esp_err; + int32_t bufferSize; NF_PAL_UART *palUart; @@ -821,8 +889,9 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); } - // alloc buffers memory - palUart->RxBuffer = (uint8_t *)platform_malloc(UART_BUFER_SIZE); + // alloc buffer memory + bufferSize = pThis[FIELD___bufferSize].NumericByRef().s4; + palUart->RxBuffer = (uint8_t *)platform_malloc(bufferSize); // sanity check if (palUart->RxBuffer == NULL) @@ -831,7 +900,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( } // init buffer - palUart->RxRingBuffer.Initialize(palUart->RxBuffer, UART_BUFER_SIZE); + palUart->RxRingBuffer.Initialize(palUart->RxBuffer, bufferSize); // set/reset all the rest palUart->SerialDevice = stack.This(); @@ -839,12 +908,13 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( palUart->TxOngoingCount = 0; palUart->RxBytesToRead = 0; palUart->NewLineChar = 0; + palUart->SignalLevelsInverted = 0; // Install driver esp_err = uart_driver_install( uart_num, // rx_buffer_size - UART_BUFER_SIZE, + bufferSize, // tx_buffer_size, not buffered 0, // queue_size @@ -1017,6 +1087,33 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeConfig___VOI ESP_LOGE(TAG, "Failed to set UART parameters configuration"); NANOCLR_SET_AND_LEAVE(CLR_E_FAIL); } + + //////////////////////////////////////////////////////////////////////////// + // signal level inversion can only be configured when UART is not running // + //////////////////////////////////////////////////////////////////////////// + + // default is to not invert + uart_signal_inv_t inversionMmask = UART_SIGNAL_INV_DISABLE; + + // get pointer to PAL UART + NF_PAL_UART *palUart = GetPalUartFromUartNum_sys(uart_num); + if (palUart == NULL) + { + NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); + } + + // check if signal levels are to be inverted + if (palUart->SignalLevelsInverted) + { + inversionMmask = (uart_signal_inv_t)(UART_SIGNAL_RXD_INV | UART_SIGNAL_TXD_INV); + } + + // config signal inversion (or not) + if (uart_set_line_inverse(uart_num, inversionMmask) != ESP_OK) + { + ESP_LOGE(TAG, "Failed to set UART parameters configuration"); + NANOCLR_SET_AND_LEAVE(CLR_E_FAIL); + } } if (EnableXonXoff) diff --git a/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h b/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h index 49b6d39e0b..c3e5a13e19 100644 --- a/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h +++ b/targets/ESP32/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h @@ -25,6 +25,7 @@ typedef struct uint16_t RxBytesToRead; bool IsLongRunning; + bool SignalLevelsInverted; uint8_t NewLineChar; } NF_PAL_UART; diff --git a/targets/ESP32/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_Windows_Devices_Gpio_GpioChangeCounter.cpp b/targets/ESP32/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_Windows_Devices_Gpio_GpioChangeCounter.cpp index e63b4a7f34..73f030789a 100644 --- a/targets/ESP32/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_Windows_Devices_Gpio_GpioChangeCounter.cpp +++ b/targets/ESP32/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_Windows_Devices_Gpio_GpioChangeCounter.cpp @@ -6,6 +6,7 @@ #include "win_dev_gpio_native.h" #include +#include // need to define this if not already defined by IDF #ifndef PCNT_STATUS_H_LIM_M diff --git a/targets/ESP32/_nanoCLR/Windows.Devices.Pwm/win_dev_pwm_native_Windows_Devices_Pwm_PwmPin.cpp b/targets/ESP32/_nanoCLR/Windows.Devices.Pwm/win_dev_pwm_native_Windows_Devices_Pwm_PwmPin.cpp index 796a40b1b9..2c71823fbe 100644 --- a/targets/ESP32/_nanoCLR/Windows.Devices.Pwm/win_dev_pwm_native_Windows_Devices_Pwm_PwmPin.cpp +++ b/targets/ESP32/_nanoCLR/Windows.Devices.Pwm/win_dev_pwm_native_Windows_Devices_Pwm_PwmPin.cpp @@ -109,7 +109,7 @@ HRESULT ConfigureAndStart(CLR_RT_HeapBlock *pThis, bool create, bool noStart) // Work out the duty Cycle for the current duty resolution dutyCycle = CalculateDuty(timerId, dutyCycle, polarity); - ledc_channel_config_t ledc_conf{pinNumber, mode, channel, LEDC_INTR_DISABLE, timer_sel, dutyCycle, 0}; + ledc_channel_config_t ledc_conf{pinNumber, mode, channel, LEDC_INTR_DISABLE, timer_sel, dutyCycle, 0, 0}; // Configure Channel which will also start it IDF_ERROR(ledc_channel_config(&ledc_conf)); diff --git a/targets/ESP32/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp b/targets/ESP32/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp index 7dceb6b7c3..bc280ad1c8 100644 --- a/targets/ESP32/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp +++ b/targets/ESP32/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp @@ -102,13 +102,29 @@ bool CPU_SPI_Initialize(uint8_t spiBus) } spi_bus_config_t bus_config{ - mosi_io_num : (int)mosiPin, // mosi pin - miso_io_num : (int)misoPin, // miso pin - sclk_io_num : (int)clockPin, // Clock - quadwp_io_num : -1, // Quad Write protect - quadhd_io_num : -1, // Quad Hold - max_transfer_sz : 16384, // max transfer size - flags : 0, // SPICOMMON_BUSFLAG_* flags + + // mosi pin + mosi_io_num : (int)mosiPin, + // miso pin + miso_io_num : (int)misoPin, + // Clock + sclk_io_num : (int)clockPin, + // Quad Write protect (-1 not used) + quadwp_io_num : -1, + // Quad Hold + quadhd_io_num : -1, + // GPIO pin for spi data4 signal in octal mode, -1 if not used. + data4_io_num : -1, + // GPIO pin for spi data5 signal in octal mode, // -1 if not used. + data5_io_num : -1, + // GPIO pin for spi data6 signal in octal mode, // -1 if not used. + data6_io_num : -1, + // GPIO pin for spi data7 signal in octal mode, //-1 if not used. + data7_io_num : -1, + // max transfer size + max_transfer_sz : 16384, + // SPICOMMON_BUSFLAG_* flags + flags : 0, intr_flags : ESP_INTR_FLAG_IRAM }; @@ -185,7 +201,7 @@ spi_device_interface_config_t GetConfig(const SPI_DEVICE_CONFIGURATION &spiDevic // if clock frequency is unset use the maximum frequency if (clockHz == 0) { - clockHz = CPU_SPI_MaxClockFrequency(spiDeviceConfig.Spi_Bus); + CPU_SPI_MaxClockFrequency(spiDeviceConfig.Spi_Bus, &clockHz); } uint32_t flags = @@ -464,12 +480,17 @@ void CPU_SPI_GetPins(uint32_t spi_bus, GPIO_PIN &clockPin, GPIO_PIN &misoPin, GP } // Return SPI minimum clock frequency -uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MinClockFrequency(uint32_t spiBus, int32_t *frequency) { - (void)spi_bus; + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } // TODO check what is minimum ( Min clock that can be configured on chip) - return 20000000 / 256; + *frequency = 20000000 / 256; + + return S_OK; } // Return SPI maximum clock frequency @@ -478,25 +499,34 @@ uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus) // If using native SPI pins then maximum is 80mhz // if SPI pins are routed over GPIO matrix then 40mhz half duplex 26mhz full -uint32_t CPU_SPI_MaxClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MaxClockFrequency(uint32_t spiBus, int32_t *frequency) { + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } + bool directPin = false; GPIO_PIN clockPin, misoPin, mosiPin; - CPU_SPI_GetPins(spi_bus, clockPin, misoPin, mosiPin); + CPU_SPI_GetPins(spiBus, clockPin, misoPin, mosiPin); // Check if direct pins being used switch (clockPin) { case 14: if (misoPin == 12 && mosiPin == 13) + { directPin = true; + } break; case 18: if (misoPin == 19 && mosiPin == 23) + { directPin = true; + } break; default: @@ -505,10 +535,12 @@ uint32_t CPU_SPI_MaxClockFrequency(uint32_t spi_bus) if (directPin) { - return MAX_CLOCK_FREQUENCY_NATIVE; + *frequency = MAX_CLOCK_FREQUENCY_NATIVE; } - return MAX_CLOCK_FREQUENCY_GPIO_HALF; + *frequency = MAX_CLOCK_FREQUENCY_GPIO_HALF; + + return S_OK; } // diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/esp32_nimble.cpp b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/esp32_nimble.cpp index b277a7ff16..6249eb4467 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/esp32_nimble.cpp +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/esp32_nimble.cpp @@ -12,7 +12,7 @@ static const char *tag = "BLE"; static uint8_t esp32_addr_type; -void esp32_ble_start_advertise(ble_context *context); +void esp32_ble_start_advertise(ble_services_context *context); uint16_t ble_event_next_id = 1; device_ble_event_data ble_event_data; @@ -21,17 +21,31 @@ bool ble_initialized = false; // // Look up Attr_handle in characteristicsDefs table to find our characteristicsId // return 0xffff if not found otherwise characteristicsId -uint16_t FindIdFromHandle(ble_gatt_chr_def *characteristicsDefs, int countDefs, uint16_t attr_handle) +uint16_t FindIdFromHandle(ble_services_context *context, uint16_t attr_handle) { + bool found = false; uint16_t id = 0xffff; - for (int index = 0; index < countDefs; index++) + for (int service = 0; service < context->serviceCount; service++) { - // ESP_LOGI(tag, "FindIdFromHandle; find ah=%d - vh %d arg %d\n", attr_handle, - // *(characteristicsDefs[index].val_handle), (uint32_t)characteristicsDefs[index].arg ); - if (*(characteristicsDefs[index].val_handle) == attr_handle) + ble_context *srv = &context->bleSrvContexts[service]; + ble_gatt_chr_def *characteristicsDefs = srv->characteristicsDefs; + + // Check all characteristics except terminator (-1) + for (int index = 0; index < (srv->characteristicsCount - 1); index++) + { + // ESP_LOGI(tag, "FindIdFromHandle; find ah=%d - vh %d arg %d\n", attr_handle, + // *(characteristicsDefs[index].val_handle), (uint32_t)characteristicsDefs[index].arg ); + uint16_t *pValue = characteristicsDefs[index].val_handle; + if (pValue != 0 && *pValue == attr_handle) + { + id = (uint16_t)(uint32_t)characteristicsDefs[index].arg; + found = true; + break; + } + } + if (found) { - id = (uint16_t)(uint32_t)characteristicsDefs[index].arg; break; } } @@ -39,17 +53,30 @@ uint16_t FindIdFromHandle(ble_gatt_chr_def *characteristicsDefs, int countDefs, return id; } -uint16_t FindHandleIdFromId(ble_gatt_chr_def *characteristicsDefs, int countDefs, uint16_t characteristicId) +uint16_t FindHandleIdFromId(ble_services_context &context, uint16_t characteristicId) { + bool found = false; uint16_t handle = 0xffff; - for (int index = 0; index < countDefs; index++) + for (int service = 0; service < context.serviceCount; service++) { - // ESP_LOGI(tag, "FindHandleIdFromId; find ah=%d - vh %d arg %d\n", attr_handle, - // *(characteristicsDefs[index].val_handle), (uint32_t)characteristicsDefs[index].arg ); - if ((uint32_t)characteristicsDefs[index].arg == (uint32_t)characteristicId) + ble_context *srv = &context.bleSrvContexts[service]; + ble_gatt_chr_def *characteristicsDefs = srv->characteristicsDefs; + + for (int index = 0; index < srv->characteristicsCount; index++) + { + // ESP_LOGI(tag, "FindHandleIdFromId; find ah=%d - vh %d arg %d\n", attr_handle, + // *(characteristicsDefs[index].val_handle), (uint32_t)characteristicsDefs[index].arg ); + if ((uint32_t)characteristicsDefs[index].arg == (uint32_t)characteristicId) + { + handle = *(characteristicsDefs[index].val_handle); + found = true; + break; + } + } + + if (found) { - handle = *(characteristicsDefs[index].val_handle); break; } } @@ -59,7 +86,7 @@ uint16_t FindHandleIdFromId(ble_gatt_chr_def *characteristicsDefs, int countDefs static int esp32_gap_event(struct ble_gap_event *event, void *arg) { - ble_context *con = (ble_context *)arg; + ble_services_context *con = (ble_services_context *)arg; switch (event->type) { @@ -90,8 +117,7 @@ static int esp32_gap_event(struct ble_gap_event *event, void *arg) BluetoothEventType op = BluetoothEventType_Read; // Find characteristicId from attr_handle - uint16_t characteristicId = - FindIdFromHandle(con->characteristicsDefs, con->characteristicsCount, event->subscribe.attr_handle); + uint16_t characteristicId = FindIdFromHandle(con, event->subscribe.attr_handle); ESP_LOGI( tag, @@ -171,7 +197,7 @@ static int esp32_gap_event(struct ble_gap_event *event, void *arg) // o General discoverable mode // o Undirected connectable mode // -void esp32_ble_start_advertise(ble_context *context) +void esp32_ble_start_advertise(ble_services_context *context) { struct ble_gap_adv_params adv_params; struct ble_hs_adv_fields fields; @@ -222,7 +248,7 @@ void esp32_ble_start_advertise(ble_context *context) { adv_params.conn_mode |= BLE_GAP_DISC_MODE_GEN; } - rc = ble_gap_adv_start(esp32_addr_type, NULL, BLE_HS_FOREVER, &adv_params, esp32_gap_event, (void *)&blecontext); + rc = ble_gap_adv_start(esp32_addr_type, NULL, BLE_HS_FOREVER, &adv_params, esp32_gap_event, (void *)&bleContext); if (rc != 0) { ESP_LOGI(tag, "error enabling advertisement; rc=%d\n", rc); @@ -261,7 +287,7 @@ static void esp32_ble_on_sync(void) // Begin advertising // debug_printf("Begin advertising\n"); - esp32_ble_start_advertise(&blecontext); + esp32_ble_start_advertise(&bleContext); } static void esp32_ble_on_reset(int reason) @@ -328,10 +354,10 @@ bool device_ble_init() return true; } -int device_ble_start(ble_context *con) +int device_ble_start(ble_services_context &con) { int rc; - ble_gatt_svc_def *gatt_svr_svcs = con->gatt_service_def; + ble_gatt_svc_def *gatt_svr_svcs = con.gatt_service_def; ble_svc_gap_init(); ble_svc_gatt_init(); @@ -349,7 +375,7 @@ int device_ble_start(ble_context *con) } // Set the default device name - rc = ble_svc_gap_device_name_set(con->pDeviceName); + rc = ble_svc_gap_device_name_set(con.pDeviceName); assert(rc == 0); // Start the BLE task diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_ble.h b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_ble.h index 7dcace2c5f..d4d220407c 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_ble.h +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_ble.h @@ -30,24 +30,46 @@ typedef struct struct ble_context { - bool isDiscoverable; - bool isConnectable; - char *pDeviceName; - - int serviceCount; - ble_gatt_svc_def *gatt_service_def; + // Service UUID + ble_uuid_t *serviceUuid; + // Number of items in characteristics definitions/Uuid array & Attribute handles int characteristicsCount; + // Ptr to characteristics definitions array ble_gatt_chr_def *characteristicsDefs; + // Ptr to characteristics Uuid array ble_uuid_any_t *characteristicsUuids; + // Ptr to array of attribute handles uint16_t *attrHandles; + // Number of items in array of descriptor definitions & descriptor UUID int descriptorCount; + // Ptr to descriptor definitions array ble_gatt_dsc_def *descriptorDefs; + // Ptr to descriptor Uuid array ble_uuid_any_t *descriptorUuids; }; -extern ble_context blecontext; +struct ble_services_context +{ + // The service definition is discoverable + bool isDiscoverable; + // The service can be connected to + bool isConnectable; + // The device name + char *pDeviceName; + + // Number of services in service definition + int serviceCount; + + // Ptr to NIMBLE service definition + ble_gatt_svc_def *gatt_service_def; + + // Array of ble contexts, 1 per service + ble_context *bleSrvContexts; +}; + +extern ble_services_context bleContext; extern device_ble_event_data ble_event_data; #endif // SYS_BLE_H diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_ble_nimble_chars.c b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_ble_nimble_chars.c deleted file mode 100644 index 990254ec79..0000000000 --- a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_ble_nimble_chars.c +++ /dev/null @@ -1,79 +0,0 @@ -// -// Copyright (c) .NET Foundation and Contributors -// Portions Copyright (c) Microsoft Corporation. All rights reserved. -// See LICENSE file in the project root for full license information. -// - -// -// Handling for Fixed characteristics for device information (Maybe this should be done in managed code) -// Note: Using "C" file as struct initializers don't work in CPP when using nimble, i.e. BLE_UUID16_DECLARE - -#pragma GCC diagnostic push -#pragma GCC diagnostic ignored "-Wunused-parameter" - -#include "host/ble_hs.h" -#include "host/ble_uuid.h" -#include "services/gap/ble_svc_gap.h" -#include "services/gatt/ble_svc_gatt.h" - -#pragma GCC diagnostic pop - -#define GATT_MANUFACTURER_NAME_UUID 0x2A29 -#define GATT_MODEL_NUMBER_UUID 0x2A24 - -static const char *manuf_name = "Nanoframework"; -static const char *model_num = "ESP32"; - -static int gatt_svr_chr_access_device_info( - uint16_t conn_handle, - uint16_t attr_handle, - struct ble_gatt_access_ctxt *ctxt, - void *arg); - -const struct ble_gatt_chr_def gatt_char_device_info[] = { - { - // Characteristic: Manufacturer name - .uuid = BLE_UUID16_DECLARE(GATT_MANUFACTURER_NAME_UUID), - .access_cb = gatt_svr_chr_access_device_info, - .flags = BLE_GATT_CHR_F_READ, - }, - { - // Characteristic: Model number string - .uuid = BLE_UUID16_DECLARE(GATT_MODEL_NUMBER_UUID), - .access_cb = gatt_svr_chr_access_device_info, - .flags = BLE_GATT_CHR_F_READ, - }, - { - // No more characteristics in this service - 0, - }}; - -static int gatt_svr_chr_access_device_info( - uint16_t conn_handle, - uint16_t attr_handle, - struct ble_gatt_access_ctxt *ctxt, - void *arg) -{ - (void)conn_handle; - (void)attr_handle; - (void)arg; - - uint16_t uuid; - int rc; - - uuid = ble_uuid_u16(ctxt->chr->uuid); - - if (uuid == GATT_MODEL_NUMBER_UUID) - { - rc = os_mbuf_append(ctxt->om, model_num, strlen(model_num)); - return rc == 0 ? 0 : BLE_ATT_ERR_INSUFFICIENT_RES; - } - - if (uuid == GATT_MANUFACTURER_NAME_UUID) - { - rc = os_mbuf_append(ctxt->om, manuf_name, strlen(manuf_name)); - return rc == 0 ? 0 : BLE_ATT_ERR_INSUFFICIENT_RES; - } - - return BLE_ATT_ERR_UNLIKELY; -} diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.cpp b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.cpp index b85ba4a595..357dca1a9b 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.cpp +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.cpp @@ -346,6 +346,18 @@ static const CLR_RT_MethodHandler method_lookup[] = NULL, NULL, NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, + NULL, Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider::NativeInitService___BOOLEAN, Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider::NativeStartAdvertising___BOOLEAN, Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider::NativeStopAdvertising___VOID, @@ -421,9 +433,9 @@ static const CLR_RT_MethodHandler method_lookup[] = const CLR_RT_NativeAssemblyData g_CLR_AssemblyNative_nanoFramework_Device_Bluetooth = { "nanoFramework.Device.Bluetooth", - 0x9D2D4094, + 0xE7B47C83, method_lookup, - { 100, 0, 0, 1 } + { 100, 0, 0, 2 } }; // clang-format on diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.h b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.h index e4441e6f8b..e2ff1bb7dc 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.h +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native.h @@ -100,6 +100,12 @@ typedef enum __nfpack Utilities_GattNativeDescriptorUuid Utilities_GattNativeDescriptorUuid_ValidRange = 10502, Utilities_GattNativeDescriptorUuid_ExternalReportReference = 10503, Utilities_GattNativeDescriptorUuid_ReportReference = 10504, + Utilities_GattNativeDescriptorUuid_NumberDigitals = 10505, + Utilities_GattNativeDescriptorUuid_ValueTriggerSetting = 10506, + Utilities_GattNativeDescriptorUuid_EssConfiguration = 10507, + Utilities_GattNativeDescriptorUuid_EssMeasurement = 10508, + Utilities_GattNativeDescriptorUuid_EssTriggerSetting = 10509, + Utilities_GattNativeDescriptorUuid_TimeTriggerSetting = 10510, } Utilities_GattNativeDescriptorUuid; struct Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_BluetoothDeviceId @@ -320,7 +326,7 @@ struct Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttribut { static const int FIELD_STATIC___bluetoothEventManager = 3; - static const int FIELD___service = 1; + static const int FIELD___services = 1; static const int FIELD___status = 2; static const int FIELD___deviceName = 3; static const int FIELD___isDiscoverable = 4; diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattLocalCharacteristic.cpp b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattLocalCharacteristic.cpp index 3e2355809e..7755f37f9e 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattLocalCharacteristic.cpp +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattLocalCharacteristic.cpp @@ -6,7 +6,7 @@ #include "sys_dev_ble_native.h" -extern uint16_t FindHandleIdFromId(ble_gatt_chr_def *characteristicsDefs, int countDefs, uint16_t characteristicId); +extern uint16_t FindHandleIdFromId(ble_services_context &context, uint16_t characteristicId); // // Notify a Client @@ -38,9 +38,7 @@ HRESULT Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttribu bufLen = notifyBuffer->m_numOfElements; // Find attr handle from Characteristic ID - attHandle = - FindHandleIdFromId(blecontext.characteristicsDefs, blecontext.characteristicsCount, characteristicId); - + attHandle = FindHandleIdFromId(bleContext, characteristicId); if (attHandle != 0xffff) { // Send Notify buffer diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider.cpp b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider.cpp index 3311861d88..fcddf05ba4 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider.cpp +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.Bluetooth/sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider.cpp @@ -6,9 +6,11 @@ #include "sys_dev_ble_native.h" +//#define BLE_NANO_DEBUG 1 + extern bool device_ble_init(); extern void device_ble_dispose(); -extern int device_ble_start(ble_context *context); +extern int device_ble_start(ble_services_context &context); extern int device_ble_callback( uint16_t conn_handle, uint16_t attr_handle, @@ -29,57 +31,108 @@ typedef Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttribu typedef Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattLocalDescriptor GattLocalDescriptor; -#define GATT_DEVICE_INFO_UUID 0x180A - -ble_context blecontext; +ble_services_context bleContext; -static void InitContext(ble_context *context) +#ifdef BLE_NANO_DEBUG +void PrintBytes(uint8_t *pc, int len) { - memset(context, 0, sizeof(ble_context)); + for (int x = 0; x < len; x++) + { + debug_printf("%0X ", (int)*pc); + pc++; + } + debug_printf("\n"); } -static void FreeContext(ble_context *context) +void PrintUuid(const ble_uuid_t *puuid) { - if (context->pDeviceName) - { - platform_free((void *)context->pDeviceName); - context->pDeviceName = NULL; - } + ble_uuid_any_t *pu = (ble_uuid_any_t *)puuid; - if (context->gatt_service_def) + switch (pu->u.type) { - platform_free((void *)context->gatt_service_def); - context->gatt_service_def = NULL; - } + case BLE_UUID_TYPE_16: - if (context->characteristicsDefs) - { - platform_free(context->characteristicsDefs); - context->characteristicsDefs = NULL; - } + debug_printf("uuid16:%x\n", (int)pu->u16.value); + break; - if (context->characteristicsUuids) - { - platform_free(context->characteristicsUuids); - context->characteristicsUuids = NULL; + case BLE_UUID_TYPE_32: + debug_printf("uuid32:%x\n", pu->u32.value); + break; + + case BLE_UUID_TYPE_128: + debug_printf("uuid128:%x "); + for (int x = 0; x < 16; x++) + { + debug_printf("%X", (int)pu->u128.value[x]); + } + debug_printf("\n"); + break; + + default: + debug_printf("Invalid uuid type:%x \n", pu->u.type); + break; } +} +#endif - if (context->attrHandles) +static void InitContext(ble_services_context *context) +{ + memset(context, 0, sizeof(ble_services_context)); +} + +static void FreeContext(ble_services_context &srvContext) +{ + if (srvContext.pDeviceName) { - platform_free(context->attrHandles); - context->attrHandles = NULL; + platform_free((void *)srvContext.pDeviceName); + srvContext.pDeviceName = NULL; } - if (context->descriptorDefs) + if (srvContext.gatt_service_def) { - platform_free(context->descriptorDefs); - context->descriptorDefs = NULL; + platform_free((void *)srvContext.gatt_service_def); + srvContext.gatt_service_def = NULL; } - if (context->descriptorUuids) + // For each Service free up memory + for (int i = 0; i < srvContext.serviceCount; i++) { - platform_free(context->descriptorUuids); - context->descriptorUuids = NULL; + ble_context *context = &srvContext.bleSrvContexts[i]; + if (context->serviceUuid) + { + platform_free(context->characteristicsDefs); + context->serviceUuid = NULL; + } + + if (context->characteristicsDefs) + { + platform_free(context->characteristicsDefs); + context->characteristicsDefs = NULL; + } + + if (context->characteristicsUuids) + { + platform_free(context->characteristicsUuids); + context->characteristicsUuids = NULL; + } + + if (context->attrHandles) + { + platform_free(context->attrHandles); + context->attrHandles = NULL; + } + + if (context->descriptorDefs) + { + platform_free(context->descriptorDefs); + context->descriptorDefs = NULL; + } + + if (context->descriptorUuids) + { + platform_free(context->descriptorUuids); + context->descriptorUuids = NULL; + } } } @@ -90,7 +143,7 @@ HRESULT Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttribu NANOCLR_HEADER(); { - InitContext(&blecontext); + InitContext(&bleContext); stack.SetResult_Boolean(true); } @@ -113,21 +166,22 @@ void BuildUUID(uint8_t *pUuid, ble_uuid_any_t *pUany) // 00 00 xx xx - 00 00 - 10 00 - 80 00 - 00 80 5F 9B 34 FB - 16 bits // xx xx xx xx " " " " - 32 bits - uint8_t BlueSig[12] = {0, 0, 0x10, 0, 0x80, 0, 0, 0x80, 0x5f, 0x9b, 0x34, 0xfb}; + // Order of last 12 bytes saved in a Guuid ( reverse ) + uint8_t BlueSig[12] = {0, 0, 0, 0x10, 0x80, 0, 0, 0x80, 0x5f, 0x9b, 0x34, 0xfb}; - // 16 or 32 bit ? + // Is it a standard BlueSig 16 or 32 bit pattern if (memcmp(pUuid + 4, BlueSig, sizeof(BlueSig)) == 0) { // 16 Bit - if (pUuid[0] == 0 && pUuid[1] == 0) + if (pUuid[2] == 0 && pUuid[3] == 0) { pUany->u16.u.type = BLE_UUID_TYPE_16; - pUany->u16.value = (uint16_t)(pUuid[2] << 8) + pUuid[3]; + pUany->u16.value = (uint16_t)(pUuid[1] << 8) + pUuid[0]; } else { pUany->u32.u.type = BLE_UUID_TYPE_32; - pUany->u32.value = (uint32_t)(pUuid[0] << 24) + (pUuid[1] << 16) + (pUuid[2] << 8) + pUuid[3]; + pUany->u32.value = (uint32_t)(pUuid[3] << 24) + (pUuid[2] << 16) + (pUuid[1] << 8) + pUuid[0]; } } else @@ -152,33 +206,37 @@ ble_uuid_any_t *BuildUuidAlloc(uint8_t *pUuid) return pUany; } -// Build single service with terminator -ble_gatt_svc_def *BuildGattService(uint8_t type, uint8_t *pUuid, const ble_gatt_chr_def *characteristics, int *count) +bool BuildGattServices(ble_services_context &context) { - *count = 3; // 3 service entries - - // Define 3 services, custom, device_info and null service(end) - ble_gatt_svc_def *pSvcDef = (ble_gatt_svc_def *)platform_malloc(sizeof(ble_gatt_svc_def) * (*count)); - ble_gatt_svc_def *pCurSvcDef = pSvcDef; - - // 1st - pCurSvcDef->type = type; - pCurSvcDef->uuid = (ble_uuid_t *)BuildUuidAlloc(pUuid); - pCurSvcDef->includes = 0; - pCurSvcDef->characteristics = characteristics; - - // 2nd Device Info - pCurSvcDef++; - pCurSvcDef->type = BLE_GATT_SVC_TYPE_PRIMARY; - pCurSvcDef->uuid = Ble_uuid16_declare(GATT_DEVICE_INFO_UUID); - pCurSvcDef->includes = 0; - pCurSvcDef->characteristics = gatt_char_device_info; - - // 3rd - Terminator for services - pCurSvcDef++; - pCurSvcDef->type = BLE_GATT_SVC_TYPE_END; - - return pSvcDef; + int srvCount = context.serviceCount; + ble_context *def = context.bleSrvContexts; + + // Define all services and null service(end) + int svcDefSize = sizeof(ble_gatt_svc_def) * (srvCount + 1); + ble_gatt_svc_def *svcDef = (ble_gatt_svc_def *)platform_malloc(svcDefSize); + if (svcDef == NULL) + { + return false; + } + + memset(svcDef, 0, svcDefSize); + context.gatt_service_def = svcDef; + + while (srvCount > 0) + { + svcDef->type = BLE_GATT_SVC_TYPE_PRIMARY; + svcDef->uuid = def->serviceUuid; + svcDef->includes = 0; + svcDef->characteristics = def->characteristicsDefs; + + svcDef++; + def++; + srvCount--; + } + + // Last - Terminator for services + svcDef->type = BLE_GATT_SVC_TYPE_END; + return true; } void SetUuid(CLR_RT_HeapBlock *pItem, int sourceFieldIndex, ble_uuid_any_t *targetUuidValue, ble_uuid_t **pUuid) @@ -194,14 +252,47 @@ void AssignDescriptor(ble_gatt_dsc_def *pDsc, CLR_RT_HeapBlock *pPfItem, ble_uui { SetUuid(pPfItem, GattLocalDescriptor::FIELD___uuid, pUuid, (ble_uuid_t **)&pDsc->uuid); - pDsc->att_flags = 0; - if (pPfItem[GattLocalDescriptor::FIELD___writeProtectionLevel].NumericByRef().u4) + pDsc->att_flags = BLE_ATT_F_READ; + + if (pPfItem[GattLocalDescriptor::FIELD__WriteRequested].Dereference() != NULL) { - pDsc->att_flags |= BLE_GATT_CHR_F_WRITE; + pDsc->att_flags |= BLE_ATT_F_WRITE; + + // Write protection - Authentication & Encryption + GattProtectionLevel writeProtectLevel = + (GattProtectionLevel)pPfItem[GattLocalDescriptor::FIELD___writeProtectionLevel].NumericByRef().u4; + switch (writeProtectLevel) + { + case GattProtectionLevel_AuthenticationRequired: + pDsc->att_flags += BLE_ATT_F_WRITE_AUTHEN; + break; + case GattProtectionLevel_EncryptionRequired: + pDsc->att_flags += BLE_ATT_F_WRITE_ENC; + break; + case GattProtectionLevel_EncryptionAndAuthenticationRequired: + pDsc->att_flags += BLE_ATT_F_WRITE_AUTHEN | BLE_ATT_F_WRITE_ENC; + break; + case GattProtectionLevel_Plain: + break; + } } - if (pPfItem[GattLocalDescriptor::FIELD___readProtectionLevel].NumericByRef().u4) + + // Read protection - Authentication & Encryption + GattProtectionLevel readProtectLevel = + (GattProtectionLevel)pPfItem[GattLocalCharacteristic::FIELD___readProtectionLevel].NumericByRef().u4; + switch (readProtectLevel) { - pDsc->att_flags |= BLE_GATT_CHR_F_READ; + case GattProtectionLevel_AuthenticationRequired: + pDsc->att_flags += BLE_ATT_F_READ_AUTHEN; + break; + case GattProtectionLevel_EncryptionRequired: + pDsc->att_flags += BLE_ATT_F_READ_ENC; + break; + case GattProtectionLevel_EncryptionAndAuthenticationRequired: + pDsc->att_flags += BLE_ATT_F_READ_AUTHEN | BLE_ATT_F_READ_ENC; + break; + case GattProtectionLevel_Plain: + break; } pDsc->access_cb = device_ble_callback; @@ -230,7 +321,8 @@ void AssignArrayDescriptors(ble_context &context, CLR_RT_HeapBlock *pArray, int // Fill in details AssignDescriptor(pDsc, pArItem, &context.descriptorUuids[descIndex]); - // debug_printf("Array descriptors id=%X flags=%x cb=%x dindex=%d\n ", + // debug_printf("Array descriptors ptr=%X id=%X flags=%x cb=%x dindex=%d\n ", + // pDsc, // (int)pDsc->arg, // pDsc->att_flags, // pDsc->access_cb, @@ -255,7 +347,7 @@ void SetUuid( pCharacteristicsDef->uuid = (ble_uuid_t *)targetUuid; } -void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGattLocalService) +bool ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGattLocalService) { uint8_t *pUuid; CLR_RT_HeapBlock *pItem; @@ -267,6 +359,7 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt (CLR_RT_HeapBlock_Array *)pGattLocalService[GattLocalService::FIELD___serviceUuid].Array(); pUuid = pUuidArray->GetFirstElement(); + context.serviceUuid = (ble_uuid_t *)BuildUuidAlloc(pUuid); CLR_RT_HeapBlock_ArrayList *pCharacteristics = (CLR_RT_HeapBlock_ArrayList *)pGattLocalService[GattLocalService::FIELD___characteristics].Dereference(); @@ -280,6 +373,13 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt context.characteristicsCount = CharacteristicsCount; context.characteristicsDefs = (ble_gatt_chr_def *)platform_malloc(sizeof(ble_gatt_chr_def) * context.characteristicsCount); + if (context.characteristicsDefs == NULL) + { + // Out of memory + return false; + } + + memset(context.characteristicsDefs, 0, sizeof(ble_gatt_chr_def) * context.characteristicsCount); // Initial pass to count number of descriptors required so we can allocate things in 1 lump and keep reference for // freeing Descriptors include user descriptors and presentation formats @@ -301,12 +401,14 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt descriptorCount += pPresentationFormatsDiscriptors->GetSize(); CLR_RT_HeapBlock_ArrayList *pDescriptors = - (CLR_RT_HeapBlock_ArrayList *)pItem[GattLocalCharacteristic::FIELD___presentationFormats].Dereference(); + (CLR_RT_HeapBlock_ArrayList *)pItem[GattLocalCharacteristic::FIELD___descriptors].Dereference(); descriptorCount += pDescriptors->GetSize(); // Plus terminator descriptorCount++; + + // debug_printf("characteristics index=%d descriptorCount=%d\n ", index, descriptorCount); } } @@ -314,32 +416,61 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt // Allocate attribute handles for characteristics context.attrHandles = (uint16_t *)platform_malloc(sizeof(uint16_t) * context.characteristicsCount); + if (context.attrHandles == NULL) + { + // Out of memory + return false; + } // Allocate UUID table context.characteristicsUuids = (ble_uuid_any_t *)platform_malloc(sizeof(ble_uuid_any_t) * context.characteristicsCount); + if (context.characteristicsUuids == NULL) + { + // Out of memory + return false; + } // Allocate tables context.descriptorDefs = (ble_gatt_dsc_def *)platform_malloc(sizeof(ble_gatt_dsc_def) * descriptorCount); + if (context.descriptorDefs == NULL) + { + // Out of memory + return false; + } context.descriptorUuids = (ble_uuid_any_t *)platform_malloc(sizeof(ble_uuid_any_t) * descriptorCount); + if (context.descriptorUuids == NULL) + { + // Out of memory + return false; + } - // debug_printf("characteristicsCount = %d\n ", CharacteristicsCount); - // debug_printf("descriptorCount = %d\n ", descriptorCount); - // debug_printf("characteristicsDefs %X end %X\n", context.characteristicsDefs, context.characteristicsDefs + - // (sizeof(ble_gatt_chr_def) * context.characteristicsCount) ); debug_printf("characteristicsUuids %X end %X\n", - // context.characteristicsUuids, context.characteristicsUuids + (sizeof(ble_uuid_any_t) * - // context.characteristicsCount)); debug_printf("attrHandles %X end %X\n", context.attrHandles, - // context.attrHandles + (sizeof(uint16_t) * context.characteristicsCount)); debug_printf("descriptorDefs %X end - // %X\n", context.descriptorDefs, context.descriptorDefs + (sizeof(ble_gatt_dsc_def) * context.descriptorCount)); - // debug_printf("descriptorUuids %X end %X\n", context.descriptorUuids, context.descriptorUuids + - // (sizeof(ble_uuid_any_t) * context.descriptorCount)); + // Left in for the moment as this is still work in progress + // debug_printf("characteristicsCount = %d size=%X\n ", CharacteristicsCount, sizeof(ble_gatt_chr_def)); + // debug_printf("descriptorCount = %d size=%X\n ", descriptorCount, sizeof(ble_gatt_dsc_def)); + // debug_printf("characteristicsDefs %X end %X\n", + // context.characteristicsDefs, + // ((uint8_t *)context.characteristicsDefs) + (sizeof(ble_gatt_chr_def) * + // context.characteristicsCount)); + // debug_printf("characteristicsUuids %X end %X\n", + // context.characteristicsUuids, + // ((uint8_t *)context.characteristicsUuids) + (sizeof(ble_uuid_any_t) * + // context.characteristicsCount)); + // debug_printf("attrHandles %X end %X\n", + // context.attrHandles, + // ((uint8_t *)context.attrHandles) + (sizeof(uint16_t) * context.characteristicsCount)); + // debug_printf("descriptorDefs %X end %X\n", + // context.descriptorDefs, + // ((uint8_t *)context.descriptorDefs) + (sizeof(ble_gatt_dsc_def) * context.descriptorCount)); + // debug_printf("descriptorUuids %X end %X\n", + // context.descriptorUuids, + // ((uint8_t *)context.descriptorUuids) + (sizeof(ble_uuid_any_t) * context.descriptorCount)); // Build definitions require for Nimble for (charIndex = 0; charIndex < CharacteristicsCount; charIndex++) { if (SUCCEEDED(pCharacteristics->GetItem(charIndex, pItem))) { - // Build entry for nimble characteristic definition // UUID SetUuid( @@ -356,9 +487,46 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt context.characteristicsDefs[charIndex].val_handle = &context.attrHandles[charIndex]; // Set up Flags + ble_gatt_chr_flags flags = 0; + + // Write protection - Authentication & Encryption + GattProtectionLevel writeProtectLevel = + (GattProtectionLevel)pItem[GattLocalCharacteristic::FIELD___writeProtectionLevel].NumericByRef().u4; + switch (writeProtectLevel) + { + case GattProtectionLevel_AuthenticationRequired: + flags += BLE_GATT_CHR_F_WRITE_AUTHEN; + break; + case GattProtectionLevel_EncryptionRequired: + flags += BLE_GATT_CHR_F_WRITE_ENC; + break; + case GattProtectionLevel_EncryptionAndAuthenticationRequired: + flags += BLE_GATT_CHR_F_WRITE_AUTHEN | BLE_GATT_CHR_F_WRITE_ENC; + break; + case GattProtectionLevel_Plain: + break; + } + + // Read protection - Authentication & Encryption + GattProtectionLevel readProtectLevel = + (GattProtectionLevel)pItem[GattLocalCharacteristic::FIELD___readProtectionLevel].NumericByRef().u4; + switch (readProtectLevel) + { + case GattProtectionLevel_AuthenticationRequired: + flags += BLE_GATT_CHR_F_READ_AUTHEN; + break; + case GattProtectionLevel_EncryptionRequired: + flags += BLE_GATT_CHR_F_READ_ENC; + break; + case GattProtectionLevel_EncryptionAndAuthenticationRequired: + flags += BLE_GATT_CHR_F_READ_AUTHEN | BLE_GATT_CHR_F_READ_ENC; + break; + case GattProtectionLevel_Plain: + break; + } + GattCharacteristicProperties properties = (GattCharacteristicProperties)pItem[GattLocalCharacteristic::FIELD___properties].NumericByRef().u4; - ble_gatt_chr_flags flags = 0; if (properties & GattCharacteristicProperties_Read) flags |= BLE_GATT_CHR_F_READ; @@ -380,11 +548,7 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt flags |= BLE_GATT_CHR_F_AUTH_SIGN_WRITE; // Unhandled TODO - // #define BLE_GATT_CHR_F_READ_ENC 0x0200 - // #define BLE_GATT_CHR_F_READ_AUTHEN 0x0400 // #define BLE_GATT_CHR_F_READ_AUTHOR 0x0800 - // #define BLE_GATT_CHR_F_WRITE_ENC 0x1000 - // #define BLE_GATT_CHR_F_WRITE_AUTHEN 0x2000 // #define BLE_GATT_CHR_F_WRITE_AUTHOR 0x400 // TODO handle later @@ -396,9 +560,6 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt // Set callback used for all characteristics context.characteristicsDefs[charIndex].access_cb = device_ble_callback; - // CLR_INT32 writeProtectionLevel = - // pItem[GattLocalCharacteristic::FIELD___writeProtectionLevel].NumericByRef().s4; - context.characteristicsDefs[charIndex].min_key_size = 0; // TODO // Assign next descriptor as start for this characteristics @@ -409,18 +570,19 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt (CLR_RT_HeapBlock *)pItem[GattLocalCharacteristic::FIELD___userDescriptionDescriptor].Dereference(); if (pUserDescriptionDescriptors != NULL) { - // Allocate descriptor for each PresentationFormat + // Allocate descriptor for each User Description ble_gatt_dsc_def *pDsc = &context.descriptorDefs[descIndex]; // Fill in descriptor details AssignDescriptor(pDsc, pUserDescriptionDescriptors, &context.descriptorUuids[descIndex++]); - // debug_printf("User description id=%X flags=%x cb=%x dindex=%d\n ", + // debug_printf("User description ptr=%X id=%X flags=%x cb=%x dindex=%d\n ", + // pDsc, // pDsc->arg, // pDsc->att_flags, // pDsc->access_cb, // descIndex - 1 - //); + // ); } // Set up Presentation Format descriptors if any @@ -439,10 +601,10 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt // debug_printf("Characteristic id=%X flags=%x cb=%x dindex=%d\n ", // characteristicId, - // context.characteristicsDefs[index].flags, - // context.characteristicsDefs[index].access_cb, + // context.characteristicsDefs[charIndex].flags, + // context.characteristicsDefs[charIndex].access_cb, // descIndex - //); + // ); // debug_printf("Characteristic item %d\n", index); // debug_printf("writeProtectionLevel %d CharacteristicHandle:%d\n", writeProtectionLevel, @@ -457,54 +619,136 @@ void ParseAndBuildNimbleDefinition(ble_context &context, CLR_RT_HeapBlock *pGatt // &context.characteristicsDefs[CharacteristicsCount-1]); debug_printf("characteristics index %d descriptor index // %d\n",charIndex, descIndex); - context.gatt_service_def = - BuildGattService(BLE_GATT_SVC_TYPE_PRIMARY, pUuid, context.characteristicsDefs, &context.serviceCount); + return true; +} + +#ifdef BLE_NANO_DEBUG +void PrintChars(const ble_gatt_chr_def *pchars) +{ + ble_gatt_chr_def *pchar = (ble_gatt_chr_def *)pchars; + + debug_printf("==Characteristics definitions==\n"); + + while (pchar->uuid != NULL) + { + debug_printf("==characteristic==\n"); + PrintUuid(pchar->uuid); + + debug_printf("flags %X CB %X val %X\n", pchar->flags, pchar->access_cb, pchar->val_handle); + if (pchar->val_handle != 0) + { + debug_printf("ATT handle %d\n", *(pchar->val_handle)); + } + pchar++; + } + debug_printf("==End characteristics definitions==\n"); } +void PrintSvrDefs(ble_gatt_svc_def *svcDef) +{ + + ble_gatt_svc_def *pSDef = svcDef; + + debug_printf("==Services definition==\n"); + + while (pSDef->type != 0) + { + debug_printf("==Service==\n"); + PrintUuid(pSDef->uuid); + PrintChars(pSDef->characteristics); + pSDef++; + } + + debug_printf("==End services definition==\n"); +} +#endif + HRESULT Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider:: NativeStartAdvertising___BOOLEAN(CLR_RT_StackFrame &stack) { + bool result = false; + NANOCLR_HEADER(); { - bool result; + CLR_RT_HeapBlock_ArrayList *pArrayServices; + int deviceNameLen; CLR_RT_HeapBlock *pThis = stack.This(); // ptr to GattServiceProvider FAULT_ON_NULL(pThis); - CLR_RT_HeapBlock *pGattLocalService = pThis[GattServiceProvider::FIELD___service].Dereference(); - FAULT_ON_NULL(pGattLocalService); - // Save Discoverable & Connectable flags in context bool isDiscoverable = pThis[GattServiceProvider::FIELD___isDiscoverable].NumericByRef().s4 != 0; bool isConnectable = pThis[GattServiceProvider::FIELD___isConnectable].NumericByRef().s4 != 0; - blecontext.isDiscoverable = isDiscoverable; - blecontext.isConnectable = isConnectable; + bleContext.isDiscoverable = isDiscoverable; + bleContext.isConnectable = isConnectable; // Save Device name in context CLR_RT_HeapBlock_Array *pDeviceNameField = (CLR_RT_HeapBlock_Array *)pThis[GattServiceProvider::FIELD___deviceName].Array(); char *pDeviceName = (char *)pDeviceNameField->GetFirstElement(); - int deviceNameLen = pDeviceNameField->m_numOfElements; + deviceNameLen = pDeviceNameField->m_numOfElements; - blecontext.pDeviceName = (char *)platform_malloc(deviceNameLen + 1); - memcpy(blecontext.pDeviceName, pDeviceName, deviceNameLen); - blecontext.pDeviceName[deviceNameLen] = 0; + bleContext.pDeviceName = (char *)platform_malloc(deviceNameLen + 1); + memcpy(bleContext.pDeviceName, pDeviceName, deviceNameLen); + bleContext.pDeviceName[deviceNameLen] = 0; - ParseAndBuildNimbleDefinition(blecontext, pGattLocalService); + pArrayServices = (CLR_RT_HeapBlock_ArrayList *)pThis[GattServiceProvider::FIELD___services].Dereference(); + bleContext.serviceCount = pArrayServices->GetSize(); - result = device_ble_init(); - if (result) + // Allocate contexts for all service definitions + size_t bleContextSize = sizeof(ble_context) * bleContext.serviceCount; + bleContext.bleSrvContexts = (ble_context *)platform_malloc(bleContextSize); + if (bleContext.bleSrvContexts == NULL) { - // debug_printf("device_ble_init complete\n"); + NANOCLR_SET_AND_LEAVE(CLR_E_OUT_OF_MEMORY); + } + + memset(bleContext.bleSrvContexts, 0, bleContextSize); + + // Foreach Service set up the Nimble definitions + CLR_RT_HeapBlock *serviceItem; + for (int i = 0; i < bleContext.serviceCount; i++) + { + if (SUCCEEDED(pArrayServices->GetItem(i, serviceItem))) + { + if (!ParseAndBuildNimbleDefinition(bleContext.bleSrvContexts[i], serviceItem)) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OUT_OF_MEMORY); + } + } + else + { + NANOCLR_SET_AND_LEAVE(CLR_E_INDEX_OUT_OF_RANGE); + } + } - device_ble_start(&blecontext); + if (!BuildGattServices(bleContext)) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OUT_OF_MEMORY); + } - // debug_printf("device_ble_start complete\n"); +#ifdef BLE_NANO_DEBUG + PrintSvrDefs(bleContext.gatt_service_def); +#endif + result = device_ble_init(); + if (!result) + { + NANOCLR_SET_AND_LEAVE(CLR_E_OUT_OF_MEMORY); } + device_ble_start(bleContext); + stack.SetResult_Boolean(result); } - NANOCLR_NOCLEANUP(); + + NANOCLR_CLEANUP(); + + if (!result) + { + FreeContext(bleContext); + } + + NANOCLR_CLEANUP_END(); } HRESULT Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttributeProfile_GattServiceProvider:: @@ -516,7 +760,7 @@ HRESULT Library_sys_dev_ble_native_nanoFramework_Device_Bluetooth_GenericAttribu { device_ble_dispose(); - FreeContext(&blecontext); + FreeContext(bleContext); } NANOCLR_NOCLEANUP_NOLABEL(); } diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController.cpp b/targets/ESP32/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost.cpp similarity index 78% rename from targets/ESP32/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController.cpp rename to targets/ESP32/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost.cpp index b30355b05d..5918c07796 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController.cpp +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost.cpp @@ -3,8 +3,9 @@ // See LICENSE file in the project root for full license information. // -#include "nf_devices_onewire_native_target.h" -#include "target_nf_devices_onewire_config.h" +#include "nf_dev_onewire_target.h" +#include +#include // struct for working threads static OneWireFindStruct FindStruct; @@ -14,21 +15,13 @@ static uint8_t LastDiscrepancy; static uint8_t LastFamilyDiscrepancy; static uint8_t LastDevice; static uint8_t SerialNum[8]; -// UART to use for 1-Wire comm -static uart_port_t UartDriver; -// Driver state. -static oneWireState DriverState; -#if ONEWIRE_USE_MUTUAL_EXCLUSION -// Mutex protecting the peripheral -static mutex_t DriverLock; -#endif // ONEWIRE_USE_MUTUAL_EXCLUSION +// Driver state. +static oneWireState DriverState = ONEWIRE_UNINIT; -bool oneWireInit() +HRESULT oneWireInit() { - // TODO: make configurable DriverState = ONEWIRE_STOP; - UartDriver = NF_ONEWIRE_ESP32_UART_NUM; uart_config_t uart_config = { .baud_rate = 115200, @@ -39,32 +32,48 @@ bool oneWireInit() .rx_flow_ctrl_thresh = 0, .use_ref_tick = false, }; - if (gpio_set_direction(gpio_num_t(NF_ONEWIRE_ESP32_UART_TX_PIN), GPIO_MODE_OUTPUT_OD) != ESP_OK) - return false; - if (uart_param_config(UartDriver, &uart_config) != ESP_OK) - return false; - if (uart_set_pin( - UartDriver, - NF_ONEWIRE_ESP32_UART_TX_PIN, - NF_ONEWIRE_ESP32_UART_RX_PIN, - UART_PIN_NO_CHANGE, - UART_PIN_NO_CHANGE) != ESP_OK) - return false; - if (uart_driver_install(UartDriver, UART_FIFO_LEN * 2, 0, 0, NULL, ESP_INTR_FLAG_IRAM) != ESP_OK) - return false; - -#if (ONEWIRE_USE_MUTUAL_EXCLUSION == TRUE) - osalMutexObjectInit(&DriverLock); -#endif + + // get GPIO pins configured for UART assigned to 1-Wire + // need to subtract one to get the correct index of UART in mapped device pins + int txPin = Esp32_GetMappedDevicePins(DEV_TYPE_SERIAL, NF_ONEWIRE_ESP32_UART_NUM - 1, Esp32SerialPin_Tx); + int rxPin = Esp32_GetMappedDevicePins(DEV_TYPE_SERIAL, NF_ONEWIRE_ESP32_UART_NUM - 1, Esp32SerialPin_Rx); + + // check if TX, RX pins have been previously set + if (txPin == UART_PIN_NO_CHANGE || rxPin == UART_PIN_NO_CHANGE) + { + return CLR_E_PIN_UNAVAILABLE; + } + + // configure GPIO and UART + if (gpio_set_direction(gpio_num_t(txPin), GPIO_MODE_OUTPUT_OD) != ESP_OK) + { + return CLR_E_INVALID_OPERATION; + } + + if (uart_param_config(NF_ONEWIRE_ESP32_UART_NUM, &uart_config) != ESP_OK) + { + return CLR_E_INVALID_OPERATION; + } + + if (uart_set_pin(NF_ONEWIRE_ESP32_UART_NUM, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE) != ESP_OK) + { + return CLR_E_INVALID_OPERATION; + } + + if (uart_driver_install(NF_ONEWIRE_ESP32_UART_NUM, UART_FIFO_LEN * 2, 0, 0, NULL, ESP_INTR_FLAG_IRAM) != ESP_OK) + { + return CLR_E_INVALID_OPERATION; + } DriverState = ONEWIRE_READY; - return true; + + return S_OK; } void oneWireStop() { // stop UART - uart_driver_delete(UartDriver); + uart_driver_delete(NF_ONEWIRE_ESP32_UART_NUM); // driver is stopped DriverState = ONEWIRE_STOP; @@ -76,15 +85,15 @@ uint8_t oneWireTouchReset(void) uint8_t presence; // flush DMA buffer to ensure cache coherency - uart_flush(UartDriver); + uart_flush(NF_ONEWIRE_ESP32_UART_NUM); // set UART baud rate to 9600bps (required to send the RESET condition to the 1-Wire bus) - uart_set_baudrate(UartDriver, 9600); + uart_set_baudrate(NF_ONEWIRE_ESP32_UART_NUM, 9600); - uart_write_bytes(UartDriver, (const char *)&reset, 1); - uart_read_bytes(UartDriver, &presence, 1, 20 / portTICK_RATE_MS); + uart_write_bytes(NF_ONEWIRE_ESP32_UART_NUM, (const char *)&reset, 1); + uart_read_bytes(NF_ONEWIRE_ESP32_UART_NUM, &presence, 1, 20 / portTICK_RATE_MS); // set UART baud rate to 115200bps (normal comm is performed at this baud rate) - uart_set_baudrate(UartDriver, 115200); + uart_set_baudrate(NF_ONEWIRE_ESP32_UART_NUM, 115200); // check for presence pulse return (presence != reset); @@ -97,10 +106,10 @@ bool oneWireTouchBit(bool sendbit) uint8_t reply; // flush DMA buffer to ensure cache coherency - uart_flush(UartDriver); + uart_flush(NF_ONEWIRE_ESP32_UART_NUM); - uart_write_bytes(UartDriver, (const char *)&write, 1); - uart_read_bytes(UartDriver, &reply, 1, 20 / portTICK_RATE_MS); + uart_write_bytes(NF_ONEWIRE_ESP32_UART_NUM, (const char *)&write, 1); + uart_read_bytes(NF_ONEWIRE_ESP32_UART_NUM, &reply, 1, 20 / portTICK_RATE_MS); // interpret 1-Wire reply return (reply == IWIRE_RD); @@ -123,10 +132,10 @@ uint8_t oneWireTouchByte(uint8_t sendbyte) }; // flush DMA buffer to ensure cache coherency - uart_flush(UartDriver); + uart_flush(NF_ONEWIRE_ESP32_UART_NUM); - uart_write_bytes(UartDriver, (const char *)writeBuffer, 8); - uart_read_bytes(UartDriver, readBuffer, 8, 20 / portTICK_RATE_MS); + uart_write_bytes(NF_ONEWIRE_ESP32_UART_NUM, (const char *)writeBuffer, 8); + uart_read_bytes(NF_ONEWIRE_ESP32_UART_NUM, readBuffer, 8, 20 / portTICK_RATE_MS); // reset send mask to interpret the reply send_mask = 0x01; @@ -146,16 +155,10 @@ uint8_t oneWireTouchByte(uint8_t sendbyte) void oneWireAquire() { -#if (ONEWIRE_USE_MUTUAL_EXCLUSION == TRUE) - osalMutexLock(&Driver.Lock); -#endif } void oneWireRelease() { -#if (ONEWIRE_USE_MUTUAL_EXCLUSION == TRUE) - osalMutexUnlock(&Driver.Lock); -#endif } // compute CRC8 using running algorith (slower but saves FLASH) @@ -443,17 +446,17 @@ HRESULT FindOneDevice(CLR_RT_StackFrame &stack, bool findFirst) CLR_RT_HeapBlock hbTimeout; CLR_INT64 *timeout; TaskHandle_t task; - - // ensure the device is initialized - if (DriverState != ONEWIRE_READY && !oneWireInit()) - return CLR_E_INVALID_PARAMETER; + HRESULT result; // set an infinite timeout to wait forever for the operation to complete // this value has to be in ticks to be properly loaded by SetupTimeoutFromTicks() below hbTimeout.SetInteger((CLR_INT64)-1); - HRESULT result = stack.SetupTimeoutFromTicks(hbTimeout, timeout); + result = stack.SetupTimeoutFromTicks(hbTimeout, timeout); + if (result != S_OK) + { return result; + } // this is going to be used to check for the right event in case of simultaneous 1-Wire operations if (stack.m_customState == 1) @@ -486,12 +489,13 @@ HRESULT FindOneDevice(CLR_RT_StackFrame &stack, bool findFirst) // get a pointer to the managed object instance and check that it's not NULL CLR_RT_HeapBlock *pThis = stack.This(); if (pThis == NULL) + { return CLR_E_NULL_REFERENCE; + } // get a pointer to the serial number field in the OneWireController instance CLR_RT_HeapBlock_Array *serialNumberField = - pThis[Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController:: - FIELD___serialNumber] + pThis[Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::FIELD___serialNumber] .DereferenceArray(); _ASSERTE(serialNumberField->m_numOfElements == 8); @@ -511,81 +515,58 @@ HRESULT FindOneDevice(CLR_RT_StackFrame &stack, bool findFirst) return S_OK; } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchReset___BOOLEAN( +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchReset___BOOLEAN( CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - // ensure the device is initialized - if (DriverState != ONEWIRE_READY && !oneWireInit()) - NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); - stack.SetResult_Boolean(oneWireTouchReset()); - NANOCLR_NOCLEANUP(); + NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchBit___BOOLEAN__BOOLEAN( +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchBit___BOOLEAN__BOOLEAN( CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - // ensure the device is initialized - if (DriverState != ONEWIRE_READY && !oneWireInit()) - NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); - stack.SetResult_Boolean(oneWireTouchBit(stack.Arg1().NumericByRefConst().u1 != 0)); - NANOCLR_NOCLEANUP(); + NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::TouchByte___U1__U1( - CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::TouchByte___U1__U1(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - // ensure the device is initialized - if (DriverState != ONEWIRE_READY && !oneWireInit()) - NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); - stack.SetResult_U1(oneWireTouchByte((uint8_t)stack.Arg1().NumericByRefConst().u1)); - NANOCLR_NOCLEANUP(); + NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::WriteByte___U1__U1( - CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::WriteByte___U1__U1(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); uint8_t sendbyte; - // ensure the device is initialized - if (DriverState != ONEWIRE_READY && !oneWireInit()) - NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); - sendbyte = (uint8_t)stack.Arg1().NumericByRefConst().u1; stack.SetResult_U1(oneWireTouchByte(sendbyte) == sendbyte ? TRUE : FALSE); - NANOCLR_NOCLEANUP(); + NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController::ReadByte___U1( - CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::ReadByte___U1(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); - // ensure the device is initialized - if (DriverState != ONEWIRE_READY && !oneWireInit()) - NANOCLR_SET_AND_LEAVE(CLR_E_INVALID_PARAMETER); - stack.SetResult_U1(oneWireTouchByte(0xFF)); - NANOCLR_NOCLEANUP(); + NANOCLR_NOCLEANUP_NOLABEL(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController:: - FindFirstDevice___BOOLEAN__BOOLEAN__BOOLEAN(CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::FindFirstDevice___BOOLEAN__BOOLEAN__BOOLEAN( + CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -594,12 +575,35 @@ HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireC NANOCLR_NOCLEANUP(); } -HRESULT Library_nf_devices_onewire_native_nanoFramework_Devices_OneWire_OneWireController:: - FindNextDevice___BOOLEAN__BOOLEAN__BOOLEAN(CLR_RT_StackFrame &stack) +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::FindNextDevice___BOOLEAN__BOOLEAN__BOOLEAN( + CLR_RT_StackFrame &stack) { + (void)stack; + NANOCLR_HEADER(); NANOCLR_CHECK_HRESULT(FindOneDevice(stack, false)); NANOCLR_NOCLEANUP(); } + +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::NativeDispose___VOID( + CLR_RT_StackFrame &stack) +{ + (void)stack; + + NANOCLR_HEADER(); + + oneWireStop(); + + NANOCLR_NOCLEANUP_NOLABEL(); +} + +HRESULT Library_nf_dev_onewire_nanoFramework_Device_OneWire_OneWireHost::NativeInit___VOID(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + NANOCLR_CHECK_HRESULT(oneWireInit()); + + NANOCLR_NOCLEANUP(); +} diff --git a/targets/ESP32/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_target.h b/targets/ESP32/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_target.h similarity index 86% rename from targets/ESP32/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_target.h rename to targets/ESP32/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_target.h index 0c34575b6a..4e59b79a02 100644 --- a/targets/ESP32/_nanoCLR/nanoFramework.Devices.OneWire/nf_devices_onewire_native_target.h +++ b/targets/ESP32/_nanoCLR/nanoFramework.Device.OneWire/nf_dev_onewire_target.h @@ -3,10 +3,10 @@ // See LICENSE file in the project root for full license information. // -#ifndef NF_DEVICES_ONEWIRE_NATIVE_TARGET_H -#define NF_DEVICES_ONEWIRE_NATIVE_TARGET_H +#ifndef _NF_DEV_ONEWIRE_TARGET_H_ +#define _NF_DEV_ONEWIRE_TARGET_H_ -#include +#include // struct with parameters for 1-Wire working thread struct OneWireFindStruct @@ -35,4 +35,4 @@ typedef enum { #define SEARCH_ROM 0xF0 /* search ROM */ #define COND_SEARCH_ROM 0xEC /* conditional search ROM */ -#endif // NF_DEVICES_ONEWIRE_NATIVE_TARGET_H +#endif // _NF_DEV_ONEWIRE_TARGET_H_ diff --git a/targets/ESP32/_nanoCLR/target_platform.h.in b/targets/ESP32/_nanoCLR/target_platform.h.in index daa73c3ac1..bd5767561b 100644 --- a/targets/ESP32/_nanoCLR/target_platform.h.in +++ b/targets/ESP32/_nanoCLR/target_platform.h.in @@ -6,6 +6,8 @@ #ifndef TARGET_PLATFORM_H #define TARGET_PLATFORM_H +#include "esp32_ethernet_options.h" + #define NANOCLR_GRAPHICS @NANOCLR_GRAPHICS@ #define HAL_USE_SPI @HAL_USE_SPI_OPTION@ #define HAL_USE_SDC @HAL_USE_SDC_OPTION@ diff --git a/targets/FreeRTOS/NXP/NXP_MIMXRT1060_EVK/target_system_io_ports_config.h b/targets/FreeRTOS/NXP/NXP_MIMXRT1060_EVK/target_system_io_ports_config.h index 5492cd627b..949567e829 100644 --- a/targets/FreeRTOS/NXP/NXP_MIMXRT1060_EVK/target_system_io_ports_config.h +++ b/targets/FreeRTOS/NXP/NXP_MIMXRT1060_EVK/target_system_io_ports_config.h @@ -3,5 +3,6 @@ // See LICENSE file in the project root for full license information. // -// RX buffer size: 256 bytes -#define UART_RX_BUFER_SIZE 256 +/////////////////////////////////////////////////////////////////////////////////////////////////// +// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION // +/////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/targets/FreeRTOS/NXP/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp b/targets/FreeRTOS/NXP/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp index bc5cec9a80..7dc348ff79 100644 --- a/targets/FreeRTOS/NXP/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp +++ b/targets/FreeRTOS/NXP/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp @@ -182,6 +182,29 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_BytesToRead___ NANOCLR_NOCLEANUP(); } +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_InvertSignalLevels___BOOLEAN(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::set_InvertSignalLevels___VOID__BOOLEAN( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + + NANOCLR_NOCLEANUP(); +} + HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Read___I4__SZARRAY_U1__I4__I4(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -560,17 +583,17 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR data = dataBuffer->GetElement(offset); // push onto the eval stack how many bytes are being pushed to the UART - stack.PushValueI4(length - offset); + stack.PushValueI4(count); // store pointer palUart->TxBuffer = data; // set TX ongoing count - palUart->TxOngoingCount = length - offset; + palUart->TxOngoingCount = count; // Set transfer structure to nano ring buffer palUart->xfer.data = (uint8_t *)palUart->TxBuffer; - palUart->xfer.dataSize = length; + palUart->xfer.dataSize = count; // Notify task that we want to transmit data. xTaskNotify(palUart->xWTaskToNotify, 0x01, eSetBits); @@ -589,7 +612,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR { // event occurred // get from the eval stack how many bytes were buffered to TX - length = stack.m_evalStack[1].NumericByRef().s4; + count = stack.m_evalStack[1].NumericByRef().s4; // reset TX ongoing count palUart->TxOngoingCount = 0; @@ -604,13 +627,13 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR } } - // pop "length" heap block from stack + // pop "count" heap block from stack stack.PopValue(); // pop "hbTimeout" heap block from stack stack.PopValue(); - stack.SetResult_U4(length); + stack.SetResult_U4(count); // null pointers and vars pThis = NULL; @@ -666,6 +689,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( LPUART_Type *base = NULL; NF_PAL_UART *palUart = NULL; BaseType_t xReturned; + int32_t bufferSize; CLR_RT_HeapBlock *pThis = stack.This(); FAULT_ON_NULL(pThis); @@ -683,14 +707,17 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( palUart = Uart_PAL[uartNum]; // Allocate memory for RX circular buffer - palUart->RxBuffer = (uint8_t *)platform_malloc(UART_RX_BUFER_SIZE * sizeof(uint8_t)); + bufferSize = pThis[FIELD___bufferSize].NumericByRef().s4; + + palUart->RxBuffer = (uint8_t *)platform_malloc(bufferSize * sizeof(uint8_t)); + if (palUart->RxBuffer == NULL) { NANOCLR_SET_AND_LEAVE(CLR_E_OUT_OF_MEMORY); } // Initialize RX buffer - palUart->RxRingBuffer.Initialize(palUart->RxBuffer, UART_RX_BUFER_SIZE); + palUart->RxRingBuffer.Initialize(palUart->RxBuffer, bufferSize); palUart->RxBytesToRead = 0; // now all the rest diff --git a/targets/FreeRTOS/_common/CMakeLists.txt b/targets/FreeRTOS/_common/CMakeLists.txt index 571640d98e..d035a27759 100644 --- a/targets/FreeRTOS/_common/CMakeLists.txt +++ b/targets/FreeRTOS/_common/CMakeLists.txt @@ -21,7 +21,7 @@ list(APPEND TARGET_FREERTOS_COMMON_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/targetHAL list(APPEND TARGET_FREERTOS_COMMON_SOURCES ${CMAKE_CURRENT_SOURCE_DIR}/WireProtocol_ReceiverThread.c) -# FreeRTOS nanoCRL +# FreeRTOS nanoCLR add_subdirectory(${CMAKE_CURRENT_SOURCE_DIR}/nanoCLR) # make vars global diff --git a/targets/FreeRTOS/_common/targetHAL.c b/targets/FreeRTOS/_common/targetHAL.c index 145e826709..e0ae4bc810 100644 --- a/targets/FreeRTOS/_common/targetHAL.c +++ b/targets/FreeRTOS/_common/targetHAL.c @@ -35,3 +35,10 @@ __nfweak GET_TARGET_CAPABILITIES(0); inline TARGET_HAS_PROPRIETARY_BOOTER(false); inline TARGET_IFU_CAPABLE(false); + +// NXP targets can't change MAC Address +// Implemented as "weak" to allow it to be replaced with "hard" implementation at target level. +__nfweak bool Target_CanChangeMacAddress() +{ + return false; +} diff --git a/targets/TI_SimpleLink/CMakeLists.txt b/targets/TI_SimpleLink/CMakeLists.txt index 36b9f96bd6..51ad74fa24 100644 --- a/targets/TI_SimpleLink/CMakeLists.txt +++ b/targets/TI_SimpleLink/CMakeLists.txt @@ -131,7 +131,7 @@ elseif( "${TARGET_SERIES}" STREQUAL "CC13X2" ) endif() # WHEN CHANGING THIS MAKE SURE TO UPDATE THE DEV CONTAINERS - set(TI_SL_CC13xx_26xx_SDK_TAG "5.30.01.01" CACHE INTERNAL "TI CC13xx_26xx SDK tag") + set(TI_SL_CC13xx_26xx_SDK_TAG "5.40.00.40" CACHE INTERNAL "TI CC13xx_26xx SDK tag") if(NO_TI_SL_CC13xx_26xx_SDK_SOURCE) # no TI SimpleLink CC13xx_26xx SDK source specified, download it from our repo diff --git a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/cmake-variants.json b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/cmake-variants.json index 5d5a5b030a..8f3d8e103d 100644 --- a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/cmake-variants.json +++ b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/cmake-variants.json @@ -56,7 +56,7 @@ "API_System.IO.Ports": "OFF", "API_nanoFramework.ResourceManager": "OFF", "API_nanoFramework.System.Collections": "OFF", - "API_nanoFramework.System.Text": "OFF", + "API_nanoFramework.System.Text": "ON", "API_nanoFramework.TI.EasyLink": "ON", "API_nanoFramework.Hardware.TI": "ON" } diff --git a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/nanoCLR/main.c b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/nanoCLR/main.c index b3376154c9..055bcfdf86 100644 --- a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/nanoCLR/main.c +++ b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/nanoCLR/main.c @@ -6,18 +6,19 @@ #include #include -// RTOS header files -#include +// board Header files +#include #include #include #include - -#include // clang-format off #include DeviceFamily_constructPath(inc/hw_prcm.h) #include DeviceFamily_constructPath(driverlib/sys_ctrl.h) // clang-format on +// need this until fix in TI SDK is implemented +extern void PIN_init_nano(); + ////////////////////////////// // Stack size in bytes @@ -31,18 +32,6 @@ CLR_SETTINGS clrSettings; // this define has to match the one in cpu_gpio.cpp #define GPIO_MAX_PINS 16 -// these are declared in cpu_gpio.cpp -extern GPIO_PinConfig gpioPinConfigs[GPIO_MAX_PINS]; -extern GPIO_CallbackFxn gpioCallbackFunctions[GPIO_MAX_PINS]; - -// this has to be define in a C file, otherwise the linker can't replace the weak one declared in the SDK driver library -// const GPIOCC26XX_Config GPIOCC26XX_config = { -// .pinConfigs = (GPIO_PinConfig *)gpioPinConfigs, -// .callbacks = (GPIO_CallbackFxn *)gpioCallbackFunctions, -// .numberOfPinConfigs = GPIO_MAX_PINS, -// .numberOfCallbacks = GPIO_MAX_PINS, -// .intPriority = (~0)}; - extern void ReceiverThread(UArg arg0, UArg arg1); extern void CLRStartupThread(UArg arg0, UArg arg1); @@ -73,10 +62,13 @@ int main(void) // must be called before PIN_init() WakeupReasonStore = SysCtrlResetSourceGet(); + // hack required to be able to config wakeup from deep sleep + // bug introduced in SDK 5.30.01.01. + PIN_init_nano(); + // Call board init functions - Board_init(); + // Board_init(); - GPIO_init(); ADC_init(); ConfigUART(); diff --git a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.cpp b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.cpp index b53a5350cf..949567e829 100644 --- a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.cpp +++ b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.cpp @@ -3,15 +3,6 @@ // See LICENSE file in the project root for full license information. // -#include "target_system_io_ports_config.h" -#include - -/////////// -// UART1 // -/////////// - -// buffers -#if defined(__GNUC__) -__attribute__((aligned(32))) -#endif -uint8_t Uart1_RxBuffer[UART1_RX_SIZE]; +/////////////////////////////////////////////////////////////////////////////////////////////////// +// THIS FILE IS BLANK ON PURPOSE BECAUSE THIS TARGET DOESN'T REQUIRE THIS SPECIFIC CONFIGURATION // +/////////////////////////////////////////////////////////////////////////////////////////////////// diff --git a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.h b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.h index 4c8a9a9e97..c02682aa17 100644 --- a/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.h +++ b/targets/TI_SimpleLink/TI_CC1352R1_LAUNCHXL/target_system_io_ports_config.h @@ -9,6 +9,3 @@ // enable UART1 #define NF_SERIAL_COMM_TI_USE_UART1 FALSE - -// buffers size -#define UART1_RX_SIZE 256 diff --git a/targets/TI_SimpleLink/_common/platformHAL.c b/targets/TI_SimpleLink/_common/platformHAL.c index 460029ff47..4a6a1147d3 100644 --- a/targets/TI_SimpleLink/_common/platformHAL.c +++ b/targets/TI_SimpleLink/_common/platformHAL.c @@ -34,3 +34,10 @@ inline TARGET_CONFIG_UPDATE_REQUIRES_ERASE(false); __nfweak GET_TARGET_CAPABILITIES(0); inline TARGET_IFU_CAPABLE(false); + +// SimpleLink targets can't change MAC Address +// Implemented as "weak" to allow it to be replaced with "hard" implementation at target level. +__nfweak bool Target_CanChangeMacAddress() +{ + return false; +} diff --git a/targets/TI_SimpleLink/_nanoCLR/System.Device.Spi/cpu_spi.cpp b/targets/TI_SimpleLink/_nanoCLR/System.Device.Spi/cpu_spi.cpp index 740e79b47b..5578c09bac 100644 --- a/targets/TI_SimpleLink/_nanoCLR/System.Device.Spi/cpu_spi.cpp +++ b/targets/TI_SimpleLink/_nanoCLR/System.Device.Spi/cpu_spi.cpp @@ -229,18 +229,30 @@ uint32_t CPU_SPI_PortsMap() } // Return SPI minimum clock frequency -uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MinClockFrequency(uint32_t spiBus, int32_t *frequency) { - (void)spi_bus; + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } // TODO check what is minimum ( min clock that can be configured on chip, master only) - return 10000000 / 256; + *frequency = 10000000 / 256; + + return S_OK; } // Return SPI maximum clock frequency -uint32_t CPU_SPI_MaxClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MaxClockFrequency(uint32_t spiBus, int32_t *frequency) { - return 40000000; + if (spiBus - 1 >= NUM_SPI_BUSES) + { + return CLR_E_INVALID_PARAMETER; + } + + *frequency = 40000000; + + return S_OK; } // @@ -251,4 +263,4 @@ uint32_t CPU_SPI_ChipSelectLineCount(uint32_t spi_bus) (void)spi_bus; return 5; -} \ No newline at end of file +} diff --git a/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp b/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp index 67fd30ad39..d4a4af7257 100644 --- a/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp +++ b/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_System_IO_Ports_SerialPort.cpp @@ -206,6 +206,29 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_BytesToRead___ NANOCLR_NOCLEANUP(); } +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::get_InvertSignalLevels___BOOLEAN(CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + + NANOCLR_NOCLEANUP(); +} + +HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::set_InvertSignalLevels___VOID__BOOLEAN( + CLR_RT_StackFrame &stack) +{ + NANOCLR_HEADER(); + + (void)stack; + + NANOCLR_SET_AND_LEAVE(CLR_E_NOT_SUPPORTED); + + NANOCLR_NOCLEANUP(); +} + HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Read___I4__SZARRAY_U1__I4__I4(CLR_RT_StackFrame &stack) { NANOCLR_HEADER(); @@ -582,7 +605,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR // check if this is a long running operation palUart->IsLongRunning = IsLongRunningOperation( - length, + count, (uint32_t)pThis[FIELD___baudRate].NumericByRef().s4, (uint32_t &)estimatedDurationMiliseconds); @@ -598,14 +621,14 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR if (stack.m_customState == 1) { // push to the stack how many bytes bytes where buffered for TX - stack.PushValueI4(length); + stack.PushValueI4(count); // set TX count - palUart->TxOngoingCount = length; + palUart->TxOngoingCount = count; // Write data to start sending // by design: don't bother checking the return value - UART2_write(palUart->UartDriver, (const void *)data, length, NULL); + UART2_write(palUart->UartDriver, (const void *)data, count, NULL); // bump custom state so the read value above is pushed only once stack.m_customState = 2; @@ -618,7 +641,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR // Write data to ring buffer to start sending // by design: don't bother checking the return value - UART2_write(palUart->UartDriver, (const void *)data, length, NULL); + UART2_write(palUart->UartDriver, (const void *)data, count, NULL); } } @@ -638,7 +661,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR { // event occurred // get from the eval stack how many bytes were buffered to Tx - length = stack.m_evalStack[1].NumericByRef().s4; + count = stack.m_evalStack[1].NumericByRef().s4; // reset Tx ongoing count palUart->TxOngoingCount = 0; @@ -654,14 +677,14 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::Write___VOID__SZAR if (palUart->IsLongRunning) { - // pop "length" heap block from stack + // pop "count" heap block from stack stack.PopValue(); // pop "hbTimeout" heap block from stack stack.PopValue(); } - stack.SetResult_U4(length); + stack.SetResult_U4(count); NANOCLR_NOCLEANUP(); } @@ -690,8 +713,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( { NF_PAL_UART *palUart; uint8_t uartNum; - uint16_t txBufferSize; - uint16_t rxBufferSize; + int32_t bufferSize; // get a pointer to the managed object instance and check that it's not NULL CLR_RT_HeapBlock *pThis = stack.This(); @@ -715,10 +737,14 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( } #if defined(NF_SERIAL_COMM_TI_USE_UART1) && (NF_SERIAL_COMM_TI_USE_UART1 == TRUE) + // assign buffers, if not already done if (palUart->RxBuffer == NULL) { - palUart->RxBuffer = (uint8_t *)platform_malloc(UART1_TX_SIZE); + // alloc buffer memory + bufferSize = pThis[FIELD___bufferSize].NumericByRef().s4; + + palUart->RxBuffer = (uint8_t *)platform_malloc(bufferSize); // check allocation if (palUart->RxBuffer == NULL) @@ -727,8 +753,9 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( } // init buffer - palUart->RxRingBuffer.Initialize(palUart->RxBuffer, UART1_RX_SIZE); + palUart->RxRingBuffer.Initialize(palUart->RxBuffer, bufferSize); } + #endif // all the rest @@ -737,6 +764,7 @@ HRESULT Library_sys_io_ser_native_System_IO_Ports_SerialPort::NativeInit___VOID( palUart->RxBytesToRead = 0; palUart->TxOngoingCount = 0; } + NANOCLR_NOCLEANUP(); } diff --git a/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h b/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h index 57e10eb353..da7bf32c84 100644 --- a/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h +++ b/targets/TI_SimpleLink/_nanoCLR/System.IO.Ports/sys_io_ser_native_target.h @@ -41,7 +41,4 @@ typedef struct extern NF_PAL_UART Uart1_PAL; #endif -#define UART_TX_BUFFER_SIZE(num) UART##num##_TX_SIZE -#define UART_RX_BUFFER_SIZE(num) UART##num##_RX_SIZE - #endif // SYS_IO_SER_NATIVE_TARGET_H diff --git a/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp b/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp index 48909629f6..fa6c7935f4 100644 --- a/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp +++ b/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/cpu_gpio.cpp @@ -10,7 +10,7 @@ #include #include #include -#include +#include #include // SimpleLink doesn't follow the port&pin design pattern, there are no ports, just GPIO pins @@ -166,6 +166,9 @@ void UnlinkInputState(gpio_input_state *pState) // it's OK to do always this, no matter if interrupts are enabled or not GPIO_disableInt(pState->pinConfigIndex); + // disable pin + GPIO_setConfig(pState->pinConfigIndex, GPIO_CFG_IN_NOPULL); + // remove callback gpioCallbackFunctions[pState->pinConfigIndex] = NULL; @@ -394,7 +397,8 @@ bool CPU_GPIO_EnableInputPin( pState->pinConfigIndex = FindPinConfig(pinNumber); // set default input config for GPIO pin - gpioPinConfigs[pState->pinConfigIndex] |= PIN_INPUT_EN | PIN_NOPULL | PIN_IRQ_DIS; + gpioPinConfigs[pState->pinConfigIndex] |= + GPIO_CFG_INPUT_INTERNAL | GPIO_CFG_IN_INT_NONE | GPIO_CFG_PULL_NONE_INTERNAL; if (!CPU_GPIO_SetDriveMode(pState->pinConfigIndex, driveMode)) { diff --git a/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_target.h b/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_target.h index eb2e966adb..77cddb6dfe 100644 --- a/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_target.h +++ b/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Gpio/win_dev_gpio_native_target.h @@ -11,12 +11,10 @@ #include #include "rom.h" -// #include "rom_map.h" #include #include -// #include #include #include #include -#endif //WIN_DEV_GPIO_NATIVE_TARGET_H +#endif // WIN_DEV_GPIO_NATIVE_TARGET_H diff --git a/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp b/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp index e26a99df7f..63e1cea938 100644 --- a/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp +++ b/targets/TI_SimpleLink/_nanoCLR/Windows.Devices.Spi/cpu_spi.cpp @@ -229,7 +229,7 @@ uint32_t CPU_SPI_PortsMap() } // Return SPI minimum clock frequency -uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MinClockFrequency(uint32_t spi_bus, int32_t *frequency) { (void)spi_bus; @@ -238,7 +238,7 @@ uint32_t CPU_SPI_MinClockFrequency(uint32_t spi_bus) } // Return SPI maximum clock frequency -uint32_t CPU_SPI_MaxClockFrequency(uint32_t spi_bus) +HRESULT CPU_SPI_MaxClockFrequency(uint32_t spi_bus, int32_t *frequency) { return 40000000; } @@ -251,4 +251,4 @@ uint32_t CPU_SPI_ChipSelectLineCount(uint32_t spi_bus) (void)spi_bus; return 5; -} \ No newline at end of file +} diff --git a/targets/TI_SimpleLink/_nanoCLR/nanoFramework.Hardware.TI/nf_hardware_ti_native_nanoFramework_Hardware_TI_Power.cpp b/targets/TI_SimpleLink/_nanoCLR/nanoFramework.Hardware.TI/nf_hardware_ti_native_nanoFramework_Hardware_TI_Power.cpp index f7161a7872..6e2a765df8 100644 --- a/targets/TI_SimpleLink/_nanoCLR/nanoFramework.Hardware.TI/nf_hardware_ti_native_nanoFramework_Hardware_TI_Power.cpp +++ b/targets/TI_SimpleLink/_nanoCLR/nanoFramework.Hardware.TI/nf_hardware_ti_native_nanoFramework_Hardware_TI_Power.cpp @@ -4,6 +4,29 @@ // #include "nf_hardware_ti_native.h" +#include + +// hack required to be able to config wakeup from deep sleep +// bug introduced in SDK 5.30.01.01. +// waiting for a proper fix in a future SDK +extern "C" +{ + PINCC26XX_HWAttrs PINCC26XX_hwAttrs = {.intPriority = ~0, .swiPriority = 0}; + + const PIN_Config BoardGpioInitTable[] = {PIN_TERMINATE}; + + void PIN_init_nano() + { + Power_init(); + + if (PIN_init(BoardGpioInitTable) != PIN_SUCCESS) + { + // Error with PIN_init + while (1) + ; + } + } +} // declare a shorter type to make code readable typedef Library_nf_hardware_ti_native_nanoFramework_Hardware_TI_Power__PinWakeupConfig PinWakeupConfig; @@ -47,7 +70,7 @@ HRESULT Library_nf_hardware_ti_native_nanoFramework_Hardware_TI_Power:: wakeupConfigurations[index] = PIN_ID(pinWakeupConfig[PinWakeupConfig::FIELD___pin].NumericByRef().s4); // pin is always input - wakeupConfigurations[index] |= PIN_INPUT_EN; + wakeupConfigurations[index] |= PIN_INPUT_EN | PIN_NOPULL | PIN_IRQ_DIS; // grab and set pullup/down option wakeupConfigurations[index] |= @@ -95,7 +118,12 @@ HRESULT Library_nf_hardware_ti_native_nanoFramework_Hardware_TI_Power::NativeEnt { NANOCLR_HEADER(); - Power_shutdown(0, 0); + // set flags to stop debug... + CLR_EE_DBG_SET(RebootPending); + // ... reboot CLR so execution ends gracefully ... + CLR_EE_REBOOT_CLR; + // ... and set power level to OFF + g_CLR_HW_Hardware.m_powerLevel = PowerLevel__Off; NANOCLR_NOCLEANUP(); } diff --git a/targets/TI_SimpleLink/_nanoCLR/targetHAL.cpp b/targets/TI_SimpleLink/_nanoCLR/targetHAL.cpp index 7a32fd0ed0..619153beef 100644 --- a/targets/TI_SimpleLink/_nanoCLR/targetHAL.cpp +++ b/targets/TI_SimpleLink/_nanoCLR/targetHAL.cpp @@ -10,7 +10,8 @@ #include #include #include -// #include + +#include #if (HAL_USE_I2C_OPTION == TRUE) #include @@ -149,6 +150,15 @@ void nanoHAL_Uninitialize() EasyLink_abort(); #endif + // disable UART pins and ADC + PIN_Config BoardGpioInitTable[] = { + 12 | PIN_INPUT_EN | PIN_NOPULL | PIN_IRQ_DIS, + 13 | PIN_INPUT_EN | PIN_NOPULL | PIN_IRQ_DIS, + 24 | PIN_INPUT_EN | PIN_NOPULL | PIN_IRQ_DIS, + PIN_TERMINATE}; + + PIN_init(BoardGpioInitTable); + Events_Uninitialize(); HAL_CONTINUATION::Uninitialize(); diff --git a/targets/TI_SimpleLink/_nanoCLR/targetHAL_Power.c b/targets/TI_SimpleLink/_nanoCLR/targetHAL_Power.c index 1260ed88e9..2efefb72ad 100644 --- a/targets/TI_SimpleLink/_nanoCLR/targetHAL_Power.c +++ b/targets/TI_SimpleLink/_nanoCLR/targetHAL_Power.c @@ -25,7 +25,11 @@ void CPU_SetPowerMode(PowerLevel_type powerLevel) { case PowerLevel__Off: // gracefully shutdown everything - // FIXME TODO + nanoHAL_Uninitialize_C(); + + // now let's go with shutdown + Power_shutdown(0, 0); + break; default: diff --git a/targets/win32/Include/targetHAL.h b/targets/win32/Include/targetHAL.h index a9495e994e..e14a27427d 100644 --- a/targets/win32/Include/targetHAL.h +++ b/targets/win32/Include/targetHAL.h @@ -53,6 +53,11 @@ inline bool Target_HasNanoBooter() return false; }; +inline bool Target_CanChangeMacAddress() +{ + return false; +}; + inline bool Target_IFUCapable() { return false; @@ -98,4 +103,4 @@ inline uint64_t CPU_MillisecondsToTicks(UINT64 uSec) return uSec * 10 * 1000; } -#endif //TARGET_HAL_H +#endif // TARGET_HAL_H diff --git a/version.json b/version.json index 7fd2d16313..3ff23a436e 100644 --- a/version.json +++ b/version.json @@ -1,6 +1,6 @@ { "$schema": "https://raw.githubusercontent.com/dotnet/Nerdbank.GitVersioning/master/src/NerdBank.GitVersioning/version.schema.json", - "version": "1.7.3", + "version": "1.7.4-preview.{height}", "assemblyVersion": { "precision": "revision" },