From 254a687d8d2491ee7c02b48279beb4ba95c802d5 Mon Sep 17 00:00:00 2001 From: Robin Pedersen Date: Thu, 17 Aug 2023 09:48:26 +0200 Subject: [PATCH 01/22] update x-dv hash Signed-off-by: Robin Pedersen --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index bc58ca6481..4aa7e60e86 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=443f11c + VERIF_ENV_REF=2d3f6c6b clone From 934cb2ae5ba48ae1c21746743b99066558cfa478 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Mon, 21 Aug 2023 12:57:17 +0200 Subject: [PATCH 02/22] Update x-dv hash Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index 4aa7e60e86..3266cdf762 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=2d3f6c6b + VERIF_ENV_REF=3c628d8a13c0ae5510b4673e4dd90a6f70b418fe clone From 6caa342775c68790c46674e1cd9206a6f2efe3b6 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Tue, 22 Aug 2023 13:23:41 +0200 Subject: [PATCH 03/22] Updated 40x-dv hash to 653a93fc Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index 3266cdf762..67a291cfdf 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=3c628d8a13c0ae5510b4673e4dd90a6f70b418fe + VERIF_ENV_REF=653a93fc0f28b7222745463489cc7b3f7f22cf92 clone From 175267e090959d29236418addce900d3eba4b066 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Wed, 23 Aug 2023 12:54:06 +0200 Subject: [PATCH 04/22] Updated 40x-dv hash to 4a0a4d53 Signed-off-by: Henrik Fegran --- bin/clonetb | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/bin/clonetb b/bin/clonetb index 67a291cfdf..e0d3500895 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,8 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=653a93fc0f28b7222745463489cc7b3f7f22cf92 - + VERIF_ENV_REF=4a0a4d53df16703be65c2df7a6132c08d4704ef4 clone ignore_cloned_directory From 141dbfe2fceb260cc1aeef40a0e1f2b00c26589c Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Mon, 28 Aug 2023 09:25:18 +0200 Subject: [PATCH 05/22] Updated 40x-dv hash to 0a6e8865 Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index e0d3500895..b49b46672b 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=4a0a4d53df16703be65c2df7a6132c08d4704ef4 + VERIF_ENV_REF=0a6e88658895be031bff00918f7bf8083b4f5e64 clone ignore_cloned_directory From acd1511fc88bc935821955a480c20da1698b005c Mon Sep 17 00:00:00 2001 From: Marton Teilgard Date: Mon, 4 Sep 2023 15:34:48 +0200 Subject: [PATCH 06/22] Updated 40x-dv hash to include rv32e assert file Signed-off-by: Marton Teilgard --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index b49b46672b..9fa6e0e9d0 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=0a6e88658895be031bff00918f7bf8083b4f5e64 + VERIF_ENV_REF=df43b5379dc7f268158ed7f51835ed2ef4f979a5 clone ignore_cloned_directory From 8fd9e91b105029fa290c79a1897b0eb132bacef1 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Tue, 5 Sep 2023 14:28:13 +0200 Subject: [PATCH 07/22] Updated cv32e40x-dv hash Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index b49b46672b..da6be78422 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=0a6e88658895be031bff00918f7bf8083b4f5e64 + VERIF_ENV_REF=277124a8e7b638411269f45c60090d39d4a74610 clone ignore_cloned_directory From b13eb16c0d140ff0b203607c935daab301aaecf5 Mon Sep 17 00:00:00 2001 From: Kristine Dosvik Date: Tue, 5 Sep 2023 22:24:31 +0200 Subject: [PATCH 08/22] Add rvfi memory signals to rvfi interface Signed-off-by: Kristine Dosvik --- lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv b/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv index 722106c713..b49093bbb4 100644 --- a/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv +++ b/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv @@ -74,7 +74,14 @@ interface uvma_rvfi_instr_if_t input logic [(NMEM*XLEN/8)-1:0] rvfi_mem_wmask, input logic [2:0] instr_prot, - input logic [NMEM*3-1:0] mem_prot + input logic [1:0] rvfi_instr_memtype, + input logic rvfi_instr_dbg, + input logic [ NMEM*3-1:0] mem_prot, + input logic [ 1*NMEM-1:0] rvfi_mem_exokay, + input logic [ 1*NMEM-1:0] rvfi_mem_err, + input logic [ 6*NMEM-1:0] rvfi_mem_atop, + input logic [ 2*NMEM-1:0] rvfi_mem_memtype, + input logic [ NMEM-1 :0] rvfi_mem_dbg ); typedef logic[4*NMEM-1:0] mem_mask_t; From 1ec7808ef93a06f897bf695ce7b18b692d982cc1 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Wed, 6 Sep 2023 09:35:57 +0200 Subject: [PATCH 09/22] Updated cv32e40x-dv hash Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index da6be78422..3f6491e88d 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=277124a8e7b638411269f45c60090d39d4a74610 + VERIF_ENV_REF=d53922f6f77381352c6bbbbade65c705dc224ad8 clone ignore_cloned_directory From 7ce511075e35bdd7ebe6a127af58304d06bb8098 Mon Sep 17 00:00:00 2001 From: Robin Pedersen Date: Thu, 7 Sep 2023 10:59:00 +0200 Subject: [PATCH 10/22] make 'gen_csr_access_test' executable --- bin/gen_csr_access_test.py | 2 ++ 1 file changed, 2 insertions(+) mode change 100644 => 100755 bin/gen_csr_access_test.py diff --git a/bin/gen_csr_access_test.py b/bin/gen_csr_access_test.py old mode 100644 new mode 100755 index 3601544ae0..fd909a4e95 --- a/bin/gen_csr_access_test.py +++ b/bin/gen_csr_access_test.py @@ -1,3 +1,5 @@ +#!/usr/bin/env python3 + import sys import os import argparse From 54108c961b64a19091eb5f38f9c4ac164a4a34c2 Mon Sep 17 00:00:00 2001 From: Kristine Dosvik Date: Wed, 13 Sep 2023 13:28:35 +0200 Subject: [PATCH 11/22] rename to follow name convention Signed-off-by: Kristine Dosvik --- lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv b/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv index b49093bbb4..1a9f80f564 100644 --- a/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv +++ b/lib/uvm_agents/uvma_rvfi/uvma_rvfi_instr_if.sv @@ -73,10 +73,10 @@ interface uvma_rvfi_instr_if_t input logic [(NMEM*XLEN)-1:0] rvfi_mem_wdata, input logic [(NMEM*XLEN/8)-1:0] rvfi_mem_wmask, - input logic [2:0] instr_prot, + input logic [2:0] rvfi_instr_prot, input logic [1:0] rvfi_instr_memtype, input logic rvfi_instr_dbg, - input logic [ NMEM*3-1:0] mem_prot, + input logic [ NMEM*3-1:0] rvfi_mem_prot, input logic [ 1*NMEM-1:0] rvfi_mem_exokay, input logic [ 1*NMEM-1:0] rvfi_mem_err, input logic [ 6*NMEM-1:0] rvfi_mem_atop, From 678f23d651100707094a5ec720f853290ea66d18 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Fri, 15 Sep 2023 09:17:59 +0200 Subject: [PATCH 12/22] Updated cv32e40x-dv hash to 4ba93acf850 Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index 3f6491e88d..e923c218c9 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=d53922f6f77381352c6bbbbade65c705dc224ad8 + VERIF_ENV_REF=4ba93acf850efde246a55e170e4b1a1bdc3a8b2a clone ignore_cloned_directory From 9e544c905d474bfac99ee8dad291d6441d0a2fb9 Mon Sep 17 00:00:00 2001 From: Marton Teilgard Date: Tue, 19 Sep 2023 12:43:24 +0200 Subject: [PATCH 13/22] Updated 40x_dv hash to latest Signed-off-by: Marton Teilgard --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index e923c218c9..d1aaf18782 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=4ba93acf850efde246a55e170e4b1a1bdc3a8b2a + VERIF_ENV_REF=942c8d0a7f625175958d2134796d354c5fd53da8 clone ignore_cloned_directory From ea15e99106cdd0d6e9316627a8b388d2ef8f5617 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Thu, 21 Sep 2023 13:31:29 +0200 Subject: [PATCH 14/22] Updated cv32e40x-dv hash to latest to fix sim breakage Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index d1aaf18782..bd47005317 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=942c8d0a7f625175958d2134796d354c5fd53da8 + VERIF_ENV_REF=61906fcede6877c2f51aa30c9ba76314af2a9dfd clone ignore_cloned_directory From 4249224729483b1548fa2fac13dfd8e6d21beb92 Mon Sep 17 00:00:00 2001 From: Henrik Fegran Date: Mon, 25 Sep 2023 08:02:02 +0200 Subject: [PATCH 15/22] Updated cv32e40x-dv hash to latest Signed-off-by: Henrik Fegran --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index bd47005317..0e14f1323e 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=61906fcede6877c2f51aa30c9ba76314af2a9dfd + VERIF_ENV_REF=fe59754f31a4c818d3a0fd025c3e61ee41a7e9c4 clone ignore_cloned_directory From 173eb03338f6e936842d11db9f35b94aca5d9bd9 Mon Sep 17 00:00:00 2001 From: Kristine Dosvik Date: Thu, 28 Sep 2023 16:05:14 +0200 Subject: [PATCH 16/22] update 40x-dv hash Signed-off-by: Kristine Dosvik --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index 0e14f1323e..23c49ed74a 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=fe59754f31a4c818d3a0fd025c3e61ee41a7e9c4 + VERIF_ENV_REF=b314d2cd603b240ff13982fddb4c1d9cf3c88fd8 clone ignore_cloned_directory From 9d8fdd8780e472f1c5417a5625386a62278deae1 Mon Sep 17 00:00:00 2001 From: Robin Pedersen Date: Thu, 28 Sep 2023 13:52:15 +0200 Subject: [PATCH 17/22] add 'verif header' flag to csr test gen, plus description and refactor Signed-off-by: Robin Pedersen --- bin/gen_csr_access_test.py | 118 +++++++++++++++++++++++++++---------- 1 file changed, 88 insertions(+), 30 deletions(-) diff --git a/bin/gen_csr_access_test.py b/bin/gen_csr_access_test.py index fd909a4e95..889a0b0fe4 100755 --- a/bin/gen_csr_access_test.py +++ b/bin/gen_csr_access_test.py @@ -1,5 +1,34 @@ #!/usr/bin/env python3 + +# Copyright 2023 Silicon Labs, Inc. +# +# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 +# +# Licensed under the Solderpad Hardware License v 2.1 (the "License"); you may +# not use this file except in compliance with the License, or, at your option, +# the Apache License version 2.0. +# +# You may obtain a copy of the License at +# https://solderpad.org/licenses/SHL-2.1/ +# +# Unless required by applicable law or agreed to in writing, any work +# distributed under the License is distributed on an "AS IS" BASIS, WITHOUT +# WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# +# See the License for the specific language governing permissions and +# limitations under the License. + + +# Description: +# This script is for generating the CSR access test: +# `cv32e40(s|x)/tests/programs/custom/cv32e40x_csr_access_test/`. +# +# It calls a generation script within `riscv-dv`. +# A Yaml config as per `--input_yaml_path` is used as its input. +# See the README in the path mention above for additional usage info. + + import sys import os import argparse @@ -7,6 +36,7 @@ import yaml import shlex + if (sys.version_info < (3,5,0)): print ('Requires python 3.5') exit(1) @@ -110,47 +140,28 @@ def run_riscv_dv_gen_csr_script(output_yaml_path): print("error: exception in 'run_riscv_dv_gen_csr_script'") print(e) -def preprocess_yaml(): - input_script_path = yaml_file_path - w_enable = True - w_enable_n = w_enable - str_args = "" - enabled_features = { - "clic": False, - "clint": False, - "debug": False, - "e_base": False, - "i_base": False, - "m_ext": False, - "m_none": False, - "readonly": False, - "umode": False, - "a_ext": False, - "f_ext": False, - "p_ext": False, - "v_ext": False, - "x_ext": False, - "xsecure": False, - "zc": False, - "zicntr": False, - "marchid": 0, - "num_mhpmcounters": 0, - "pmp_num_regions": 0, - "dbg_num_triggers": 0, - } +def set_enabled_features(enabled_features_previous, str_args_previous, args): + enabled_features = enabled_features_previous + str_args = str_args_previous + + # "VERIF_HEADER" (Design-workaround for CSR field alternatives.) + enabled_features["verif_header"] = True # CLIC if (args.clic_enable): str_args = str_args + "_clic" enabled_features["clic"] = True + # CLINT if (args.clint_enable or not args.clic_enable): str_args = str_args + "_clint" enabled_features["clint"] = True if not enabled_features["clic"] else False + # DEBUG if (args.debug_enable): str_args = str_args + "_debug" enabled_features["debug"] = True + # I/E if (args.i_base_enable or args.i_ext_enable): str_args = str_args + "_i" @@ -163,6 +174,7 @@ def preprocess_yaml(): exit(1) if (args.i_ext_enable or args.e_ext_enable): print("warning: i and e are 'base' modules, not extensions", file=sys.stderr) + # M if (args.m_ext_enable): str_args = str_args + "_m" @@ -173,59 +185,105 @@ def preprocess_yaml(): else: print("error: need '--m_ext_enable' or '--m_none_enable'", file=sys.stderr) exit(1) + # A_EXT if (args.a_ext_enable): str_args = str_args + "_a" enabled_features["a_ext"] = True + # F_EXT if (args.f_ext_enable): str_args = str_args + "_f" enabled_features["f_ext"] = True + # P_EXT if (args.p_ext_enable): str_args = str_args + "_p" enabled_features["p_ext"] = True + # V_EXT if (args.v_ext_enable): str_args = str_args + "_v" enabled_features["v_ext"] = True + # X_EXT if (args.x_ext_enable): str_args = str_args + "_x" enabled_features["x_ext"] = True + # XSECURE if (args.xsecure_enable): str_args = str_args + "_xsecure" enabled_features["xsecure"] = True + # UMODE if (args.umode_enable): str_args = str_args + "_umode" enabled_features["umode"] = True + # ZC if (args.zc_enable): str_args = str_args + "_zc" enabled_features["zc"] = True + # ZICNTR if (args.zicntr_enable): str_args = str_args + "_zicntr" enabled_features["zicntr"] = True + # MARCHID if (int(args.marchid) > 0): str_args = str_args + "_marchid" + args.marchid enabled_features["marchid"] = int(args.marchid) + # MHPMCOUNTERS if (int(args.mhpmcounter_num) > 0): str_args = str_args + "_mhpmctr" + args.mhpmcounter_num enabled_features["num_mhpmcounters"] = int(args.mhpmcounter_num) + # PMP if (int(args.pmp_num_regions) > 0): str_args = str_args + "_pmp" + args.pmp_num_regions enabled_features["pmp_num_regions"] = int(args.pmp_num_regions) + # TRIGGERS if (int(args.num_triggers) > 0): str_args = str_args + "_triggers" + args.num_triggers enabled_features["dbg_num_triggers"] = int(args.num_triggers) - # TODO:silabs-robin Any other "enabled_features"? + + return (enabled_features, str_args) + +def preprocess_yaml(): + input_script_path = yaml_file_path + w_enable = True + w_enable_n = w_enable + str_args = "" + enabled_features = { + "clic": False, + "clint": False, + "debug": False, + "e_base": False, + "i_base": False, + "m_ext": False, + "m_none": False, + "readonly": False, + "umode": False, + "a_ext": False, + "f_ext": False, + "p_ext": False, + "v_ext": False, + "x_ext": False, + "xsecure": False, + "zc": False, + "zicntr": False, + "marchid": 0, + "num_mhpmcounters": 0, + "pmp_num_regions": 0, + "dbg_num_triggers": 0, + } + + (enabled_features, str_args) = \ + set_enabled_features(enabled_features, str_args, args) print("enabled_features: {}".format(enabled_features)) @@ -322,7 +380,7 @@ def preprocess_yaml_m4(enabled_features, input_script_path, output_script_handle # Run the preprocessing args = args_pre + args_mid + args_post - print('running m4 as: ' + str(args)) # TODO:silabs-robin "if '--verbose'" + print('running m4 as: ' + str(args)) proc_results = subprocess.run(args, stdout=output_script_handle) if proc_results.returncode != 0: From c50d8fe4ff8a054263d9f769d5eed576ed420833 Mon Sep 17 00:00:00 2001 From: Kristine Dosvik Date: Mon, 2 Oct 2023 15:30:31 +0200 Subject: [PATCH 18/22] update x-dv hash Signed-off-by: Kristine Dosvik --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index 23c49ed74a..525c5e7bfa 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -80,7 +80,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=b314d2cd603b240ff13982fddb4c1d9cf3c88fd8 + VERIF_ENV_REF=e7bae19ebc7806021f909d49484c66d302b2f8a8 clone ignore_cloned_directory From cde234ff28d939fd4ec6762f7a3a47a27080c210 Mon Sep 17 00:00:00 2001 From: Kristine Dosvik Date: Wed, 18 Oct 2023 14:23:01 +0200 Subject: [PATCH 19/22] Add exokay obi behavior, outcomment atomic uvm error Signed-off-by: Kristine Dosvik --- .../src/obj/uvma_obi_memory_cfg.sv | 39 ++++++++++++++++--- .../src/seq/uvma_obi_memory_slv_base_seq.sv | 14 +++++-- .../uvma_pma/src/comps/uvma_pma_sb.sv | 10 ++--- 3 files changed, 50 insertions(+), 13 deletions(-) diff --git a/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv b/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv index e9f5adde70..b0ba65c339 100644 --- a/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv +++ b/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv @@ -245,7 +245,17 @@ class uvma_obi_memory_cfg_c extends uvm_object; /** * Calculate a random atomic exokay response from random knobs */ - extern function bit calc_random_exokay(bit[31:0] addr); + extern function bit calc_random_exokay(bit[31:0] addr, bit is_SCW); + + /** + * Invalidate RL.W reservation set + */ + extern function void invalidate_reservation(); + + /** + * Set RL.W reservation set + */ + extern function void set_reservation(bit[31:0] addr, int nr_words_reserved); /** * Returns 1 if this OBI agent supports version 1.2 or higher @@ -272,6 +282,8 @@ function uvma_obi_memory_cfg_c::new(string name="uvma_obi_memory_cfg"); rvalid_singles_stall = 1; end + directed_slv_exokay_valid = 0; + endfunction : new @@ -353,14 +365,15 @@ function bit uvma_obi_memory_cfg_c::calc_random_err(bit[31:0] addr); endfunction : calc_random_err -function bit uvma_obi_memory_cfg_c::calc_random_exokay(bit[31:0] addr); +function bit uvma_obi_memory_cfg_c::calc_random_exokay(bit[31:0] addr, bit is_SCW); bit exokay; // Check for a directed error reponse first - if (directed_slv_exokay_valid && - (addr <= directed_slv_exokay_addr_min) && - (addr <= directed_slv_exokay_addr_min)) begin + if (is_SCW && + (!directed_slv_exokay_valid || + ((addr < directed_slv_exokay_addr_min) || + (addr > directed_slv_exokay_addr_max)))) begin return 0; end @@ -378,6 +391,22 @@ function bit uvma_obi_memory_cfg_c::calc_random_exokay(bit[31:0] addr); endfunction : calc_random_exokay +function void uvma_obi_memory_cfg_c::invalidate_reservation(); + + directed_slv_exokay_valid = 0; + +endfunction : invalidate_reservation + +function void uvma_obi_memory_cfg_c::set_reservation(bit[31:0] addr, int nr_words_reserved); + + if (addr[1:0] == 2'b0) begin + directed_slv_exokay_valid = 1; + directed_slv_exokay_addr_min = addr; + directed_slv_exokay_addr_max = addr + 4*(nr_words_reserved-1); + end + +endfunction : set_reservation + function bit uvma_obi_memory_cfg_c::is_1p2_or_higher(); return (version >= UVMA_OBI_MEMORY_VERSION_1P2) ? 1 : 0; diff --git a/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv b/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv index b68591b4d6..cb4ab811e8 100644 --- a/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv +++ b/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv @@ -165,13 +165,21 @@ endfunction : add_err function void uvma_obi_memory_slv_base_seq_c::add_exokay(uvma_obi_memory_mon_trn_c mon_req, uvma_obi_memory_slv_seq_item_c slv_rsp); - // Only respond exokay == 1 to SC or LR as signaled by atop + int nr_words_reserved = 1; + if (mon_req.atop[5] != 1'b1 || !(mon_req.atop[4:0] inside {5'h2, 5'h3})) begin slv_rsp.exokay = 0; - return; + end else begin + slv_rsp.exokay = cfg.calc_random_exokay(slv_rsp.orig_trn.address, (mon_req.atop == 6'h23)); + end + + if (slv_rsp.exokay && mon_req.atop == 6'h22) begin //LR.W + cfg.set_reservation(slv_rsp.orig_trn.address, nr_words_reserved); end - slv_rsp.exokay = cfg.calc_random_exokay(slv_rsp.orig_trn.address); + if (mon_req.atop == 6'h23) begin //SC.W + cfg.invalidate_reservation(); + end endfunction : add_exokay diff --git a/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv b/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv index 35ff18d6c4..5d73bdfc3c 100644 --- a/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv +++ b/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv @@ -493,11 +493,11 @@ function void uvma_pma_sb_c::check_obi_d_mapped_region(uvma_obi_memory_mon_trn_c end // Check: atomic attributes should be 0 - if (obi.atop) begin - `uvm_error("PMAOBID", $sformatf("OBI D %s address: 0x%08x, region: %0d atop is not zero, OBI: 0x%0x", - obi.access_type.name(), obi.address, index, - obi.atop)); - end + //if (obi.atop) begin + // `uvm_error("PMAOBID", $sformatf("OBI D %s address: 0x%08x, region: %0d atop is not zero, OBI: 0x%0x", + // obi.access_type.name(), obi.address, index, + // obi.atop)); + //end end endfunction : check_obi_d_mapped_region From 30b7f1f22609ab1eb77200d3e229cd684528dc41 Mon Sep 17 00:00:00 2001 From: Kristine Dosvik Date: Thu, 19 Oct 2023 15:54:47 +0200 Subject: [PATCH 20/22] change exokay calcuclation variables, remove atomic TODOs Signed-off-by: Kristine Dosvik --- .../src/obj/uvma_obi_memory_cfg.sv | 28 ++++++---- .../src/seq/uvma_obi_memory_slv_base_seq.sv | 4 +- .../uvma_pma/src/comps/uvma_pma_sb.sv | 54 ++++++------------- 3 files changed, 35 insertions(+), 51 deletions(-) diff --git a/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv b/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv index b0ba65c339..f0681078b4 100644 --- a/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv +++ b/lib/uvm_agents/uvma_obi_memory/src/obj/uvma_obi_memory_cfg.sv @@ -93,6 +93,11 @@ class uvma_obi_memory_cfg_c extends uvm_object; bit [31:0] directed_slv_exokay_addr_max; bit directed_slv_exokay_valid; + bit [31:0] directed_slv_reservation_addr_min; + bit [31:0] directed_slv_reservation_addr_max; + bit directed_slv_reservation_valid; + bit [31:0] directed_slv_nr_reserved_words = 32'b1; + `uvm_object_utils_begin(uvma_obi_memory_cfg_c) `uvm_field_int ( enabled , UVM_DEFAULT) @@ -145,6 +150,11 @@ class uvma_obi_memory_cfg_c extends uvm_object; `uvm_field_int ( directed_slv_exokay_addr_min , UVM_DEFAULT) `uvm_field_int ( directed_slv_exokay_addr_max , UVM_DEFAULT) `uvm_field_int ( directed_slv_exokay_valid , UVM_DEFAULT) + + `uvm_field_int ( directed_slv_reservation_addr_min , UVM_DEFAULT) + `uvm_field_int ( directed_slv_reservation_addr_max , UVM_DEFAULT) + `uvm_field_int ( directed_slv_reservation_valid , UVM_DEFAULT) + `uvm_field_int ( directed_slv_nr_reserved_words , UVM_DEFAULT) `uvm_object_utils_end constraint defaults_cons { @@ -255,7 +265,7 @@ class uvma_obi_memory_cfg_c extends uvm_object; /** * Set RL.W reservation set */ - extern function void set_reservation(bit[31:0] addr, int nr_words_reserved); + extern function void set_reservation(bit[31:0] addr); /** * Returns 1 if this OBI agent supports version 1.2 or higher @@ -371,9 +381,9 @@ function bit uvma_obi_memory_cfg_c::calc_random_exokay(bit[31:0] addr, bit is_SC // Check for a directed error reponse first if (is_SCW && - (!directed_slv_exokay_valid || - ((addr < directed_slv_exokay_addr_min) || - (addr > directed_slv_exokay_addr_max)))) begin + (!directed_slv_reservation_valid || + ((addr < directed_slv_reservation_addr_min) || + (addr > directed_slv_reservation_addr_max)))) begin return 0; end @@ -393,16 +403,16 @@ endfunction : calc_random_exokay function void uvma_obi_memory_cfg_c::invalidate_reservation(); - directed_slv_exokay_valid = 0; + directed_slv_reservation_valid = 0; endfunction : invalidate_reservation -function void uvma_obi_memory_cfg_c::set_reservation(bit[31:0] addr, int nr_words_reserved); +function void uvma_obi_memory_cfg_c::set_reservation(bit[31:0] addr); if (addr[1:0] == 2'b0) begin - directed_slv_exokay_valid = 1; - directed_slv_exokay_addr_min = addr; - directed_slv_exokay_addr_max = addr + 4*(nr_words_reserved-1); + directed_slv_reservation_valid = 1; + directed_slv_reservation_addr_min = addr; + directed_slv_reservation_addr_max = addr + 4*(directed_slv_nr_reserved_words-1); end endfunction : set_reservation diff --git a/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv b/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv index cb4ab811e8..ebf46798c0 100644 --- a/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv +++ b/lib/uvm_agents/uvma_obi_memory/src/seq/uvma_obi_memory_slv_base_seq.sv @@ -165,8 +165,6 @@ endfunction : add_err function void uvma_obi_memory_slv_base_seq_c::add_exokay(uvma_obi_memory_mon_trn_c mon_req, uvma_obi_memory_slv_seq_item_c slv_rsp); - int nr_words_reserved = 1; - if (mon_req.atop[5] != 1'b1 || !(mon_req.atop[4:0] inside {5'h2, 5'h3})) begin slv_rsp.exokay = 0; end else begin @@ -174,7 +172,7 @@ function void uvma_obi_memory_slv_base_seq_c::add_exokay(uvma_obi_memory_mon_trn end if (slv_rsp.exokay && mon_req.atop == 6'h22) begin //LR.W - cfg.set_reservation(slv_rsp.orig_trn.address, nr_words_reserved); + cfg.set_reservation(slv_rsp.orig_trn.address); end if (mon_req.atop == 6'h23) begin //SC.W diff --git a/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv b/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv index 5d73bdfc3c..64f957fd53 100644 --- a/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv +++ b/lib/uvm_agents/uvma_pma/src/comps/uvma_pma_sb.sv @@ -290,14 +290,6 @@ function void uvma_pma_sb_c::check_obi_i_default_region(uvma_obi_memory_mon_trn_ obi.access_type.name(), obi.address, override_region, obi.memtype[UVMA_OBI_MEMORY_MEMTYPE_CACHEABLE_BIT], cfg.region_overrides[override_region].cacheable)); end - - // TODO: this needs to be modified when atomics are introduced for X to preserve code compatibility - // Check: atomic attributes should be 0 - if (obi.atop) begin - `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x, region: %0d atop is not zero, OBI: 0x%0x", - obi.access_type.name(), obi.address, override_region, - obi.atop)); - end end else begin // Check: Bufferable bit must be 0 in OBI for instruction fetches if (obi.memtype[UVMA_OBI_MEMORY_MEMTYPE_BUFFERABLE_BIT]) begin @@ -310,13 +302,13 @@ function void uvma_pma_sb_c::check_obi_i_default_region(uvma_obi_memory_mon_trn_ `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x cacheable bit set for PMA default region", obi.access_type.name(), obi.address)); end + end - // Check: atomic attributes should be 0 - if (obi.atop) begin - `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x atop is not zero, OBI: 0x%0x", - obi.access_type.name(), obi.address, - obi.atop)); - end + // Check: atomic attributes should be 0 for all instruction fetches + if (obi.atop) begin + `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x, region: %0d atop is not zero, OBI: 0x%0x", + obi.access_type.name(), obi.address, override_region, + obi.atop)); end endfunction : check_obi_i_default_region @@ -342,14 +334,6 @@ function void uvma_pma_sb_c::check_obi_i_mapped_region(uvma_obi_memory_mon_trn_c obi.access_type.name(), obi.address, override_region, obi.memtype[UVMA_OBI_MEMORY_MEMTYPE_CACHEABLE_BIT], cfg.region_overrides[override_region].cacheable)); end - - // TODO: this needs to be modified when atomics are introduced for X to preserve code compatibility - // Check: atomic attributes should be 0 - if (obi.atop) begin - `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x, override region: %0d atop is not zero, OBI: 0x%0x", - obi.access_type.name(), obi.address, override_region, - obi.atop)); - end end else begin // Check: Must be main memory if (!cfg.regions[index].main) begin @@ -369,13 +353,13 @@ function void uvma_pma_sb_c::check_obi_i_mapped_region(uvma_obi_memory_mon_trn_c obi.access_type.name(), obi.address, index, obi.memtype[UVMA_OBI_MEMORY_MEMTYPE_CACHEABLE_BIT], cfg.regions[index].cacheable)); end + end - // Check: atomic attributes should be 0 - if (obi.atop) begin - `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x, region: %0d atop is not zero, OBI: 0x%0x", - obi.access_type.name(), obi.address, index, - obi.atop)); - end + // Check: atomic attributes should be 0 for all instruction fetches + if (obi.atop) begin + `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x, override region: %0d atop is not zero, OBI: 0x%0x", + obi.access_type.name(), obi.address, override_region, + obi.atop)); end endfunction : check_obi_i_mapped_region @@ -413,8 +397,7 @@ function void uvma_pma_sb_c::check_obi_d_default_region(uvma_obi_memory_mon_trn_ obi.memtype[UVMA_OBI_MEMORY_MEMTYPE_CACHEABLE_BIT], cfg.region_overrides[override_region].cacheable)); end - // TODO: this needs to be modified when atomics are introduced for X to preserve code compatibility - // Check: atomic attributes should be 0 + // Check: atomic attributes should be 0 for debug mode if (obi.atop) begin `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x, override region: %0d atop is not zero, OBI: 0x%0x", obi.access_type.name(), obi.address, override_region, @@ -438,6 +421,7 @@ function void uvma_pma_sb_c::check_obi_d_default_region(uvma_obi_memory_mon_trn_ `uvm_error("PMAOBID", $sformatf("OBI D %s address: 0x%08x atop is not zero for PMA default region, OBI: 0x%0x", obi.access_type.name(), obi.address, obi.atop)); + end end @@ -461,8 +445,7 @@ function void uvma_pma_sb_c::check_obi_d_mapped_region(uvma_obi_memory_mon_trn_c obi.memtype[UVMA_OBI_MEMORY_MEMTYPE_CACHEABLE_BIT], cfg.region_overrides[override_region].cacheable)); end - // TODO: this needs to be modified when atomics are introduced for X to preserve code compatibility - // Check: atomic attributes should be 0 + // Check: atomic attributes should be 0 for debug mode if (obi.atop) begin `uvm_error("PMAOBII", $sformatf("OBI I %s address: 0x%08x, override region: %0d atop is not zero, OBI: 0x%0x", obi.access_type.name(), obi.address, override_region, @@ -491,13 +474,6 @@ function void uvma_pma_sb_c::check_obi_d_mapped_region(uvma_obi_memory_mon_trn_c obi.access_type.name(), obi.address, index, obi.memtype[UVMA_OBI_MEMORY_MEMTYPE_CACHEABLE_BIT], cfg.regions[index].cacheable)); end - - // Check: atomic attributes should be 0 - //if (obi.atop) begin - // `uvm_error("PMAOBID", $sformatf("OBI D %s address: 0x%08x, region: %0d atop is not zero, OBI: 0x%0x", - // obi.access_type.name(), obi.address, index, - // obi.atop)); - //end end endfunction : check_obi_d_mapped_region From b626b2634b452b1ebe0244f835d1cad601b94385 Mon Sep 17 00:00:00 2001 From: Robin Pedersen Date: Thu, 16 Nov 2023 16:56:46 +0100 Subject: [PATCH 21/22] update x-dv hash Signed-off-by: Robin Pedersen --- bin/clonetb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bin/clonetb b/bin/clonetb index ced8db6a9c..63157fc7ea 100755 --- a/bin/clonetb +++ b/bin/clonetb @@ -81,7 +81,7 @@ clone() { clone_cv32e40x() { CV_CORE=cv32e40x VERIF_ENV_REPO=https://github.com/openhwgroup/cv32e40x-dv.git - VERIF_ENV_REF=e7bae19ebc7806021f909d49484c66d302b2f8a8 + VERIF_ENV_REF=be17b8902002f91803abde4bfb8caa91088575e1 clone ignore_cloned_directory From a98a32549d32515c72f28022c0f2e9e0b23f6974 Mon Sep 17 00:00:00 2001 From: Robin Pedersen Date: Mon, 20 Nov 2023 11:04:04 +0100 Subject: [PATCH 22/22] fix compilation Signed-off-by: Robin Pedersen --- .../uvmt_cv32e40s_pmp_assert.sv | 0 .../uvmt_cv32e40s_pmprvfi_assert.sv | 0 .../uvmt_cv32e40s_umode_assert.sv | 20 ++--- .../uvmt_cv32e40s_umode_cov.sv | 0 cv32e40s/tb/uvmt/uvmt_cv32e40s_tb.sv | 88 +++++++++++-------- cv32e40s/tb/uvmt/uvmt_cv32e40s_tb_files.flist | 28 +++--- 6 files changed, 73 insertions(+), 63 deletions(-) rename cv32e40s/tb/{uvmt => assertions}/uvmt_cv32e40s_pmp_assert.sv (100%) rename cv32e40s/tb/{uvmt => assertions}/uvmt_cv32e40s_pmprvfi_assert.sv (100%) rename cv32e40s/tb/{uvmt => assertions}/uvmt_cv32e40s_umode_assert.sv (98%) rename cv32e40s/tb/{uvmt => assertions}/uvmt_cv32e40s_umode_cov.sv (100%) diff --git a/cv32e40s/tb/uvmt/uvmt_cv32e40s_pmp_assert.sv b/cv32e40s/tb/assertions/uvmt_cv32e40s_pmp_assert.sv similarity index 100% rename from cv32e40s/tb/uvmt/uvmt_cv32e40s_pmp_assert.sv rename to cv32e40s/tb/assertions/uvmt_cv32e40s_pmp_assert.sv diff --git a/cv32e40s/tb/uvmt/uvmt_cv32e40s_pmprvfi_assert.sv b/cv32e40s/tb/assertions/uvmt_cv32e40s_pmprvfi_assert.sv similarity index 100% rename from cv32e40s/tb/uvmt/uvmt_cv32e40s_pmprvfi_assert.sv rename to cv32e40s/tb/assertions/uvmt_cv32e40s_pmprvfi_assert.sv diff --git a/cv32e40s/tb/uvmt/uvmt_cv32e40s_umode_assert.sv b/cv32e40s/tb/assertions/uvmt_cv32e40s_umode_assert.sv similarity index 98% rename from cv32e40s/tb/uvmt/uvmt_cv32e40s_umode_assert.sv rename to cv32e40s/tb/assertions/uvmt_cv32e40s_umode_assert.sv index fa86e34698..67dd3cff70 100644 --- a/cv32e40s/tb/uvmt/uvmt_cv32e40s_umode_assert.sv +++ b/cv32e40s/tb/assertions/uvmt_cv32e40s_umode_assert.sv @@ -932,21 +932,21 @@ module uvmt_cv32e40s_umode_assert // vplan:InstrProt - a_instr_prot: assert property ( + a_rvfi_instr_prot: assert property ( rvfi_valid |-> - (rvfi_if.instr_prot[2:1] == rvfi_if.rvfi_mode) || + (rvfi_if.rvfi_instr_prot[2:1] == rvfi_if.rvfi_mode) || (rvfi_if.rvfi_trap.exception_cause == cv32e40s_pkg::EXC_CAUSE_INSTR_FAULT) || (rvfi_trap.debug_cause == DBG_CAUSE_TRIGGER) //Note: Triggers can overshadow access faults ) else `uvm_error(info_tag, "the prot on fetch must match the mode on retirement"); - a_instr_prot_legal: assert property ( + a_rvfi_instr_prot_legal: assert property ( rvfi_valid && (rvfi_if.rvfi_trap.exception_cause != cv32e40s_pkg::EXC_CAUSE_INSTR_FAULT) |-> - (rvfi_if.instr_prot[2:0] inside {3'b 000, 3'b 110}) - ) else `uvm_error(info_tag, "instr_prot illegal value"); + (rvfi_if.rvfi_instr_prot[2:0] inside {3'b 000, 3'b 110}) + ) else `uvm_error(info_tag, "rvfi_instr_prot illegal value"); a_prot_iside_legal: assert property ( obi_iside_prot inside {3'b 000, 3'b 110} @@ -959,14 +959,14 @@ module uvmt_cv32e40s_umode_assert rvfi_valid && (rvfi_if.rvfi_mem_rmask || rvfi_if.rvfi_mem_wmask) |-> - (rvfi_if.mem_prot[2:1] == effective_rvfi_privmode) + (rvfi_if.rvfi_mem_prot[2:1] == effective_rvfi_privmode) ) else `uvm_error(info_tag, "the prot on load/store must match the effective mode on retirement"); a_data_prot_legal: assert property ( rvfi_valid && (rvfi_if.rvfi_trap.exception_cause != cv32e40s_pkg::EXC_CAUSE_INSTR_FAULT) |-> - (rvfi_if.mem_prot[2:0] inside {3'b 001, 3'b 111}) + (rvfi_if.rvfi_mem_prot[2:0] inside {3'b 001, 3'b 111}) ) else `uvm_error(info_tag, "data_prot illegal value"); a_prot_dside_legal: assert property ( @@ -977,7 +977,7 @@ module uvmt_cv32e40s_umode_assert logic [NMEM-1:0] mem_act; for (genvar i = 0; i < NMEM; i++) begin: gen_data_prot_equals always_comb begin - data_prot_equals[i] = (rvfi_if.mem_prot[i*3+:3] == rvfi_if.mem_prot[2:0]); + data_prot_equals[i] = (rvfi_if.rvfi_mem_prot[i*3+:3] == rvfi_if.rvfi_mem_prot[2:0]); mem_act[i] = |rvfi_if.check_mem_act(i); end end @@ -1008,7 +1008,7 @@ module uvmt_cv32e40s_umode_assert rvfi_if.rvfi_valid && rvfi_if.rvfi_dbg_mode |-> - (rvfi_if.instr_prot[2:1] == MODE_M) || + (rvfi_if.rvfi_instr_prot[2:1] == MODE_M) || (rvfi_if.rvfi_trap.exception_cause == cv32e40s_pkg::EXC_CAUSE_INSTR_FAULT) ) else `uvm_error(info_tag, "dmode should fetch as mmode"); @@ -1017,7 +1017,7 @@ module uvmt_cv32e40s_umode_assert rvfi_valid && (|rvfi_if.rvfi_mem_rmask || |rvfi_if.rvfi_mem_wmask) |-> - (rvfi_if.mem_prot[2:1] == effective_rvfi_privmode) + (rvfi_if.rvfi_mem_prot[2:1] == effective_rvfi_privmode) ) else `uvm_error(info_tag, "dmode should fetch as effective mode"); diff --git a/cv32e40s/tb/uvmt/uvmt_cv32e40s_umode_cov.sv b/cv32e40s/tb/assertions/uvmt_cv32e40s_umode_cov.sv similarity index 100% rename from cv32e40s/tb/uvmt/uvmt_cv32e40s_umode_cov.sv rename to cv32e40s/tb/assertions/uvmt_cv32e40s_umode_cov.sv diff --git a/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb.sv b/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb.sv index 84a5619b3a..474a5f623f 100644 --- a/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb.sv +++ b/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb.sv @@ -164,45 +164,55 @@ module uvmt_cv32e40s_tb; // "rvfi_instr_if" bind cv32e40s_wrapper - uvma_rvfi_instr_if_t#(uvmt_cv32e40s_base_test_pkg::ILEN, - uvmt_cv32e40s_base_test_pkg::XLEN) rvfi_instr_if(.clk(clk_i), - .reset_n(rst_ni), - - .rvfi_valid(rvfi_i.rvfi_valid[0]), - .rvfi_order(rvfi_i.rvfi_order[uvma_rvfi_pkg::ORDER_WL*0+:uvma_rvfi_pkg::ORDER_WL]), - .rvfi_insn(rvfi_i.rvfi_insn[uvmt_cv32e40s_base_test_pkg::ILEN*0+:uvmt_cv32e40s_base_test_pkg::ILEN]), - .rvfi_trap(rvfi_i.rvfi_trap), - .rvfi_halt(rvfi_i.rvfi_halt[0]), - .rvfi_intr(rvfi_i.rvfi_intr), - .rvfi_dbg(rvfi_i.rvfi_dbg), - .rvfi_dbg_mode(rvfi_i.rvfi_dbg_mode), - .rvfi_nmip(rvfi_i.rvfi_nmip), - .rvfi_mode(rvfi_i.rvfi_mode[uvma_rvfi_pkg::MODE_WL*0+:uvma_rvfi_pkg::MODE_WL]), - .rvfi_ixl(rvfi_i.rvfi_ixl[uvma_rvfi_pkg::IXL_WL*0+:uvma_rvfi_pkg::IXL_WL]), - .rvfi_pc_rdata(rvfi_i.rvfi_pc_rdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_pc_wdata(rvfi_i.rvfi_pc_wdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_rs1_addr(rvfi_i.rvfi_rs1_addr[uvma_rvfi_pkg::GPR_ADDR_WL*0+:uvma_rvfi_pkg::GPR_ADDR_WL]), - .rvfi_rs1_rdata(rvfi_i.rvfi_rs1_rdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_rs2_addr(rvfi_i.rvfi_rs2_addr[uvma_rvfi_pkg::GPR_ADDR_WL*0+:uvma_rvfi_pkg::GPR_ADDR_WL]), - .rvfi_rs2_rdata(rvfi_i.rvfi_rs2_rdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_rs3_addr('0), - .rvfi_rs3_rdata('0), - .rvfi_rd1_addr(rvfi_i.rvfi_rd_addr[uvma_rvfi_pkg::GPR_ADDR_WL*0+:uvma_rvfi_pkg::GPR_ADDR_WL]), - .rvfi_rd1_wdata(rvfi_i.rvfi_rd_wdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_rd2_addr('0), - .rvfi_rd2_wdata('0), - .rvfi_gpr_rdata(rvfi_i.rvfi_gpr_rdata[32*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:32*uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_gpr_rmask(rvfi_i.rvfi_gpr_rmask[32*0 +:32]), - .rvfi_gpr_wdata(rvfi_i.rvfi_gpr_wdata[32*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:32*uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_gpr_wmask(rvfi_i.rvfi_gpr_wmask[32*0 +:32]), - .rvfi_mem_addr(rvfi_i.rvfi_mem_addr[ uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_mem_rdata(rvfi_i.rvfi_mem_rdata[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_mem_rmask(rvfi_i.rvfi_mem_rmask[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8]), - .rvfi_mem_wdata(rvfi_i.rvfi_mem_wdata[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN]), - .rvfi_mem_wmask(rvfi_i.rvfi_mem_wmask[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8]), - .instr_prot(rvfi_i.rvfi_instr_prot), - .mem_prot(rvfi_i.rvfi_mem_prot) - ); + uvma_rvfi_instr_if_t#( + uvmt_cv32e40s_base_test_pkg::ILEN, + uvmt_cv32e40s_base_test_pkg::XLEN + ) rvfi_instr_if( + .clk (clk_i), + .reset_n (rst_ni), + + .rvfi_valid (rvfi_i.rvfi_valid[0]), + .rvfi_order (rvfi_i.rvfi_order[uvma_rvfi_pkg::ORDER_WL*0+:uvma_rvfi_pkg::ORDER_WL]), + .rvfi_insn (rvfi_i.rvfi_insn[uvmt_cv32e40s_base_test_pkg::ILEN*0+:uvmt_cv32e40s_base_test_pkg::ILEN]), + .rvfi_trap (rvfi_i.rvfi_trap), + .rvfi_halt (rvfi_i.rvfi_halt[0]), + .rvfi_intr (rvfi_i.rvfi_intr), + .rvfi_dbg (rvfi_i.rvfi_dbg), + .rvfi_dbg_mode (rvfi_i.rvfi_dbg_mode), + .rvfi_nmip (rvfi_i.rvfi_nmip), + .rvfi_mode (rvfi_i.rvfi_mode[uvma_rvfi_pkg::MODE_WL*0+:uvma_rvfi_pkg::MODE_WL]), + .rvfi_ixl (rvfi_i.rvfi_ixl[uvma_rvfi_pkg::IXL_WL*0+:uvma_rvfi_pkg::IXL_WL]), + .rvfi_pc_rdata (rvfi_i.rvfi_pc_rdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_pc_wdata (rvfi_i.rvfi_pc_wdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_rs1_addr (rvfi_i.rvfi_rs1_addr[uvma_rvfi_pkg::GPR_ADDR_WL*0+:uvma_rvfi_pkg::GPR_ADDR_WL]), + .rvfi_rs1_rdata (rvfi_i.rvfi_rs1_rdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_rs2_addr (rvfi_i.rvfi_rs2_addr[uvma_rvfi_pkg::GPR_ADDR_WL*0+:uvma_rvfi_pkg::GPR_ADDR_WL]), + .rvfi_rs2_rdata (rvfi_i.rvfi_rs2_rdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_rs3_addr ('0), + .rvfi_rs3_rdata ('0), + .rvfi_rd1_addr (rvfi_i.rvfi_rd_addr[uvma_rvfi_pkg::GPR_ADDR_WL*0+:uvma_rvfi_pkg::GPR_ADDR_WL]), + .rvfi_rd1_wdata (rvfi_i.rvfi_rd_wdata[uvmt_cv32e40s_base_test_pkg::XLEN*0+:uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_rd2_addr ('0), + .rvfi_rd2_wdata ('0), + .rvfi_gpr_rdata (rvfi_i.rvfi_gpr_rdata[32*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:32*uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_gpr_rmask (rvfi_i.rvfi_gpr_rmask[32*0 +:32]), + .rvfi_gpr_wdata (rvfi_i.rvfi_gpr_wdata[32*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:32*uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_gpr_wmask (rvfi_i.rvfi_gpr_wmask[32*0 +:32]), + .rvfi_mem_addr (rvfi_i.rvfi_mem_addr[ uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_mem_rdata (rvfi_i.rvfi_mem_rdata[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_mem_rmask (rvfi_i.rvfi_mem_rmask[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8]), + .rvfi_mem_wdata (rvfi_i.rvfi_mem_wdata[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN]), + .rvfi_mem_wmask (rvfi_i.rvfi_mem_wmask[uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8*0 +:uvma_rvfi_pkg::NMEM*uvmt_cv32e40s_base_test_pkg::XLEN/8]), + .rvfi_instr_prot (rvfi_i.rvfi_instr_prot), + .rvfi_instr_memtype (rvfi_i.rvfi_instr_memtype), + .rvfi_instr_dbg (rvfi_i.rvfi_instr_dbg), + .rvfi_mem_prot (rvfi_i.rvfi_mem_prot), + .rvfi_mem_exokay (rvfi_i.rvfi_mem_exokay), + .rvfi_mem_err (rvfi_i.rvfi_mem_err), + .rvfi_mem_atop (rvfi_i.rvfi_mem_atop), + .rvfi_mem_memtype (rvfi_i.rvfi_mem_memtype), + .rvfi_mem_dbg (rvfi_i.rvfi_mem_dbg) + ); // RVFI CSR binds `RVFI_CSR_BIND(cpuctrl) diff --git a/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb_files.flist b/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb_files.flist index f73eec0cbb..7aeba8124f 100644 --- a/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb_files.flist +++ b/cv32e40s/tb/uvmt/uvmt_cv32e40s_tb_files.flist @@ -18,39 +18,39 @@ ${DV_UVMT_PATH}/uvmt_cv32e40s_dut_wrap.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_tb.sv +${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_fencei_assert.sv +${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_pmp_assert.sv +${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_pmprvfi_assert.sv +${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_umode_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_clic_interrupt_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_debug_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_triggers_assert_cov.sv -${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_fencei_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_integration_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_interrupt_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_pma_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_pmp_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_pmprvfi_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_rvfi_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_umode_assert.sv +${DV_UVMT_PATH}/uvmt_cv32e40s_triggers_assert_cov.sv +${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_bus_protocol_hardening_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_data_independent_timing_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_hardened_pc_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_reduced_profiling_infrastructure_assert.sv +${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_dummy_and_hint_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_hardened_csrs_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_hardened_csrs_clic_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_hardened_csrs_interrupt_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_hardened_csrs_pmp_assert.sv +${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_hardened_pc_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_interface_integrity_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_dummy_and_hint_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_bus_protocol_hardening_assert.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_security_alerts_assert.sv +${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_reduced_profiling_infrastructure_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_register_file_ecc_assert.sv +${DV_UVMT_PATH}/uvmt_cv32e40s_xsecure_assert/uvmt_cv32e40s_xsecure_security_alerts_assert.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_zc_assert.sv ${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_pma_model.sv ${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_pmp_model.sv -${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_sl_obi_phases_monitor.sv +${DV_UVMT_PATH}/../assertions/uvmt_cv32e40s_umode_cov.sv +${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_rchk_shim.sv ${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_sl_fifo.sv -${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_sl_trigger_match_mem.sv +${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_sl_obi_phases_monitor.sv ${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_sl_trigger_match.sv +${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_sl_trigger_match_mem.sv ${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_support_logic.sv -${DV_UVMT_PATH}/support_logic/uvmt_cv32e40s_rchk_shim.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_pma_cov.sv ${DV_UVMT_PATH}/uvmt_cv32e40s_rvfi_cov.sv -${DV_UVMT_PATH}/uvmt_cv32e40s_umode_cov.sv