From b2f1b5c0a5ba9e633a7b18f684ca9951dbf72b42 Mon Sep 17 00:00:00 2001 From: Pascal Gouedo Date: Mon, 8 Jul 2024 15:17:03 +0200 Subject: [PATCH] IDV_CONFIG_MAX_NET_LATENCY_RETIREMENTS increased from 21 to 25 to resolve an imperas model/RTL mismatch. Signed-off-by: Pascal Gouedo --- cv32e40p/tb/uvmt/uvmt_cv32e40p_imperas_dv_wrap.sv | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/cv32e40p/tb/uvmt/uvmt_cv32e40p_imperas_dv_wrap.sv b/cv32e40p/tb/uvmt/uvmt_cv32e40p_imperas_dv_wrap.sv index 8b32d16195..0e2e5ed035 100644 --- a/cv32e40p/tb/uvmt/uvmt_cv32e40p_imperas_dv_wrap.sv +++ b/cv32e40p/tb/uvmt/uvmt_cv32e40p_imperas_dv_wrap.sv @@ -547,7 +547,7 @@ module uvmt_cv32e40p_imperas_dv_wrap // Select processor name void'(rvviRefConfigSetString(IDV_CONFIG_MODEL_NAME, "CV32E40P")); // Worst case propagation of events 19+2 retirements. (19 due to long fpu multicycle instr that observed meantime. +2 is buffer) - void'(rvviRefConfigSetInt(IDV_CONFIG_MAX_NET_LATENCY_RETIREMENTS, 21)); + void'(rvviRefConfigSetInt(IDV_CONFIG_MAX_NET_LATENCY_RETIREMENTS, 25)); // Redirect stdout to parent systemverilog simulator void'(rvviRefConfigSetInt(IDV_CONFIG_REDIRECT_STDOUT, RVVI_TRUE));