From 1570a6338ef4557b8f0d505cfea4c5ad201f17e0 Mon Sep 17 00:00:00 2001 From: Corey Hickson Date: Wed, 6 Nov 2024 03:32:53 -0800 Subject: [PATCH] Fixed fmvp.d.x bug --- src/fpu/fctrl.sv | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/fpu/fctrl.sv b/src/fpu/fctrl.sv index ab9cad093a..d04fc45fae 100755 --- a/src/fpu/fctrl.sv +++ b/src/fpu/fctrl.sv @@ -248,9 +248,9 @@ module fctrl import cvw::*; #(parameter cvw_t P) ( // coverage off // Not covered in testing because rv64gc is not RV64Q or RV32D 7'b1011001: if (P.ZFA_SUPPORTED & P.XLEN == 32 & P.D_SUPPORTED & Funct3D == 3'b000) - ControlsD = `FCTRLW'b1_0_01_00_101_0_0_0_0_0; // fmvp.d.x (Zfa) + ControlsD = `FCTRLW'b1_0_00_00_011_0_0_0_1_0; // fmvp.d.x (Zfa) 7'b1011011: if (P.ZFA_SUPPORTED & P.XLEN == 64 & P.Q_SUPPORTED & Funct3D == 3'b000) - ControlsD = `FCTRLW'b1_0_01_00_101_0_0_0_0_0; // fmvp.q.x (Zfa) + ControlsD = `FCTRLW'b1_0_00_00_011_0_0_0_1_0; // fmvp.q.x (Zfa) // coverage on endcase endcase