Releases: pyocd/pyOCD
Releases · pyocd/pyOCD
v0.28.2
Boards and targets
- Updated the flash algorithm for NXP i.MX RT1021xxxxx. (Thanks @Hoohaha.)
Fixes
- Commander: Fix
quit
/exit
command. (Thanks @Hoohaha.) - Commander: Removed (recently broken) support for using core register names as commands that print the register's value.
- Commander: Output from system commands is captured and written to the command context output. This only visibly affects running system commands using gdb's
monitor
command. - Commander: Command parsing more closely matches shell command parsing. In particular, quotes are honoured within words, e.g.
hello"my"friend
is parsed ashellomyfriend
. Backslash-escapes are also supported, but within quotes only quote and backslash characters can be escaped. - CortexM: Fix early exit of range step loop by step hook. This appeared as the inability to interrupt a statement step over an infinite loop in gdb in certain cases (when gdb used a range step command).
- GDBServer: no longer send an unexpected response to the
k
(kill) command.
v0.28.1
v0.28.0
Important note: Support for Python 2 is deprecated and planned to be dropped from an upcoming release. Existing releases of pyocd will, of course, continue to work with Python 2. If this is a major issue for you moving forward, please create a new issue describing your concerns.
Additions
- Replaced the gdbserver remote monitor commands with the command set from the commander subcommand. This is the first step towards providing a full command mini-language integrated throughout pyocd.
- Added support to pyocd for RTOS and debug probe plugins. Third party packages on PyPI can now add features to pyocd.
- Debug probes can be shared over a TCP connection and accessed remotely. Documentation is provided in here.
- The gdbserver subcommand adds a command line argument
--probe-server
to cause the debug probe server to be started simultaneous with the gdbserver. For allows, for instance, to connect a pyocd commander to an already-running gdbserver. - Some new core registers are exposed to the Python API and gdb: the NS versions of MSP and PSP, MSPLIM and PSPLIM for S and NS, and VPR.
- Command history file support, so the history is saved between runs of pyocd commander.
- By default the history is stored in
~/.pyocd_history
. ThePYOCD_HISTORY
environment variable will override this if set. - The default history length is 1000 entries. The
PYOCD_HISTORY_LENGTH
environment variable orcommander.history_length
option allow you to change this. Setting either one to -1 will enable an infinite history (but beware history file size).
- By default the history is stored in
- The Arm SDC-600 Secure Debug Channel IP is supported in the internal Python API.
- The v8.1-M MVE extension is detected.
Boards and targets
- Added NXP MIMXRT1024-EVK, MIMXRT1060-EVK, and MIMXRT1064-EVK boards and i.MX RT1024, i.MX RT1060, and i.MX RT1064 targets (
mimxrt1024
,mimxrt1060
, andmimxrt1064
). (Thanks @Hoohaha) - Added new HDSC targets HC32F4A0xG, HC32F4A0xI and HC32M423 of HDSC MCU. (Thanks @lennvn)
- Added OTP programming algorithm for the HDSC HC32F4A0. (Thanks @lennvn)
- Added Nuvoton NuMaker-PFM-M487 board and M487JIDAE target,
m487jidae
. (Thanks @ychsu-tf) - Many fixes for NXP i.MX RT series devices related to reset and halt, as well as flash algorithms. (Thanks @Hoohaha)
- Fixed HDSC HC32x120 flash algorithms. (Thanks @lennvn)
Changes
- Command changes
- Prevent accessing core registers unless core is halted. An error is printed.
- Print core security state in status command, if the core has more than one security state.
reg
command acceptsall
or the name of a register group in addition to register names.where
command prints the offset from the base address of the symbol.show register-groups
prints a list of the named groups of core registers.- Any prefixes of a command is accepted as long as it is unique. For example, "sym" for "symbol".
- New
probeserver
command to control the debug probe server.
- Vector catch supports SecureFault.
- A new
reset.halt_timeout
session option controls the timeout waiting for the core to recover from reset and halt. - The standard Cortex-M system address space is used as the memory map if the target does not provide its own memory map (e.g. the
cortex_m
default target). - The full name of a detected FPU is logged. These are the names such as "FPv4-SP-D16-M" or "FPv5-D16-M".
- An error will be reported if the config file (e.g.,
pyocd.yaml
) does not have a yaml dictionary at its root. This helps users identify the cause of an otherwise obscure error message. - Two session options are available too control RTOS awareness in the gdbserver.
rtos.enable
can be used to completely disable RTOS support, which is enabled by default.rtos.name
can be set to the name of an RTOS plugin in order to limit RTOS awareness to that one RTOS (which can make startup faster). - The
cache.read_code_from_elf
session option controls whether pyocd will read code from an ELF that is provided to it rather than read from the target (an optimisation that is enabled by default when an ELF is provided). - The
cmsis_dap.deferred_transfers
session options controls whether the CMSIS-DAP layer will used deferred transfers. There is generally no reason to disable this, especially since it greatly affects performance, but it may help is special cases. - The CMSIS-DAP pyusb/libusb backend will report a warning if pyusb fails to load libusb.
- The
cpu.step.instruction.timeout
can be used to enable a timeout when performing instruction stepping. By default the timeout is disabled. - Handle the case where GDB sends an interrupt (Control-C) during a step or range step command.
Fixes
- Major fixes for ITM, SWO, and SWV support. (Thanks @oxidecomputer)
- Another fix for CMSIS-Pack flash region creation. (Thanks @menshiyu)
- USB HID detach kernel driver fix for FreeBSD. (Thanks @cederom)
- Fixed case of multiple Cypress target types in the board ID. This did not prevent the targets from working, but caused incorrect data to be reported via the JSON boards list query. (Thanks @mcgordonite)
- Corrected detection of the Security extension on v8.1-M cores such as the Cortex-M55.
- Fixed the name of the
scan_all_aps
session option in several places. - Fixed hex dump generation on Python 2 (recent regression).
Documentation
- Added command reference.
- Added remote probe client/server documentation.
- Fixed download address of the GNU Arm Embedded toolchain. (Thanks @LONGZR007)
- A few smaller docs improvements.
Python API
- Major refactoring of command system used for the commander subcommand and (now) gdbserver monitor commands. See #955 for details.
- Major refactoring of the code for managing core registers. See #933 for details.
- Cores have an
extensions
property that is a list of enums frompyocd.coresight.core_ids.CortexMExtensions
. - Cores now have a
core_registers
property which is apyocd.core.core_registers.CoreRegisterIndex
object. This object gives you multiple ways to list and find core registers, such as by name, index, or group. - Refactored
CoreSightTarget
so there is anSoCTarget
superclass that implements the architecture-independent SoC-level features. MovedCoreSightTarget
underpyocd.coresight
. - Replaced the
MemoryAccessError
exception only raised by the memory cache withTransferFaultError
. - The
Session
class now tracks instances of the gdbservers and probeserver. - Added an optional hook callback parameter to the
Target.step()
API.
Tests
- Moved test binaries under
test/data
. - Functional tests check for a
skip_test
session option. This would be set in per-probe options in the config file if you need to skip a probe during testing. automated_test.py
gains--list-tests
,--include-tests
, and--exclude-tests
command line arguments.- Many functional test fixes and improvements.
- New unit test for fault and flash failure exceptions.
- Added a new functional test for commands.
- Removed the old and entirely unused
test_pyocd_tool.sh
script. - Functional test for range step.
v0.27.3
Fixes
- Fixed a regression in flash memory region creation from CMSIS-Packs that could result in an
AssertionError
being raised.
v0.27.2
Fixes
- NXP Kinetis targets: Fix additional exceptions raised if no cores were found, for instance if the device is locked. #909 (Thanks @Hoohaha)
- STMicro STM32 targets: Fix target types for STM32 boards with CMSIS-Pack based target support. #915
- CMSIS-Pack targets: Fix more bugs in DFP flash region generation. #919
- Cypress PSoC64: Fix SMIF flash algorithm type for
cy8c64xx_cmX_full_flash
targets. #920 (Thanks @bohdan-tymkiv)
v0.27.1
v0.27.0
New features
- Support for Arm ADIv6. This is a new version of the Arm Debug Interface used with Cortex-M55 and in some advanced platforms. Cortex-M microcontrollers are expected to slowly transition to ADIv6, but most new MCUs will continue to use ADIv5.2 for quite some time.
- Recognizing the Arm SC000, SC300, and Cortex-M35P secure cores and Cortex-M55.
Boards and targets
- Added support for new revisions of secure Cypress PSoC64 devices. (Thanks @bohdan-tymkiv and Cypress.)
- Added Arm Musca-S1 board ID.
- Added board IDs for Arm MPS3 AN522 and AN540.
- Fixed vendor name for LPC55S69 target.
- LPC55S69 target supports the single-core configuration (technically LPC55S66).
- Added 'lpc55s28' built-in target.
- New STMicro STM32F767 target. (Thanks @bartek-w.)
- Added Samsung s5js100 target. (Thanks @vince-zeng and Samsung engineers.)
- Fixed reset and connect issues with a sleeping target for the NXP i.MX RT1052. (Thanks @jhqian.)
Changes
- CMSIS-Packs: Removed the debug log message for every target loaded from a pack, which could get annoying very quickly.
- User scripts: Improved logging of errors. (Thanks @bartek-w.)
- Commander: The selected MEM-AP changes when the selected core is changed with the
core
command. - Commander: Help text is wrapped to the terminal width.
- Commander: Reading memory with a size misaligned to the read width is disallowed.
- Gdbserver: Added
--core
argument to run the gdbserver for a subset of cores. - General: The warning about
cortex_m
target type being selected is not logged if the target type was explicitly set. - General: Added
--probe
as an alias for--uid
on the command line. - General: The
--frequency
argument accepts floating point values, and allows "Hz" (case-insensitive) to follow the value in addition to the previously supported metric scale suffixes. For example,--frequency=2.2MHz
now works as expected. - Commander: The
set clock
command accepts the same values as the--frequency
argument. - J-Link: The device type passed to the J-Link driver can be specified with the
jlink.device
option. (By default, "Cortex-M4" is used. This doesn't cause any problems except a warning in the J-Link log because pyOCD uses its own target discovery rather than the J-Link's.) - DAP: Code cleanup and some small improvements in MEM-AP initialization.
- DAP: A
GeneralMemAPTarget
class was added that provides a target object for MEM-APs without a connected core. This handles the case where a MEM-AP provides access to either the system memory bus or an isolated memory bus, independent of MEM-APs for the core(s). (Thanks @bohdan-tymkiv and Cypress.) - STLink: Banked DP registers can be accessed on recent STLink firmware (V2J32 or V3J2 and above).
- Tests: Added
concurrency_test.py
functional test. - Tests: Improve logging in some tests. (Thanks @bartek-w.)
- Tests: Add process timeout for
gdb_test.py
on Python 3. (Thanks @bartek-w.)
Fixes
- DAP: Solved some long-standing concurrency issues with targets being accessed from multiple threads. Only the DAP (DP and AP) layer and below are locked. This means that the target and other high level layers are not locked. For instance, two threads attempting to set breakpoints on the same core would be unpredictable. The underlying DAP accesses and memory transfers will not fail, but the FPB component registers may get into an invalid state.
- Documentation: Corrected instructions in readme for installing from the git repo.
- CMSIS-Packs: Fixed problems creating the memory map for certain cases of multiple sector sizes in flash regions or regions belonging to individual cores.
- General: ANSI flags are always cleared after the list of available probes is printed.
- General: Memory addresses are masked to 32-bits. The most visible result of this is that you will see only a 32-bit value reported in the error if you accidentally pass a larger-width value to a read or write command (because Python intrinsically supports arbitrary-width integers).
- udev rules: Fixed line endings and remove symlink directives in the STLink udev rules included in the pyOCD repo.
- General: Resolved a deprecation warning for the
Thread.isAlive()
method from the Pythonthreading
module.
v0.26.1
Fixes
- Fixed invalid reference to
DFSR_PMU
constant fromCortexM
. - Fixed
read_memory_block32()
size parameter inElfReaderContext
. (Thanks @mbrossard!) - Address Python 3 string conversion issue in semihosting. (Thanks @mbrossard!)
- Workaround for failure to init flash algo in verify mode.
- gdbserver: clear stale flash data on exception during flash programming.
- Fixed flash object creation in cases where the memory map is modified during the init sequence.
- Fixed NXP kl28z target issues. (Thanks @Hoohaha!)
v0.26.0
New features
- Experimental SEGGER J-Link probe support.
- Uses the J-Link driver via the
pylink-square
package, which will find the driver if installed in the standard location on all three supported OSes. - Added
jlink.power
user option to control the J-Link's power output. Defaults to enabled.
- Uses the J-Link driver via the
- New
reset
subcommand. pack
subcommand option--find
prints an "Installed" column showing whether the containing CMSIS-Pack is already installed and the target is available.pack
subcommand options--find
and--install
match the given part number pattern anywhere within the part number (contains match).- Commander improvements:
st
alias forstatus
.- Results from Python expressions are pretty printed.
show locked
prints whether the target is locked (for NXP Kinetis and Nordic nRF52 devices).show graph
print the object model graph.
- Added
reset.hold_time
andreset.post_delay
user options to fine tune hardware reset timings.
Boards and targets
- Fixed NXP i.MX RT1052 HyperFlash and QuadSPI flash programming. (Thanks @jhqian!)
- Fixed reset vector catch clearing on LPC1768. (Thanks @rafl!)
Changes
- Support for accessing banked DP registers.
- Improved DP power up and power down sequences to match the recommendations and add timeouts.
- The associated core number is printed for gdb and semihost servers when the port number is logged.
- An empty
logging.loggers
yaml key in the config file is ignored instead of reporting an error while attempting to configure logging. - Commander changes:
status
only reports the core status now.reg
only shows peripheral register fields if the-f
option is passed.wreg -r
option to perform a post-write read-back and print of the peripheral register value. The read-back is no longer performed automatically.
Fixes
- Fixed several cases where exceptions were incorrectly created.
- Fixed a missing import of
six
incoresight_target.py
. - Fixed
FileProgrammer
import issue for user scripts that appeared in certain cases. - Corrected a "null internal" error when using certain ELF files.
- Solved a name error in
CortexM._map_from_vector_catch_mask()
. - Fixed name error regression in
Breakpoint
repr() implementation. - Commander always flushes after
wdp
,wap
, andwreg
commands. - The gdb server ensures the target is halted when gdb first connects, to prevent gdb from failing to read the target state (i.e., core registers that cannot be read by the core is running).
- Fixed incorrect exception handlers in
DebugPort
that caused certain faults and timeouts to not be cleared in the DP. - Corrected a number of naming and typing issues identified by pytype.
- Resolved a
KeyError
exception that would be raised by the RTX5 RTOS support when generating the thread description if a thread has an invalid state.
Internals
DebugPort
init uses a call sequence.- Refactored DP connection into a
DPConnector
class. - Refactored SWJ sequences into an
SWJSequenceSender
class - Refactored CoreSight discovery to use a new
CoreSightDiscovery
class hierarchy. This allows the init sequence to be modified by an ADI version-specific subclass. These changes are preparatory work for ADIv6 support. - Added a
CoreSightTarget.post_connect_hook()
method that can be overridden by builtin targets without having to modify the init sequence. CortexM
andCortexM_v8M
classes gained anarchitecture
property that is aCoreArchitecture.ARMv6M
enum of the Arm Cortex-M architecture:ARMv6M
,ARMv7M
,ARMv8M_BASE
,ARMv8M_MAIN
. Correspondingly, thearch
attribute was removed from the classes.- PMU halt reason support was moved to
CortexM_v8M
.
Testing
- New ROM table parser unit test.
- Basic user script functional test.
Documentation
- Fixed
user_script.md
reference to oldMemoryMap.get_region_by_name()
method that was replaced withget_first_matching_region()
.
v0.25.0
New features
- User scripts are run earlier, from the
Session
constructor. This allows user scripts to add new target classes. - pyocd commander: Added
compare
command for comparing memory with a binary file. - JSON features and options list, accessible via
pyocd json --features
. This is intended to allow IDEs to query for supported features and the set of available user options without having to make decisions based solely on the pyOCD version.
Boards and targets
- Added NXP FRDM-K32LB2 board and
k32l2b3
target. (Thanks @jhqian.) - Added NXP MIMXRT1010-EVK and MIMXRT1015-EVK boards and
mimxrt1010
andmimxrt1015
targets.
(Thanks @jhqian.) - Added NuMaker-IoT-M263A board and
m263kiaae
target. (Thanks @OpenNuvoton.) - Added numerous HDSC MCU targets:
hc32l110
,hc32f003
,hc32f005
,hc32l136
,hc32l130
,hc32f030
,hc32l196
,hc32l190
,hc32f196
,hc32f190
,hc32l072
,hc32l073
,hc32f072
. (Thanks @hdscmcu.) - Improved support for Cypress PSoC64 device family. (Thanks @Cypress-OpenOCD.)
- Corrected the UICR region size for Nordic nRF52x devices. (Thanks @Dirbaio.)
Changes
- pyocd commander:
erase
command will perform a mass erase if no arguments are passed. - pyocd erase: A much more helpful error is shown in no arguments are passed.
- Arguments for subcommands are grouped in the usage text.
- Adjusted pyOCD's CoreSight discovery process to only stop scanning for APs after two invalid APSEL addresses in sequence have been encountered (instead of 1).
- Relaxed the CMSIS-DAPv1 detection code for the pyusb backend to only require "CMSIS-DAP" in the HID interface name if there is more than one HID interface.
Fixes
- Much more robust detection of FreeRTOS. (Thanks @haneefdm.)
- Fixed exception raised by the Zephyr RTOS support in cases where a thread's state was garbage for one reason or another. (Thanks @FrameworkComputer.)
- Fixed bits versus bytes confusion in SWV processor. (Thanks @Dirbaio.)
- CMSIS-DAP v2: fix support for USB full speed devices with a
DAP_PACKET_SIZE
larger than the bulk packet size. (Thanks @vllogic.) - Corrected some debug log messages in the
BreakpointManager
. - pyocd commander: Fixed several issues when connecting to a device where no cores were discovered, when allowed by setting the
allow_no_cores
option. - Fixed issues with passing the path to an FLM flash algo to a
FlashRegion
via theflm
parameter.
Testing
- Added CMSIS-Pack parsing unit test.
- The
FileProgrammer
functional test now tests ELF files.
Installation
- Individual SVD files are now stored in the repo, and the
svd_data.zip
is built bysetup.py
. setup.py
can be run from directories other than the repo root. (Thanks @jsiverskog.)