From 06952c777b3bc79870d27ed8348417e7fb8fca56 Mon Sep 17 00:00:00 2001 From: Feng Zhang Date: Wed, 1 Nov 2023 10:47:38 +0800 Subject: [PATCH] linux: rock pi e: Modify the gmac configuration to rtl8211f Signed-off-by: Feng Zhang --- ...i-e-Modify-the-gmac-configuration-to.patch | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) create mode 100644 linux/latest/0023-rock-pi-e/0001-arm64-dts-rock-pi-e-Modify-the-gmac-configuration-to.patch diff --git a/linux/latest/0023-rock-pi-e/0001-arm64-dts-rock-pi-e-Modify-the-gmac-configuration-to.patch b/linux/latest/0023-rock-pi-e/0001-arm64-dts-rock-pi-e-Modify-the-gmac-configuration-to.patch new file mode 100644 index 00000000..a20add52 --- /dev/null +++ b/linux/latest/0023-rock-pi-e/0001-arm64-dts-rock-pi-e-Modify-the-gmac-configuration-to.patch @@ -0,0 +1,81 @@ +From 47440af622ece5a478b06dd000b9bab2a5711b31 Mon Sep 17 00:00:00 2001 +From: Feng Zhang +Date: Wed, 1 Nov 2023 10:18:20 +0800 +Subject: [PATCH] arm64: dts: rock pi e: Modify the gmac configuration to + rtl8211f + +Signed-off-by: Feng Zhang +--- + .../boot/dts/rockchip/rk3328-rock-pi-e.dts | 44 ++++--------------- + 1 file changed, 8 insertions(+), 36 deletions(-) + +diff --git a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts +index fa4889cf7..935b4ffff 100644 +--- a/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts ++++ b/arch/arm64/boot/dts/rockchip/rk3328-rock-pi-e.dts +@@ -143,37 +143,19 @@ &emmc { + }; + + &gmac2io { ++ phy-supply = <&vcc_io>; ++ phy-mode = "rgmii"; ++ clock_in_out = "input"; ++ snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; ++ snps,reset-active-low; ++ snps,reset-delays-us = <0 20000 100000>; + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; +- clock_in_out = "input"; +- phy-handle = <&rtl8211e>; +- phy-mode = "rgmii"; +- phy-supply = <&vcc_io>; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; +- snps,aal; +- snps,rxpbl = <0x4>; +- snps,txpbl = <0x4>; +- tx_delay = <0x26>; +- rx_delay = <0x11>; ++ tx_delay = <0x1a>; ++ rx_delay = <0x14>; + status = "okay"; +- +- mdio { +- compatible = "snps,dwmac-mdio"; +- #address-cells = <1>; +- #size-cells = <0>; +- +- rtl8211e: ethernet-phy@1 { +- reg = <1>; +- pinctrl-0 = <ð_phy_int_pin>, <ð_phy_reset_pin>; +- pinctrl-names = "default"; +- interrupt-parent = <&gpio1>; +- interrupts = <24 IRQ_TYPE_LEVEL_LOW>; +- reset-assert-us = <10000>; +- reset-deassert-us = <50000>; +- reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; +- }; +- }; + }; + + &gmac2phy { +@@ -342,16 +324,6 @@ &io_domains { + }; + + &pinctrl { +- ephy { +- eth_phy_int_pin: eth-phy-int-pin { +- rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_down>; +- }; +- +- eth_phy_reset_pin: eth-phy-reset-pin { +- rockchip,pins = <1 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; +- }; +- }; +- + leds { + led_pin: led-pin { + rockchip,pins = <3 RK_PA5 RK_FUNC_GPIO &pcfg_pull_none>; +-- +2.25.1 +